diff --git a/llvm/test/Transforms/InstCombine/and-or-icmps.ll b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
--- a/llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -2494,3 +2494,53 @@
   %r = and i1 %gt, %lt
   ret i1 %r
 }
+
+define i1 @icmp_eq_m1_and_eq_m1(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_m1_and_eq_m1(
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[TMP1]], -1
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %rx = icmp eq i8 %x, -1
+  %ry = icmp eq i8 %y, -1
+  %r = and i1 %rx, %ry
+  ret i1 %r
+}
+
+define i1 @icmp_ne_m1_and_ne_m1_fail(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_ne_m1_and_ne_m1_fail(
+; CHECK-NEXT:    [[RX:%.*]] = icmp ne i8 [[X:%.*]], -1
+; CHECK-NEXT:    [[RY:%.*]] = icmp ne i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[R:%.*]] = and i1 [[RX]], [[RY]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %rx = icmp ne i8 %x, -1
+  %ry = icmp ne i8 %y, -1
+  %r = and i1 %rx, %ry
+  ret i1 %r
+}
+
+define i1 @icmp_eq_m1_or_eq_m1_fail(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_m1_or_eq_m1_fail(
+; CHECK-NEXT:    [[RX:%.*]] = icmp eq i8 [[X:%.*]], -1
+; CHECK-NEXT:    [[RY:%.*]] = icmp eq i8 [[Y:%.*]], -1
+; CHECK-NEXT:    [[R:%.*]] = or i1 [[RX]], [[RY]]
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %rx = icmp eq i8 %x, -1
+  %ry = icmp eq i8 %y, -1
+  %r = or i1 %rx, %ry
+  ret i1 %r
+}
+
+define i1 @icmp_ne_m1_or_ne_m1(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_ne_m1_or_ne_m1(
+; CHECK-NEXT:    [[TMP1:%.*]] = and i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:    [[R:%.*]] = icmp ne i8 [[TMP1]], -1
+; CHECK-NEXT:    ret i1 [[R]]
+;
+  %rx = icmp ne i8 %x, -1
+  %ry = icmp ne i8 %y, -1
+  %r = or i1 %rx, %ry
+  ret i1 %r
+}
diff --git a/llvm/test/Transforms/PhaseOrdering/pr62311.ll b/llvm/test/Transforms/PhaseOrdering/pr62311.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/pr62311.ll
@@ -0,0 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes='default<O3>' -S | FileCheck %s
+
+; C++ version of test case
+; #include <x86intrin.h>
+;
+; bool allones(__m512i x) {
+;   return
+;     x[0] == -1 && x[1] == -1 &&
+;     x[2] == -1 && x[3] == -1 &&
+;     x[4] == -1 && x[5] == -1 &&
+;     x[6] == -1 && x[7] == -1;
+; }
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; Function Attrs: mustprogress nounwind uwtable
+define noundef zeroext i1 @allones(<8 x i64> noundef %x) {
+; CHECK-LABEL: @allones(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> [[X:%.*]])
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i64 [[TMP0]], -1
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+entry:
+  %vecext = extractelement <8 x i64> %x, i32 0
+  %cmp = icmp eq i64 %vecext, -1
+  %vecext1 = extractelement <8 x i64> %x, i32 1
+  %cmp2 = icmp eq i64 %vecext1, -1
+  %or.cond = select i1 %cmp, i1 %cmp2, i1 false
+  %vecext4 = extractelement <8 x i64> %x, i32 2
+  %cmp5 = icmp eq i64 %vecext4, -1
+  %or.cond20 = select i1 %or.cond, i1 %cmp5, i1 false
+  %vecext7 = extractelement <8 x i64> %x, i32 3
+  %cmp8 = icmp eq i64 %vecext7, -1
+  %or.cond21 = select i1 %or.cond20, i1 %cmp8, i1 false
+  %vecext10 = extractelement <8 x i64> %x, i32 4
+  %cmp11 = icmp eq i64 %vecext10, -1
+  %or.cond22 = select i1 %or.cond21, i1 %cmp11, i1 false
+  %vecext13 = extractelement <8 x i64> %x, i32 5
+  %cmp14 = icmp eq i64 %vecext13, -1
+  %or.cond23 = select i1 %or.cond22, i1 %cmp14, i1 false
+  %vecext16 = extractelement <8 x i64> %x, i32 6
+  %cmp17 = icmp eq i64 %vecext16, -1
+  %or.cond24 = select i1 %or.cond23, i1 %cmp17, i1 false
+  br i1 %or.cond24, label %land.rhs, label %land.end
+
+land.rhs:                                         ; preds = %entry
+  %vecext18 = extractelement <8 x i64> %x, i32 7
+
+  %cmp19 = icmp eq i64 %vecext18, -1
+  br label %land.end
+
+land.end:                                         ; preds = %land.rhs, %entry
+  %0 = phi i1 [ false, %entry ], [ %cmp19, %land.rhs ]
+  ret i1 %0
+}