diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -163,7 +163,7 @@
     ImmTyBLGP,
     ImmTyCBSZ,
     ImmTyABID,
-    ImmTyEndpgm,
+    ImmTyEndpgmImm,
     ImmTyWaitVDST,
     ImmTyWaitEXP,
   };
@@ -879,7 +879,7 @@
   bool isGPRIdxMode() const;
   bool isS16Imm() const;
   bool isU16Imm() const;
-  bool isEndpgm() const;
+  bool isEndpgmImm() const;
   bool isWaitVDST() const;
   bool isWaitEXP() const;
 
@@ -1079,7 +1079,7 @@
     case ImmTyBLGP: OS << "BLGP"; break;
     case ImmTyCBSZ: OS << "CBSZ"; break;
     case ImmTyABID: OS << "ABID"; break;
-    case ImmTyEndpgm: OS << "Endpgm"; break;
+    case ImmTyEndpgmImm: OS << "EndpgmImm"; break;
     case ImmTyWaitVDST: OS << "WaitVDST"; break;
     case ImmTyWaitEXP: OS << "WaitEXP"; break;
     }
@@ -1823,8 +1823,8 @@
   AMDGPUOperand::Ptr defaultCBSZ() const;
   AMDGPUOperand::Ptr defaultABID() const;
 
-  OperandMatchResultTy parseEndpgmOp(OperandVector &Operands);
-  AMDGPUOperand::Ptr defaultEndpgmImmOperands() const;
+  OperandMatchResultTy parseEndpgmImm(OperandVector &Operands);
+  AMDGPUOperand::Ptr defaultEndpgmImm() const;
 
   AMDGPUOperand::Ptr defaultWaitVDST() const;
   AMDGPUOperand::Ptr defaultWaitEXP() const;
@@ -8713,8 +8713,8 @@
   return AMDGPUOperand::CreateImm(this, 0xf, SMLoc(), AMDGPUOperand::ImmTyDppRowMask);
 }
 
-AMDGPUOperand::Ptr AMDGPUAsmParser::defaultEndpgmImmOperands() const {
-  return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyEndpgm);
+AMDGPUOperand::Ptr AMDGPUAsmParser::defaultEndpgmImm() const {
+  return AMDGPUOperand::CreateImm(this, 0, SMLoc(), AMDGPUOperand::ImmTyEndpgmImm);
 }
 
 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultDppBankMask() const {
@@ -9196,7 +9196,7 @@
 // endpgm
 //===----------------------------------------------------------------------===//
 
-OperandMatchResultTy AMDGPUAsmParser::parseEndpgmOp(OperandVector &Operands) {
+OperandMatchResultTy AMDGPUAsmParser::parseEndpgmImm(OperandVector &Operands) {
   SMLoc S = getLoc();
   int64_t Imm = 0;
 
@@ -9211,11 +9211,11 @@
   }
 
   Operands.push_back(
-      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyEndpgm));
+      AMDGPUOperand::CreateImm(this, Imm, S, AMDGPUOperand::ImmTyEndpgmImm));
   return MatchOperand_Success;
 }
 
-bool AMDGPUOperand::isEndpgm() const { return isImmTy(ImmTyEndpgm); }
+bool AMDGPUOperand::isEndpgmImm() const { return isImmTy(ImmTyEndpgmImm); }
 
 //===----------------------------------------------------------------------===//
 // LDSDIR
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
@@ -248,8 +248,8 @@
                       const MCSubtargetInfo &STI, raw_ostream &O);
   void printHwreg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
                   raw_ostream &O);
-  void printEndpgm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
-                   raw_ostream &O);
+  void printEndpgmImm(const MCInst *MI, unsigned OpNo,
+                      const MCSubtargetInfo &STI, raw_ostream &O);
 };
 
 } // End namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -1614,9 +1614,9 @@
   O << ')';
 }
 
-void AMDGPUInstPrinter::printEndpgm(const MCInst *MI, unsigned OpNo,
-                                    const MCSubtargetInfo &STI,
-                                    raw_ostream &O) {
+void AMDGPUInstPrinter::printEndpgmImm(const MCInst *MI, unsigned OpNo,
+                                       const MCSubtargetInfo &STI,
+                                       raw_ostream &O) {
   uint16_t Imm = MI->getOperand(OpNo).getImm();
   if (Imm == 0) {
     return;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -980,14 +980,6 @@
   let IsOptional = 1;
 }
 
-def EndpgmMatchClass : AsmOperandClass {
-  let Name = "EndpgmImm";
-  let PredicateMethod = "isEndpgm";
-  let ParserMethod = "parseEndpgmOp";
-  let RenderMethod = "addImmOperands";
-  let IsOptional = 1;
-}
-
 def SWaitMatchClass : AsmOperandClass {
   let Name = "SWaitCnt";
   let RenderMethod = "addImmOperands";
@@ -1022,10 +1014,7 @@
   let ParserMatchClass = SwizzleMatchClass;
 }
 
-def EndpgmImm : Operand<i16> {
-  let PrintMethod = "printEndpgm";
-  let ParserMatchClass = EndpgmMatchClass;
-}
+def EndpgmImm : CustomOperand<i16, 1>;
 
 def WAIT_FLAG : Operand <i32> {
   let ParserMatchClass = SWaitMatchClass;