diff --git a/llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll b/llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll --- a/llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll +++ b/llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll @@ -143,3 +143,76 @@ store double %d, ptr %add.ptr, align 8 ret void } + +define void @foo6(ptr %p) #0 { +; RV32ZDINX-LABEL: foo6: +; RV32ZDINX: # %bb.0: # %entry +; RV32ZDINX-NEXT: addi sp, sp, -16 +; RV32ZDINX-NEXT: .cfi_def_cfa_offset 16 +; RV32ZDINX-NEXT: sw a0, 8(sp) +; RV32ZDINX-NEXT: addi a1, a0, 2044 +; RV32ZDINX-NEXT: lui a2, 261993 +; RV32ZDINX-NEXT: addi a2, a2, -164 +; RV32ZDINX-NEXT: sw a2, 4(a1) +; RV32ZDINX-NEXT: lui a1, 167772 +; RV32ZDINX-NEXT: addi a1, a1, 655 +; RV32ZDINX-NEXT: sw a1, 2044(a0) +; RV32ZDINX-NEXT: addi sp, sp, 16 +; RV32ZDINX-NEXT: ret +; +; RV64ZDINX-LABEL: foo6: +; RV64ZDINX: # %bb.0: # %entry +; RV64ZDINX-NEXT: addi sp, sp, -16 +; RV64ZDINX-NEXT: .cfi_def_cfa_offset 16 +; RV64ZDINX-NEXT: lui a1, %hi(.LCPI5_0) +; RV64ZDINX-NEXT: ld a1, %lo(.LCPI5_0)(a1) +; RV64ZDINX-NEXT: sd a0, 8(sp) +; RV64ZDINX-NEXT: sd a1, 2044(a0) +; RV64ZDINX-NEXT: addi sp, sp, 16 +; RV64ZDINX-NEXT: ret +entry: + %p.addr = alloca ptr, align 8 + store ptr %p, ptr %p.addr, align 8 + %0 = fadd double 1.41, 0.0 + %1 = load ptr, ptr %p.addr, align 8 + %add.ptr = getelementptr inbounds i8, ptr %1, i64 2044 + store double %0, ptr %add.ptr, align 8 + ret void +} + +@PI = constant double 3.140000e+00, align 8 + +define void @foo7(ptr %p) #0 { +; RV32ZDINX-LABEL: foo7: +; RV32ZDINX: # %bb.0: # %entry +; RV32ZDINX-NEXT: addi sp, sp, -16 +; RV32ZDINX-NEXT: .cfi_def_cfa_offset 16 +; RV32ZDINX-NEXT: sw a0, 8(sp) +; RV32ZDINX-NEXT: addi a1, a0, 2044 +; RV32ZDINX-NEXT: lui a2, 262290 +; RV32ZDINX-NEXT: addi a2, a2, -328 +; RV32ZDINX-NEXT: sw a2, 4(a1) +; RV32ZDINX-NEXT: lui a1, 335544 +; RV32ZDINX-NEXT: addi a1, a1, 1311 +; RV32ZDINX-NEXT: sw a1, 2044(a0) +; RV32ZDINX-NEXT: addi sp, sp, 16 +; RV32ZDINX-NEXT: ret +; +; RV64ZDINX-LABEL: foo7: +; RV64ZDINX: # %bb.0: # %entry +; RV64ZDINX-NEXT: addi sp, sp, -16 +; RV64ZDINX-NEXT: .cfi_def_cfa_offset 16 +; RV64ZDINX-NEXT: lui a1, %hi(.LCPI6_0) +; RV64ZDINX-NEXT: ld a1, %lo(.LCPI6_0)(a1) +; RV64ZDINX-NEXT: sd a0, 8(sp) +; RV64ZDINX-NEXT: sd a1, 2044(a0) +; RV64ZDINX-NEXT: addi sp, sp, 16 +; RV64ZDINX-NEXT: ret +entry: + %p.addr = alloca ptr, align 8 + store ptr %p, ptr %p.addr, align 8 + %0 = load ptr, ptr %p.addr, align 8 + %add.ptr = getelementptr inbounds i8, ptr %0, i64 2044 + store double 3.140000e+00, ptr %add.ptr, align 8 + ret void +}