diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -349,7 +349,7 @@
   MachineFrameInfo &MFI = MF.getFrameInfo();
 
   unsigned MaxCallFrameSize = 0;
-  bool AdjustsStack = MFI.adjustsStack();
+  bool AdjustsStack = false;
 
   // Get the function call frame set-up and tear-down instruction opcode
   unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
@@ -376,8 +376,8 @@
       }
 
   assert(!MFI.isMaxCallFrameSizeComputed() ||
-         (MFI.getMaxCallFrameSize() == MaxCallFrameSize &&
-          MFI.adjustsStack() == AdjustsStack));
+         (MFI.getMaxCallFrameSize() >= MaxCallFrameSize &&
+          !(AdjustsStack && !MFI.adjustsStack())));
   MFI.setAdjustsStack(AdjustsStack);
   MFI.setMaxCallFrameSize(MaxCallFrameSize);
 
diff --git a/llvm/test/CodeGen/AArch64/compute-call-frame-size-unreachable-pass.ll b/llvm/test/CodeGen/AArch64/compute-call-frame-size-unreachable-pass.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/compute-call-frame-size-unreachable-pass.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple aarch64--
+
+; This tests that the MFI assert in unreachableblockelim pass
+; does not trigger
+
+%struct.ngtcp2_crypto_aead = type { i8*, i64 }
+%struct.ngtcp2_crypto_aead_ctx = type { i8* }
+
+; Function Attrs: noinline optnone
+define internal fastcc void @decrypt_pkt() unnamed_addr #0 !type !0 !type !1 {
+entry:
+  br i1 false, label %cont, label %trap, !nosanitize !2
+
+trap:                                             ; preds = %entry
+  unreachable, !nosanitize !2
+
+cont:                                             ; preds = %entry
+  %call = call i32 undef(i8* undef, %struct.ngtcp2_crypto_aead* undef, %struct.ngtcp2_crypto_aead_ctx* undef, i8* undef, i64 undef, i8* undef, i64 undef, i8* undef, i64 undef)
+  ret void
+}
+
+attributes #0 = { noinline optnone }
+
+!0 = !{i64 0, !"_ZTSFlPhPK18ngtcp2_crypto_aeadPKhmS4_mlP16ngtcp2_crypto_kmPFiS_S2_PK22ngtcp2_crypto_aead_ctxS4_mS4_mS4_mEE"}
+!1 = !{i64 0, !"_ZTSFlPvPKvS1_mS1_mlS_S_E.generalized"}
+!2 = !{}
diff --git a/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll b/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
--- a/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
+++ b/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
@@ -6,12 +6,8 @@
 define void @load1(ptr nocapture readonly %x) {
 ; CHECK-LABEL: load1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    .cfi_def_cfa_offset 16
 ; CHECK-NEXT:    callq __asan_check_load_add_1_RDI
 ; CHECK-NEXT:    callq __asan_check_store_add_1_RDI
-; CHECK-NEXT:    popq %rax
-; CHECK-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-NEXT:    retq
   call void @llvm.asan.check.memaccess(ptr %x, i32 0)
   call void @llvm.asan.check.memaccess(ptr %x, i32 32)
@@ -21,10 +17,8 @@
 define void @load2(ptr nocapture readonly %x) nounwind {
 ; CHECK-LABEL: load2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    callq __asan_check_load_add_2_RDI
 ; CHECK-NEXT:    callq __asan_check_store_add_2_RDI
-; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
   %1 = ptrtoint ptr %x to i64
   call void @llvm.asan.check.memaccess(ptr %x, i32 2)
@@ -35,10 +29,8 @@
 define void @load4(ptr nocapture readonly %x) nounwind {
 ; CHECK-LABEL: load4:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    callq __asan_check_load_add_4_RDI
 ; CHECK-NEXT:    callq __asan_check_store_add_4_RDI
-; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
   %1 = ptrtoint ptr %x to i64
   call void @llvm.asan.check.memaccess(ptr %x, i32 4)
@@ -49,10 +41,8 @@
 define void @load8(ptr nocapture readonly %x) nounwind {
 ; CHECK-LABEL: load8:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    callq __asan_check_load_add_8_RDI
 ; CHECK-NEXT:    callq __asan_check_store_add_8_RDI
-; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
   %1 = ptrtoint ptr %x to i64
   call void @llvm.asan.check.memaccess(ptr %x, i32 6)
@@ -63,10 +53,8 @@
 define void @load16(ptr nocapture readonly %x) nounwind {
 ; CHECK-LABEL: load16:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    pushq %rax
 ; CHECK-NEXT:    callq __asan_check_load_add_16_RDI
 ; CHECK-NEXT:    callq __asan_check_store_add_16_RDI
-; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
   %1 = ptrtoint ptr %x to i64
   call void @llvm.asan.check.memaccess(ptr %x, i32 8)