Index: llvm/docs/ReleaseNotes.rst =================================================================== --- llvm/docs/ReleaseNotes.rst +++ llvm/docs/ReleaseNotes.rst @@ -70,6 +70,9 @@ legacy inliner pass. Backend stack coloring should handle cases alloca merging initially set out to handle. +* InstructionSimplify APIs now require instructions be inserted into a + parent function. + Changes to building LLVM ------------------------ Index: llvm/include/llvm/Analysis/InstructionSimplify.h =================================================================== --- llvm/include/llvm/Analysis/InstructionSimplify.h +++ llvm/include/llvm/Analysis/InstructionSimplify.h @@ -19,12 +19,8 @@ // values. This will prevent other code from seeing the same undef uses and // resolving them to different values. // -// These routines are designed to tolerate moderately incomplete IR, such as -// instructions that are not connected to basic blocks yet. However, they do -// require that all the IR that they encounter be valid. In particular, they -// require that all non-constant values be defined in the same function, and the -// same call context of that function (and not split between caller and callee -// contexts of a directly recursive call, for example). +// They do require that all the IR that they encounter be valid and inserted +// into a parent function. // // Additionally, these routines can't simplify to the instructions that are not // def-reachable, meaning we can't just scan the basic block for instructions Index: llvm/lib/Analysis/InstructionSimplify.cpp =================================================================== --- llvm/lib/Analysis/InstructionSimplify.cpp +++ llvm/lib/Analysis/InstructionSimplify.cpp @@ -6754,6 +6754,7 @@ ArrayRef NewOps, const SimplifyQuery &SQ, unsigned MaxRecurse) { + assert(I->getFunction() && "instruction should be inserted in a function"); const SimplifyQuery Q = SQ.CxtI ? SQ : SQ.getWithInstruction(I); switch (I->getOpcode()) { Index: llvm/lib/Transforms/Scalar/JumpThreading.cpp =================================================================== --- llvm/lib/Transforms/Scalar/JumpThreading.cpp +++ llvm/lib/Transforms/Scalar/JumpThreading.cpp @@ -2643,6 +2643,7 @@ // mapping and using it to remap operands in the cloned instructions. for (; BI != BB->end(); ++BI) { Instruction *New = BI->clone(); + New->insertInto(PredBB, OldPredBranch->getIterator()); // Remap operands to patch up intra-block references. for (unsigned i = 0, e = New->getNumOperands(); i != e; ++i) @@ -2660,7 +2661,7 @@ {BB->getModule()->getDataLayout(), TLI, nullptr, nullptr, New})) { ValueMapping[&*BI] = IV; if (!New->mayHaveSideEffects()) { - New->deleteValue(); + New->eraseFromParent(); New = nullptr; } } else { @@ -2669,7 +2670,6 @@ if (New) { // Otherwise, insert the new instruction into the block. New->setName(BI->getName()); - New->insertInto(PredBB, OldPredBranch->getIterator()); // Update Dominance from simplified New instruction operands. for (unsigned i = 0, e = New->getNumOperands(); i != e; ++i) if (BasicBlock *SuccBB = dyn_cast(New->getOperand(i))) Index: llvm/lib/Transforms/Utils/CloneFunction.cpp =================================================================== --- llvm/lib/Transforms/Utils/CloneFunction.cpp +++ llvm/lib/Transforms/Utils/CloneFunction.cpp @@ -470,9 +470,8 @@ // Nope, clone it now. BasicBlock *NewBB; - BBEntry = NewBB = BasicBlock::Create(BB->getContext()); - if (BB->hasName()) - NewBB->setName(BB->getName() + NameSuffix); + Twine NewName(BB->hasName() ? Twine(BB->getName()) + NameSuffix : ""); + BBEntry = NewBB = BasicBlock::Create(BB->getContext(), NewName, NewFunc); // It is only legal to clone a function if a block address within that // function is never referenced outside of the function. Given that, we @@ -498,6 +497,7 @@ ++II) { Instruction *NewInst = cloneInstruction(II); + NewInst->insertInto(NewBB, NewBB->end()); if (HostFuncIsStrictFP) { // All function calls in the inlined function must get 'strictfp' @@ -516,8 +516,6 @@ // If we can simplify this instruction to some other value, simply add // a mapping to that value rather than inserting a new instruction into // the basic block. - // - // FIXME: simplifyInstruction should know the context of the new function. if (Value *V = simplifyInstruction(NewInst, BB->getModule()->getDataLayout())) { // On the off-chance that this simplifies to an instruction in the old @@ -528,7 +526,7 @@ if (!NewInst->mayHaveSideEffects()) { VMap[&*II] = V; - NewInst->deleteValue(); + NewInst->eraseFromParent(); continue; } } @@ -537,7 +535,6 @@ if (II->hasName()) NewInst->setName(II->getName() + NameSuffix); VMap[&*II] = NewInst; // Add instruction map to value. - NewInst->insertInto(NewBB, NewBB->end()); if (isa(II) && !II->isDebugOrPseudoInst()) { hasCalls = true; hasMemProfMetadata |= II->hasMetadata(LLVMContext::MD_memprof); @@ -685,9 +682,6 @@ if (!NewBB) continue; // Dead block. - // Add the new block to the new function. - NewFunc->insert(NewFunc->end(), NewBB); - // Handle PHI nodes specially, as we have to remove references to dead // blocks. for (const PHINode &PN : BI.phis()) { Index: llvm/lib/Transforms/Utils/LoopRotationUtils.cpp =================================================================== --- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp +++ llvm/lib/Transforms/Utils/LoopRotationUtils.cpp @@ -435,6 +435,8 @@ // Otherwise, create a duplicate of the instruction. Instruction *C = Inst->clone(); + C->insertBefore(LoopEntryBranch); + ++NumInstrsDuplicated; // Eagerly remap the operands of the instruction. @@ -444,7 +446,7 @@ // Avoid inserting the same intrinsic twice. if (auto *DII = dyn_cast(C)) if (DbgIntrinsics.count(makeHash(DII))) { - C->deleteValue(); + C->eraseFromParent(); continue; } @@ -457,7 +459,7 @@ // in the map. InsertNewValueIntoMap(ValueMap, Inst, V); if (!C->mayHaveSideEffects()) { - C->deleteValue(); + C->eraseFromParent(); C = nullptr; } } else { @@ -466,7 +468,6 @@ if (C) { // Otherwise, stick the new instruction into the new block! C->setName(Inst->getName()); - C->insertBefore(LoopEntryBranch); if (auto *II = dyn_cast(C)) AC->registerAssumption(II); Index: llvm/lib/Transforms/Utils/SimplifyCFG.cpp =================================================================== --- llvm/lib/Transforms/Utils/SimplifyCFG.cpp +++ llvm/lib/Transforms/Utils/SimplifyCFG.cpp @@ -3211,6 +3211,9 @@ } // Clone the instruction. Instruction *N = BBI->clone(); + // Insert the new instruction into its new home. + N->insertInto(EdgeBB, InsertPt); + if (BBI->hasName()) N->setName(BBI->getName() + ".c"); @@ -3226,7 +3229,8 @@ if (!BBI->use_empty()) TranslateMap[&*BBI] = V; if (!N->mayHaveSideEffects()) { - N->deleteValue(); // Instruction folded away, don't need actual inst + N->eraseFromParent(); // Instruction folded away, don't need actual + // inst N = nullptr; } } else { @@ -3234,9 +3238,6 @@ TranslateMap[&*BBI] = N; } if (N) { - // Insert the new instruction into its new home. - N->insertInto(EdgeBB, InsertPt); - // Register the new instruction with the assumption cache if necessary. if (auto *Assume = dyn_cast(N)) if (AC) Index: llvm/test/Transforms/CodeExtractor/PartialInlineAndOr.ll =================================================================== --- llvm/test/Transforms/CodeExtractor/PartialInlineAndOr.ll +++ llvm/test/Transforms/CodeExtractor/PartialInlineAndOr.ll @@ -46,8 +46,8 @@ ; CHECK-LABEL: @dummy_caller ; CHECK: br i1 ; CHECK: br i1 -; CHECK: br i1 ; CHECK: call void @bar.1. +; CHECK: br i1 ; LIMIT-LABEL: @dummy_caller ; LIMIT-NOT: br i1 ; LIMIT: call i32 @bar Index: llvm/test/Transforms/CodeExtractor/PartialInlinePGOMultiRegion.ll =================================================================== --- llvm/test/Transforms/CodeExtractor/PartialInlinePGOMultiRegion.ll +++ llvm/test/Transforms/CodeExtractor/PartialInlinePGOMultiRegion.ll @@ -113,10 +113,10 @@ define signext i32 @foo(i32 signext %value, i32 signext %ub) #0 !prof !30 { ; CHECK-LABEL: @foo ; CHECK-NOT: call signext i32 @bar -; CHECK: codeRepl1.i: -; CHECK: call void @bar.1.if.then ; CHECK: codeRepl.i: ; CHECK: call void @bar.1.if.then2 +; CHECK: codeRepl1.i: +; CHECK: call void @bar.1.if.then entry: %value.addr = alloca i32, align 4 %ub.addr = alloca i32, align 4 Index: llvm/test/Transforms/Inline/call-intrinsic-is-constant.ll =================================================================== --- llvm/test/Transforms/Inline/call-intrinsic-is-constant.ll +++ llvm/test/Transforms/Inline/call-intrinsic-is-constant.ll @@ -38,11 +38,11 @@ ; CHECK-SAME: (i64 [[VAL:%.*]]) { ; CHECK-NEXT: [[COND_I:%.*]] = call i1 @llvm.is.constant.i64(i64 [[VAL]]) ; CHECK-NEXT: br i1 [[COND_I]], label [[COND_TRUE_I:%.*]], label [[COND_FALSE_I:%.*]] +; CHECK: cond.false.i: +; CHECK-NEXT: br label [[CALLEE_EXIT:%.*]] ; CHECK: cond.true.i: ; CHECK-NEXT: call void @foo() ; CHECK-NEXT: call void @foo() -; CHECK-NEXT: br label [[CALLEE_EXIT:%.*]] -; CHECK: cond.false.i: ; CHECK-NEXT: br label [[CALLEE_EXIT]] ; CHECK: callee.exit: ; CHECK-NEXT: ret void Index: llvm/test/Transforms/Inline/callbr.ll =================================================================== --- llvm/test/Transforms/Inline/callbr.ll +++ llvm/test/Transforms/Inline/callbr.ll @@ -16,15 +16,15 @@ ; CHECK-NEXT: [[I2_I:%.*]] = load i32, ptr [[I1_I]], align 4 ; CHECK-NEXT: callbr void asm sideeffect "", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 [[I2_I]]) ; CHECK-NEXT: to label [[BB3_I:%.*]] [label [[BB5_I:%.*]], label %bb4.i] -; CHECK: bb3.i: -; CHECK-NEXT: store i32 0, ptr [[I_I]], align 4 -; CHECK-NEXT: br label [[T32_EXIT:%.*]] ; CHECK: bb4.i: ; CHECK-NEXT: store i32 1, ptr [[I_I]], align 4 -; CHECK-NEXT: br label [[T32_EXIT]] +; CHECK-NEXT: br label [[T32_EXIT:%.*]] ; CHECK: bb5.i: ; CHECK-NEXT: store i32 2, ptr [[I_I]], align 4 ; CHECK-NEXT: br label [[T32_EXIT]] +; CHECK: bb3.i: +; CHECK-NEXT: store i32 0, ptr [[I_I]], align 4 +; CHECK-NEXT: br label [[T32_EXIT]] ; CHECK: t32.exit: ; CHECK-NEXT: [[I7_I:%.*]] = load i32, ptr [[I_I]], align 4 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[I_I]]) Index: llvm/test/Transforms/Inline/deoptimize-intrinsic.ll =================================================================== --- llvm/test/Transforms/Inline/deoptimize-intrinsic.ll +++ llvm/test/Transforms/Inline/deoptimize-intrinsic.ll @@ -38,16 +38,16 @@ store i8 %v, ptr %ptr ret void -; CHECK: lleft.i: -; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid(i32 1) [ "deopt"(i32 2, i32 1) ] +; CHECK: rright.i: +; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid() [ "deopt"(i32 2, i32 1) ] ; CHECK-NEXT: ret void ; CHECK: rleft.i: ; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid(i32 1, i32 300, float 5.000000e+02, <2 x ptr> undef) [ "deopt"(i32 2, i32 1) ] ; CHECK-NEXT: ret void -; CHECK: rright.i: -; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid() [ "deopt"(i32 2, i32 1) ] +; CHECK: lleft.i: +; CHECK-NEXT: call void (...) @llvm.experimental.deoptimize.isVoid(i32 1) [ "deopt"(i32 2, i32 1) ] ; CHECK-NEXT: ret void ; CHECK: callee.exit: @@ -62,16 +62,16 @@ %v = invoke i8 @callee(ptr %c) [ "deopt"(i32 3) ] to label %normal unwind label %unwind -; CHECK: lleft.i: -; CHECK-NEXT: %0 = call i32 (...) @llvm.experimental.deoptimize.i32(i32 1) [ "deopt"(i32 3, i32 1) ] +; CHECK: rright.i: +; CHECK-NEXT: %0 = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"(i32 3, i32 1) ] ; CHECK-NEXT: ret i32 %0 ; CHECK: rleft.i: ; CHECK-NEXT: %1 = call i32 (...) @llvm.experimental.deoptimize.i32(i32 1, i32 300, float 5.000000e+02, <2 x ptr> undef) [ "deopt"(i32 3, i32 1) ] ; CHECK-NEXT: ret i32 %1 -; CHECK: rright.i: -; CHECK-NEXT: %2 = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"(i32 3, i32 1) ] +; CHECK: lleft.i: +; CHECK-NEXT: %2 = call i32 (...) @llvm.experimental.deoptimize.i32(i32 1) [ "deopt"(i32 3, i32 1) ] ; CHECK-NEXT: ret i32 %2 ; CHECK: callee.exit: Index: llvm/test/Transforms/Inline/dynamic-alloca-simplified-large.ll =================================================================== --- llvm/test/Transforms/Inline/dynamic-alloca-simplified-large.ll +++ llvm/test/Transforms/Inline/dynamic-alloca-simplified-large.ll @@ -149,11 +149,11 @@ ; CHECK-NEXT: [[CMP_I:%.*]] = icmp ult i32 [[SIZE:%.*]], 100 ; CHECK-NEXT: [[CONV_I:%.*]] = zext i32 [[SIZE]] to i64 ; CHECK-NEXT: br i1 [[CMP_I]], label [[IF_THEN_I:%.*]], label [[IF_END_I:%.*]] -; CHECK: if.then.i: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, i64 [[CONV_I]], align 8 -; CHECK-NEXT: br label [[STACK_ALLOCATE_EXIT:%.*]] ; CHECK: if.end.i: ; CHECK-NEXT: [[CALL_I:%.*]] = tail call ptr @malloc(i64 [[CONV_I]]) #3 +; CHECK-NEXT: br label [[STACK_ALLOCATE_EXIT:%.*]] +; CHECK: if.then.i: +; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, i64 [[CONV_I]], align 8 ; CHECK-NEXT: br label [[STACK_ALLOCATE_EXIT]] ; CHECK: stack_allocate.exit: ; CHECK-NEXT: [[RETVAL_0_I:%.*]] = phi ptr [ [[TMP0]], [[IF_THEN_I]] ], [ [[CALL_I]], [[IF_END_I]] ] Index: llvm/test/Transforms/Inline/inline-funclets.ll =================================================================== --- llvm/test/Transforms/Inline/inline-funclets.ll +++ llvm/test/Transforms/Inline/inline-funclets.ll @@ -476,6 +476,9 @@ ; CHECK-NEXT: %[[lr_pad:.+]] = cleanuppad within %[[left_cp]] [] ; CHECK-NEXT: unreachable +; CHECK: [[unreach]]: +; CHECK-NEXT: unreachable + root.cont: call void @g() [ "funclet"(token %root.pad) ] invoke void @g() [ "funclet"(token %root.pad) ] @@ -519,9 +522,6 @@ unreach: unreachable -; CHECK: [[unreach]]: -; CHECK-NEXT: unreachable - exit: ret void } @@ -562,8 +562,6 @@ root.cont: cleanupret from %root.cp unwind to caller -; CHECK: [[root_cont]]: -; CHECK-NEXT: cleanupret from %[[root_cp]] unwind label %cleanup child: %child.cp = cleanuppad within %root.cp [] @@ -590,6 +588,11 @@ ; CHECK-NEXT: %[[ll_cp:.+]] = cleanuppad within %[[left_cp]] [] ; CHECK-NEXT: cleanupret from %[[ll_cp]] unwind label %[[left_right:.+]] + +; CHECK: [[left_right]]: +; CHECK-NEXT: %[[lr_cp:.+]] = cleanuppad within %[[left_cp]] [] +; CHECK-NEXT: unreachable + left.cont: invoke void @g() [ "funclet"(token %left.cp) ] to label %unreach unwind label %left.right @@ -600,8 +603,7 @@ left.right: %lr.cp = cleanuppad within %left.cp [] unreachable -; CHECK: [[left_right]]: -; CHECK-NEXT: %[[lr_cp:.+]] = cleanuppad within %[[left_cp]] [] +; CHECK: [[unreach]]: ; CHECK-NEXT: unreachable child.cont: @@ -622,10 +624,10 @@ ; CHECK: [[right_cont]]: ; CHECK-NEXT: unreachable +; CHECK: [[root_cont]]: +; CHECK-NEXT: cleanupret from %[[root_cp]] unwind label %cleanup unreach: unreachable -; CHECK: [[unreach]]: -; CHECK-NEXT: unreachable exit: ret void Index: llvm/test/Transforms/Inline/inline-tail.ll =================================================================== --- llvm/test/Transforms/Inline/inline-tail.ll +++ llvm/test/Transforms/Inline/inline-tail.ll @@ -88,10 +88,10 @@ ; We can't merge the returns. ; CHECK: define void @test_multiret_a( -; CHECK: musttail call void @test_multiret_c( -; CHECK-NEXT: ret void ; CHECK: musttail call void @test_multiret_d( ; CHECK-NEXT: ret void +; CHECK: musttail call void @test_multiret_c( +; CHECK-NEXT: ret void declare void @test_multiret_c(i1 zeroext %b) declare void @test_multiret_d(i1 zeroext %b) @@ -129,10 +129,10 @@ ; Combine the last two cases: multiple returns with pointer bitcasts. ; CHECK: define i32* @test_multiptrret_a( -; CHECK: musttail call i8* @test_multiptrret_c( +; CHECK: musttail call i8* @test_multiptrret_d( ; CHECK-NEXT: bitcast i8* {{.*}} to i32* ; CHECK-NEXT: ret i32* -; CHECK: musttail call i8* @test_multiptrret_d( +; CHECK: musttail call i8* @test_multiptrret_c( ; CHECK-NEXT: bitcast i8* {{.*}} to i32* ; CHECK-NEXT: ret i32* Index: llvm/test/Transforms/Inline/inline_inv_group.ll =================================================================== --- llvm/test/Transforms/Inline/inline_inv_group.ll +++ llvm/test/Transforms/Inline/inline_inv_group.ll @@ -14,8 +14,9 @@ ret ptr %1 } -define ptr @caller() { -; CHECK-LABEL: define ptr @caller() { +define ptr @caller() null_pointer_is_valid { +; CHECK-LABEL: define ptr @caller +; CHECK-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-NEXT: [[TMP1:%.*]] = call ptr @llvm.strip.invariant.group.p0(ptr null) ; CHECK-NEXT: ret ptr [[TMP1]] ; Index: llvm/test/Transforms/Inline/inline_invoke.ll =================================================================== --- llvm/test/Transforms/Inline/inline_invoke.ll +++ llvm/test/Transforms/Inline/inline_invoke.ll @@ -92,8 +92,6 @@ ; CHECK: [[B:%.*]] = alloca %struct.A, ; CHECK: invoke void @_ZN1AC1Ev(ptr [[A]]) ; CHECK: invoke void @_ZN1AC1Ev(ptr [[B]]) -; CHECK: invoke void @_ZN1AD1Ev(ptr [[B]]) -; CHECK: invoke void @_ZN1AD1Ev(ptr [[A]]) ; CHECK: landingpad { ptr, i32 } ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch ptr @_ZTIi @@ -101,6 +99,8 @@ ; CHECK-NEXT: to label %[[LBL:[^\s]+]] unwind ; CHECK: [[LBL]]: ; CHECK-NEXT: br label %[[LPAD:[^\s]+]] +; CHECK: invoke void @_ZN1AD1Ev(ptr [[B]]) +; CHECK: invoke void @_ZN1AD1Ev(ptr [[A]]) ; CHECK: ret void ; CHECK: landingpad { ptr, i32 } ; CHECK-NEXT: catch ptr @_ZTIi @@ -157,10 +157,6 @@ ; CHECK-NEXT: unwind label %[[LPAD:[^\s]+]] ; CHECK: invoke void @_ZN1AC1Ev(ptr [[B1]]) ; CHECK-NEXT: unwind label %[[LPAD1:[^\s]+]] -; CHECK: invoke void @_ZN1AD1Ev(ptr [[B1]]) -; CHECK-NEXT: unwind label %[[LPAD1]] -; CHECK: invoke void @_ZN1AD1Ev(ptr [[A1]]) -; CHECK-NEXT: unwind label %[[LPAD]] ; Inner landing pad from first inlining. ; CHECK: [[LPAD1]]: @@ -169,17 +165,21 @@ ; CHECK-NEXT: catch ptr @_ZTIi ; CHECK-NEXT: invoke void @_ZN1AD1Ev(ptr [[A1]]) ; CHECK-NEXT: to label %[[RESUME1:[^\s]+]] unwind + ; CHECK: [[RESUME1]]: ; CHECK-NEXT: br label %[[LPAD_JOIN1:[^\s]+]] +; CHECK: invoke void @_ZN1AD1Ev(ptr [[B1]]) +; CHECK-NEXT: unwind label %[[LPAD1]] +; CHECK: invoke void @_ZN1AD1Ev(ptr [[A1]]) +; CHECK-NEXT: unwind label %[[LPAD]] + + + ; CHECK: invoke void @_ZN1AC1Ev(ptr [[A2]]) ; CHECK-NEXT: unwind label %[[LPAD]] ; CHECK: invoke void @_ZN1AC1Ev(ptr [[B2]]) ; CHECK-NEXT: unwind label %[[LPAD2:[^\s]+]] -; CHECK: invoke void @_ZN1AD1Ev(ptr [[B2]]) -; CHECK-NEXT: unwind label %[[LPAD2]] -; CHECK: invoke void @_ZN1AD1Ev(ptr [[A2]]) -; CHECK-NEXT: unwind label %[[LPAD]] ; Inner landing pad from second inlining. ; CHECK: [[LPAD2]]: @@ -191,6 +191,11 @@ ; CHECK: [[RESUME2]]: ; CHECK-NEXT: br label %[[LPAD_JOIN2:[^\s]+]] +; CHECK: invoke void @_ZN1AD1Ev(ptr [[B2]]) +; CHECK-NEXT: unwind label %[[LPAD2]] +; CHECK: invoke void @_ZN1AD1Ev(ptr [[A2]]) +; CHECK-NEXT: unwind label %[[LPAD]] + ; CHECK: ret void ; CHECK: [[LPAD]]: Index: llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll =================================================================== --- llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll +++ llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll @@ -18,7 +18,7 @@ define void @caller(i32 %a, i32 %b) #1 { ; CHECK: Function Attrs: noinline ; CHECK-LABEL: define {{[^@]+}}@caller -; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) [[ATTR1:#.*]] { +; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) [[ATTR1:#[0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[FOR_COND:%.*]] ; CHECK: for.cond: @@ -29,7 +29,7 @@ ; CHECK: for.end: ; CHECK-NEXT: br label [[FOR_COND_I:%.*]] ; CHECK: for.cond.i: - ; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP0:![0-9]+]] +; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: callee.exit: ; CHECK-NEXT: ret void ; @@ -239,28 +239,28 @@ ; CHECK-NEXT: store i32 5, ptr [[B_ADDR_I]], align 4 ; CHECK-NEXT: br label [[FOR_COND_I:%.*]] ; CHECK: for.cond.i: -; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 -; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 -; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 +; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]] ; CHECK-NEXT: br i1 [[CMP_I]], label [[FOR_BODY_I:%.*]], label [[FOR_END_I:%.*]] -; CHECK: for.body.i: - ; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: for.end.i: ; CHECK-NEXT: store i32 0, ptr [[I_I]], align 4 ; CHECK-NEXT: br label [[FOR_COND1_I:%.*]] ; CHECK: for.cond1.i: -; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[I_I]], align 4 -; CHECK-NEXT: [[CMP2_I:%.*]] = icmp slt i32 [[TMP9]], 10 +; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[I_I]], align 4 +; CHECK-NEXT: [[CMP2_I:%.*]] = icmp slt i32 [[TMP6]], 10 ; CHECK-NEXT: br i1 [[CMP2_I]], label [[FOR_BODY3_I:%.*]], label [[FOR_END4_I:%.*]] -; CHECK: for.body3.i: -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I_I]], align 4 -; CHECK-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP10]], 1 -; CHECK-NEXT: store i32 [[INC_I]], ptr [[I_I]], align 4 -; CHECK-NEXT: br label [[FOR_COND1_I]], !llvm.loop [[LOOP3:![0-9]+]] ; CHECK: for.end4.i: ; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]] ; CHECK: while.body.i: ; CHECK-NEXT: br label [[WHILE_BODY_I]] +; CHECK: for.body3.i: +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[I_I]], align 4 +; CHECK-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP7]], 1 +; CHECK-NEXT: store i32 [[INC_I]], ptr [[I_I]], align 4 +; CHECK-NEXT: br label [[FOR_COND1_I]], !llvm.loop [[LOOP3:![0-9]+]] +; CHECK: for.body.i: +; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: callee_multiple.exit: ; CHECK-NEXT: ret void ; @@ -408,37 +408,37 @@ ; CHECK-NEXT: store i32 5, ptr [[B_ADDR_I]], align 4 ; CHECK-NEXT: br label [[FOR_COND_I:%.*]] ; CHECK: for.cond.i: -; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 -; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]] +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 +; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[TMP8]], [[TMP9]] ; CHECK-NEXT: br i1 [[CMP_I]], label [[FOR_BODY_I:%.*]], label [[FOR_END_I:%.*]] -; CHECK: for.body.i: -; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP0]] ; CHECK: for.end.i: ; CHECK-NEXT: store i32 0, ptr [[I_I]], align 4 ; CHECK-NEXT: br label [[FOR_COND1_I:%.*]] ; CHECK: for.cond1.i: -; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I_I]], align 4 -; CHECK-NEXT: [[CMP2_I:%.*]] = icmp slt i32 [[TMP13]], 10 +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I_I]], align 4 +; CHECK-NEXT: [[CMP2_I:%.*]] = icmp slt i32 [[TMP10]], 10 ; CHECK-NEXT: br i1 [[CMP2_I]], label [[FOR_BODY3_I:%.*]], label [[FOR_END8_I:%.*]] +; CHECK: for.end8.i: +; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]] +; CHECK: while.body.i: +; CHECK-NEXT: br label [[WHILE_BODY_I]] ; CHECK: for.body3.i: ; CHECK-NEXT: br label [[FOR_COND4_I:%.*]] ; CHECK: for.cond4.i: -; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 -; CHECK-NEXT: [[CMP5_I:%.*]] = icmp slt i32 [[TMP14]], [[TMP15]] +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[B_ADDR_I]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR_I]], align 4 +; CHECK-NEXT: [[CMP5_I:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]] ; CHECK-NEXT: br i1 [[CMP5_I]], label [[FOR_BODY6_I:%.*]], label [[FOR_END7_I:%.*]] -; CHECK: for.body6.i: - ; CHECK-NEXT: br label [[FOR_COND4_I]], !llvm.loop [[LOOP2:![0-9]+]] ; CHECK: for.end7.i: -; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[I_I]], align 4 -; CHECK-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP16]], 1 +; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I_I]], align 4 +; CHECK-NEXT: [[INC_I:%.*]] = add nsw i32 [[TMP13]], 1 ; CHECK-NEXT: store i32 [[INC_I]], ptr [[I_I]], align 4 ; CHECK-NEXT: br label [[FOR_COND1_I]], !llvm.loop [[LOOP4:![0-9]+]] -; CHECK: for.end8.i: -; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]] -; CHECK: while.body.i: -; CHECK-NEXT: br label [[WHILE_BODY_I]] +; CHECK: for.body6.i: +; CHECK-NEXT: br label [[FOR_COND4_I]], !llvm.loop [[LOOP2]] +; CHECK: for.body.i: +; CHECK-NEXT: br label [[FOR_COND_I]], !llvm.loop [[LOOP0]] ; CHECK: callee_nested.exit: ; CHECK-NEXT: ret void ; Index: llvm/test/Transforms/Inline/noalias-calls2.ll =================================================================== --- llvm/test/Transforms/Inline/noalias-calls2.ll +++ llvm/test/Transforms/Inline/noalias-calls2.ll @@ -81,9 +81,6 @@ ; CHECK-NEXT: store i32 20, ptr [[ADD_PTR1_I]], align 4, !alias.scope !28, !noalias !27 ; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[CNT]], 0 ; CHECK-NEXT: br i1 [[CMP_I]], label [[IF_THEN_I:%.*]], label [[IF_ELSE_I:%.*]] -; CHECK: if.then.i: -; CHECK-NEXT: store i32 11, ptr [[ADD_PTR]], align 4, !alias.scope !17, !noalias !20 -; CHECK-NEXT: br label [[CALLER_EQUALS_CALLEE_EXIT:%.*]] ; CHECK: if.else.i: ; CHECK-NEXT: [[ADD_PTR2_I:%.*]] = getelementptr inbounds i32, ptr [[ADD_PTR1]], i64 1 ; CHECK-NEXT: [[ADD_PTR3_I:%.*]] = getelementptr inbounds i32, ptr [[ADD_PTR]], i64 1 @@ -97,6 +94,9 @@ ; CHECK-NEXT: store i32 20, ptr [[ADD_PTR1_I_I]], align 4, !alias.scope !40, !noalias !39 ; CHECK-NEXT: store i32 11, ptr [[ADD_PTR2_I]], align 4, !alias.scope !41, !noalias !42 ; CHECK-NEXT: store i32 12, ptr [[ADD_PTR1]], align 4, !alias.scope !20, !noalias !17 +; CHECK-NEXT: br label [[CALLER_EQUALS_CALLEE_EXIT:%.*]] +; CHECK: if.then.i: +; CHECK-NEXT: store i32 11, ptr [[ADD_PTR]], align 4, !alias.scope !17, !noalias !20 ; CHECK-NEXT: br label [[CALLER_EQUALS_CALLEE_EXIT]] ; CHECK: caller_equals_callee.exit: ; CHECK-NEXT: ret void Index: llvm/test/Transforms/Inline/nonnull.ll =================================================================== --- llvm/test/Transforms/Inline/nonnull.ll +++ llvm/test/Transforms/Inline/nonnull.ll @@ -77,6 +77,9 @@ ; CHECK-SAME: (ptr [[ARG:%.*]]) { ; CHECK-NEXT: [[CMP_I:%.*]] = icmp eq ptr [[ARG]], null ; CHECK-NEXT: br i1 [[CMP_I]], label [[EXPENSIVE_I:%.*]], label [[DONE_I:%.*]] +; CHECK: done.i: +; CHECK-NEXT: call void @bar() +; CHECK-NEXT: br label [[CALLEE_EXIT:%.*]] ; CHECK: expensive.i: ; CHECK-NEXT: call void @foo() ; CHECK-NEXT: call void @foo() @@ -88,9 +91,6 @@ ; CHECK-NEXT: call void @foo() ; CHECK-NEXT: call void @foo() ; CHECK-NEXT: call void @foo() -; CHECK-NEXT: br label [[CALLEE_EXIT:%.*]] -; CHECK: done.i: -; CHECK-NEXT: call void @bar() ; CHECK-NEXT: br label [[CALLEE_EXIT]] ; CHECK: callee.exit: ; CHECK-NEXT: ret void Index: llvm/test/Transforms/Inline/ret_attr_update.ll =================================================================== --- llvm/test/Transforms/Inline/ret_attr_update.ll +++ llvm/test/Transforms/Inline/ret_attr_update.ll @@ -57,12 +57,12 @@ ; CHECK-NEXT: [[R_I1:%.*]] = call ptr @bar(ptr [[GEP]]) ; CHECK-NEXT: [[COND_I2:%.*]] = icmp ne ptr [[R_I1]], null ; CHECK-NEXT: br i1 [[COND_I2]], label [[RET_I:%.*]], label [[ORIG_I:%.*]] -; CHECK: ret.i: -; CHECK-NEXT: br label [[CALLEE_WITH_EXPLICIT_CONTROL_FLOW_EXIT:%.*]] ; CHECK: orig.i: +; CHECK-NEXT: br label [[CALLEE_WITH_EXPLICIT_CONTROL_FLOW_EXIT:%.*]] +; CHECK: ret.i: ; CHECK-NEXT: br label [[CALLEE_WITH_EXPLICIT_CONTROL_FLOW_EXIT]] ; CHECK: callee_with_explicit_control_flow.exit: -; CHECK-NEXT: [[Q3:%.*]] = phi ptr [ [[R_I1]], [[RET_I]] ], [ [[GEP]], [[ORIG_I]] ] +; CHECK-NEXT: [[Q3:%.*]] = phi ptr [ [[GEP]], [[ORIG_I]] ], [ [[R_I1]], [[RET_I]] ] ; CHECK-NEXT: br i1 [[COND:%.*]], label [[PRET:%.*]], label [[QRET:%.*]] ; CHECK: pret: ; CHECK-NEXT: ret ptr [[R_I]] @@ -179,14 +179,14 @@ ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, ptr [[PTR:%.*]], i64 [[X:%.*]] ; CHECK-NEXT: br i1 [[COND:%.*]], label [[PASS_I:%.*]], label [[FAIL_I:%.*]] -; CHECK: pass.i: -; CHECK-NEXT: [[R_I:%.*]] = call nonnull ptr @foo(ptr noalias [[GEP]]) -; CHECK-NEXT: br label [[CALLEE7_EXIT:%.*]] ; CHECK: fail.i: ; CHECK-NEXT: [[S_I:%.*]] = call nonnull ptr @baz(ptr [[GEP]]) +; CHECK-NEXT: br label [[CALLEE7_EXIT:%.*]] +; CHECK: pass.i: +; CHECK-NEXT: [[R_I:%.*]] = call nonnull ptr @foo(ptr noalias [[GEP]]) ; CHECK-NEXT: br label [[CALLEE7_EXIT]] ; CHECK: callee7.exit: -; CHECK-NEXT: [[T1:%.*]] = phi ptr [ [[R_I]], [[PASS_I]] ], [ [[S_I]], [[FAIL_I]] ] +; CHECK-NEXT: [[T1:%.*]] = phi ptr [ [[S_I]], [[FAIL_I]] ], [ [[R_I]], [[PASS_I]] ] ; CHECK-NEXT: call void @snort(ptr [[T1]]) ; CHECK-NEXT: ret void ; Index: llvm/test/Transforms/Inline/simplify-instruction-computeKnownFPClass-context.ll =================================================================== --- llvm/test/Transforms/Inline/simplify-instruction-computeKnownFPClass-context.ll +++ llvm/test/Transforms/Inline/simplify-instruction-computeKnownFPClass-context.ll @@ -30,8 +30,7 @@ ; CHECK-LABEL: define i1 @simplify_fcmp_ord_fdiv_caller ; CHECK-SAME: (double nofpclass(nan inf zero) [[I0:%.*]], double nofpclass(nan inf zero) [[I1:%.*]]) { ; CHECK-NEXT: [[SUB_DOUBLE_SUB_I:%.*]] = fdiv double [[I0]], [[I1]] -; CHECK-NEXT: [[CMP_I:%.*]] = fcmp ord double [[SUB_DOUBLE_SUB_I]], 0.000000e+00 -; CHECK-NEXT: ret i1 [[CMP_I]] +; CHECK-NEXT: ret i1 true ; %call = call i1 @simplify_fcmp_ord_fdiv_callee(double %i0, double %i1) ret i1 %call @@ -48,8 +47,7 @@ ; CHECK-LABEL: define i1 @simplify_fcmp_ord_frem_caller ; CHECK-SAME: (double nofpclass(nan inf zero) [[I0:%.*]], double nofpclass(nan inf zero) [[I1:%.*]]) { ; CHECK-NEXT: [[SUB_DOUBLE_SUB_I:%.*]] = frem double [[I0]], [[I1]] -; CHECK-NEXT: [[CMP_I:%.*]] = fcmp ord double [[SUB_DOUBLE_SUB_I]], 0.000000e+00 -; CHECK-NEXT: ret i1 [[CMP_I]] +; CHECK-NEXT: ret i1 true ; %call = call i1 @simplify_fcmp_ord_frem_callee(double %i0, double %i1) ret i1 %call @@ -66,8 +64,7 @@ ; CHECK-LABEL: define i1 @simplify_fcmp_ord_fmul_caller ; CHECK-SAME: (double nofpclass(nan zero) [[I0:%.*]], double nofpclass(nan zero) [[I1:%.*]]) { ; CHECK-NEXT: [[SUB_DOUBLE_SUB_I:%.*]] = fmul double [[I0]], [[I1]] -; CHECK-NEXT: [[CMP_I:%.*]] = fcmp ord double [[SUB_DOUBLE_SUB_I]], 0.000000e+00 -; CHECK-NEXT: ret i1 [[CMP_I]] +; CHECK-NEXT: ret i1 true ; %call = call i1 @simplify_fcmp_ord_fmul_callee(double %i0, double %i1) ret i1 %call Index: llvm/test/Transforms/LoopRotate/pr56260.ll =================================================================== --- llvm/test/Transforms/LoopRotate/pr56260.ll +++ llvm/test/Transforms/LoopRotate/pr56260.ll @@ -14,18 +14,17 @@ ; CHECK: L0.preheader: ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, 0 ; CHECK-NEXT: [[INC:%.*]] = zext i1 [[CMP]] to i32 -; CHECK-NEXT: [[SPEC_SELECT1:%.*]] = add nsw i32 0, [[INC]] -; CHECK-NEXT: [[TOBOOL3_NOT2:%.*]] = icmp eq i32 [[SPEC_SELECT1]], 0 -; CHECK-NEXT: br i1 [[TOBOOL3_NOT2]], label [[L0_PREHEADER_LOOPEXIT]], label [[L1_PREHEADER_LR_PH:%.*]] +; CHECK-NEXT: [[TOBOOL3_NOT1:%.*]] = icmp eq i32 [[INC]], 0 +; CHECK-NEXT: br i1 [[TOBOOL3_NOT1]], label [[L0_PREHEADER_LOOPEXIT]], label [[L1_PREHEADER_LR_PH:%.*]] ; CHECK: L1.preheader.lr.ph: ; CHECK-NEXT: br label [[L1_PREHEADER:%.*]] ; CHECK: L1.preheader: -; CHECK-NEXT: [[SPEC_SELECT4:%.*]] = phi i32 [ [[SPEC_SELECT1]], [[L1_PREHEADER_LR_PH]] ], [ [[SPEC_SELECT:%.*]], [[L0_LATCH:%.*]] ] -; CHECK-NEXT: [[K_03:%.*]] = phi i32 [ 0, [[L1_PREHEADER_LR_PH]] ], [ [[SPEC_SELECT4]], [[L0_LATCH]] ] -; CHECK-NEXT: [[TOBOOL8_NOT:%.*]] = icmp eq i32 [[K_03]], 0 +; CHECK-NEXT: [[SPEC_SELECT3:%.*]] = phi i32 [ [[INC]], [[L1_PREHEADER_LR_PH]] ], [ [[SPEC_SELECT:%.*]], [[L0_LATCH:%.*]] ] +; CHECK-NEXT: [[K_02:%.*]] = phi i32 [ 0, [[L1_PREHEADER_LR_PH]] ], [ [[SPEC_SELECT3]], [[L0_LATCH]] ] +; CHECK-NEXT: [[TOBOOL8_NOT:%.*]] = icmp eq i32 [[K_02]], 0 ; CHECK-NEXT: br label [[L0_LATCH]] ; CHECK: L0.latch: -; CHECK-NEXT: [[SPEC_SELECT]] = add nsw i32 [[SPEC_SELECT4]], [[INC]] +; CHECK-NEXT: [[SPEC_SELECT]] = add nsw i32 [[SPEC_SELECT3]], [[INC]] ; CHECK-NEXT: [[TOBOOL3_NOT:%.*]] = icmp eq i32 [[SPEC_SELECT]], 0 ; CHECK-NEXT: br i1 [[TOBOOL3_NOT]], label [[L0_L0_PREHEADER_LOOPEXIT_CRIT_EDGE:%.*]], label [[L1_PREHEADER]] ; Index: llvm/test/Transforms/PartialInlining/switch_stmt.ll =================================================================== --- llvm/test/Transforms/PartialInlining/switch_stmt.ll +++ llvm/test/Transforms/PartialInlining/switch_stmt.ll @@ -11,7 +11,7 @@ ; CHECK-NEXT: i32 0, label [[SW_BB:%.*]] ; CHECK-NEXT: i32 1, label [[SW_BB1:%.*]] ; CHECK-NEXT: i32 2, label [[SW_BB2:%.*]] -; CHECK-NEXT: ], !prof !31 +; CHECK-NEXT: ], !prof [[PROF31:![0-9]+]] ; CHECK: sw.bb: ; CHECK-NEXT: store i32 1, ptr [[RC]], align 4 ; CHECK-NEXT: br label [[SW_EPILOG:%.*]] @@ -68,22 +68,23 @@ ; CHECK-NEXT: i32 0, label [[CODEREPL_I:%.*]] ; CHECK-NEXT: i32 1, label [[SW_BB1_I:%.*]] ; CHECK-NEXT: i32 2, label [[CODEREPL1_I:%.*]] -; CHECK-NEXT: ], !prof !31 -; CHECK: codeRepl.i: -; CHECK-NEXT: call void @callee.1.sw.bb(ptr [[RC_I]]) +; CHECK-NEXT: ], !prof [[PROF31]] +; CHECK: codeRepl1.i: +; CHECK-NEXT: call void @callee.1.sw.bb2(ptr [[RC_I]]) ; CHECK-NEXT: br label [[CALLEE_1_EXIT:%.*]] ; CHECK: sw.bb1.i: ; CHECK-NEXT: store i32 2, ptr [[RC_I]], align 4 ; CHECK-NEXT: br label [[CALLEE_1_EXIT]] -; CHECK: codeRepl1.i: -; CHECK-NEXT: call void @callee.1.sw.bb2(ptr [[RC_I]]) +; CHECK: codeRepl.i: +; CHECK-NEXT: call void @callee.1.sw.bb(ptr [[RC_I]]) ; CHECK-NEXT: br label [[CALLEE_1_EXIT]] ; CHECK: sw.default.i: ; CHECK-NEXT: store i32 [[C]], ptr [[RC_I]], align 4 ; CHECK-NEXT: br label [[CALLEE_1_EXIT]] ; CHECK: callee.1.exit: -; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[RC_I]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[RC_I]], align 4 ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[RC_I]]) +; CHECK-NEXT: ret i32 [[TMP0]] ; entry: %0 = call signext i32 @callee(i32 signext %c, i32 signext %c) Index: llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll =================================================================== --- llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll +++ llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll @@ -27,8 +27,8 @@ ; INLINE-ALL-NEXT: Getting callee context for instr: %call.i = tail call i32 @_Z8funcLeafi ; INLINE-ALL-NEXT: Callee context found: main:3 @ _Z5funcAi:1 @ _Z8funcLeafi ; INLINE-ALL-NEXT: Marking context profile as inlined: main:3 @ _Z5funcAi:1 @ _Z8funcLeafi -; INLINE-ALL-NEXT: Getting callee context for instr: %call.i1 = tail call i32 @_Z3fibi ; INLINE-ALL-NEXT: Getting callee context for instr: %call5.i = tail call i32 @_Z3fibi +; INLINE-ALL-NEXT: Getting callee context for instr: %call.i2 = tail call i32 @_Z3fibi ; INLINE-ALL-DAG: Getting base profile for function: _Z5funcAi ; INLINE-ALL-DAG-NEXT: Merging context profile into base profile: _Z5funcAi ; INLINE-ALL-DAG: Getting base profile for function: _Z5funcBi Index: llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll =================================================================== --- llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll +++ llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll @@ -24,11 +24,11 @@ ;; Check code from the inlining of zen is properly annotated here. ; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2:]], i64 1, i32 0, i64 -1) ; CHECK: br i1 %cmp.i, label %while.cond.i, label %while.cond2.i, !dbg ![[#]], !prof ![[PD1:[0-9]+]] +; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 4, i32 0, i64 -1) +; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 5, i32 0, i64 -1) ; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 2, i32 0, i64 -1) ; CHECK: br i1 %cmp1.i, label %while.body.i, label %zen.exit, !dbg ![[#]], !prof ![[PD2:[0-9]+]] ; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 3, i32 0, i64 -1) -; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 4, i32 0, i64 -1) -; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 5, i32 0, i64 -1) ; CHECK: call void @llvm.pseudoprobe(i64 [[#GUID2]], i64 6, i32 0, i64 -1) ; CHECK-NOT: call i32 @zen %call = call i32 @zen(i32 %add), !dbg !20 @@ -140,6 +140,10 @@ ;YAML-NEXT: - OriginalSamples: '23' ;YAML-NEXT: - String: ')' ;YAML-NEXT: ... + +;YAML: --- !Analysis +;YAML: --- !Analysis + ;YAML: --- !Analysis ;YAML-NEXT: Pass: sample-profile ;YAML-NEXT: Name: AppliedSamples Index: llvm/test/Transforms/SimplifyCFG/pr46638.ll =================================================================== --- llvm/test/Transforms/SimplifyCFG/pr46638.ll +++ llvm/test/Transforms/SimplifyCFG/pr46638.ll @@ -15,9 +15,7 @@ ; CHECK: common.ret: ; CHECK-NEXT: ret void ; CHECK: true2.critedge: -; CHECK-NEXT: [[CMP2_C:%.*]] = icmp sgt i32 [[X]], 0 -; CHECK-NEXT: [[EXT_C:%.*]] = zext i1 [[CMP2_C]] to i32 -; CHECK-NEXT: call void @dummy(i32 [[EXT_C]]) +; CHECK-NEXT: call void @dummy(i32 0) ; CHECK-NEXT: call void @dummy(i32 2) ; CHECK-NEXT: br label [[COMMON_RET]] ;