diff --git a/mlir/python/mlir/ir.py b/mlir/python/mlir/ir.py
--- a/mlir/python/mlir/ir.py
+++ b/mlir/python/mlir/ir.py
@@ -27,7 +27,7 @@
 
 
 @register_attribute_builder("I16Attr")
-def _i32Attr(x, context):
+def _i16Attr(x, context):
   return IntegerAttr.get(IntegerType.get_signless(16, context=context), x)
 
 
@@ -40,6 +40,21 @@
 def _i64Attr(x, context):
   return IntegerAttr.get(IntegerType.get_signless(64, context=context), x)
 
+@register_attribute_builder("SI16Attr")
+def _si16Attr(x, context):
+  return IntegerAttr.get(IntegerType.get_signed(16, context=context), x)
+
+@register_attribute_builder("SI32Attr")
+def _si32Attr(x, context):
+  return IntegerAttr.get(IntegerType.get_signed(32, context=context), x)
+
+@register_attribute_builder("F32Attr")
+def _f32Attr(x, context):
+  return FloatAttr.get_f32(x, context=context)
+
+@register_attribute_builder("F64Attr")
+def _f64Attr(x, context):
+  return FloatAttr.get_f64(x, context=context)
 
 @register_attribute_builder("StrAttr")
 def _stringAttr(x, context):
@@ -60,11 +75,21 @@
 def _arrayAttr(x, context):
   return ArrayAttr.get(x, context=context)
 
+@register_attribute_builder("I32ArrayAttr")
+def _i32ArrayAttr(x, context):
+  return ArrayAttr.get([_i32Attr(v, context) for v in x])
 
 @register_attribute_builder("I64ArrayAttr")
 def _i64ArrayAttr(x, context):
   return ArrayAttr.get([_i64Attr(v, context) for v in x])
 
+@register_attribute_builder("F32ArrayAttr")
+def _f32ArrayAttr(x, context):
+  return ArrayAttr.get([_f32Attr(v, context) for v in x])
+
+@register_attribute_builder("F64ArrayAttr")
+def _f64ArrayAttr(x, context):
+  return ArrayAttr.get([_f64Attr(v, context) for v in x])
 
 @register_attribute_builder("DenseI64ArrayAttr")
 def _denseI64ArrayAttr(x, context):