diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -799,10 +799,10 @@ def _N_Z : SInst; } -defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad", "aarch64_sve_mad">; -defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla", "aarch64_sve_mla">; -defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls", "aarch64_sve_mls">; -defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb", "aarch64_sve_msb">; +defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad", "aarch64_sve_mla_u", [ReverseMergeAnyAccOp]>; +defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla", "aarch64_sve_mla_u">; +defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls", "aarch64_sve_mls_u">; +defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb", "aarch64_sve_mls_u", [ReverseMergeAnyAccOp]>; //------------------------------------------------------------------------------ diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmad_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmad_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmad_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmad_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmad_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmad_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmad_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmad_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmad_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmad_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmad_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmad_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmad_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmad_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmad_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmad_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmad_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmad_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmad_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmad_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmad_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmad_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmad_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmad_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmad_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmla_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmla_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmla_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmla_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmla_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmla_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmla_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmla_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmla_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmla_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmla_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmla_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmla_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmla_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmla_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmla_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmla_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmla_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmla_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmla_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmla_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmla_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmla_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmla_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mla.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmla_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmls_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmls_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmls_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmls_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmls_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmls_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmls_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmls_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmls_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmls_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmls_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmls_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmls_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmls_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmls_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmls_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmls_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmls_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmls_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmls_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmls_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmls_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmls_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmls_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmls_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -296,12 +296,12 @@ // CHECK-LABEL: @test_svmsb_s8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmsb_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) @@ -312,13 +312,13 @@ // CHECK-LABEL: @test_svmsb_s16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmsb_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) @@ -329,13 +329,13 @@ // CHECK-LABEL: @test_svmsb_s32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmsb_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) @@ -346,13 +346,13 @@ // CHECK-LABEL: @test_svmsb_s64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmsb_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) @@ -362,12 +362,12 @@ // CHECK-LABEL: @test_svmsb_u8_x( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z15test_svmsb_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmsb_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) @@ -378,13 +378,13 @@ // CHECK-LABEL: @test_svmsb_u16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmsb_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) @@ -395,13 +395,13 @@ // CHECK-LABEL: @test_svmsb_u32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmsb_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) @@ -412,13 +412,13 @@ // CHECK-LABEL: @test_svmsb_u64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmsb_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) @@ -774,14 +774,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svint8_t test_svmsb_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) @@ -794,7 +794,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( @@ -802,7 +802,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint16_t test_svmsb_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) @@ -815,7 +815,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( @@ -823,7 +823,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint32_t test_svmsb_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) @@ -836,7 +836,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( @@ -844,7 +844,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svint64_t test_svmsb_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) @@ -856,14 +856,14 @@ // CHECK-NEXT: entry: // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP0]] // // CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i8 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv16i8( [[PG:%.*]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] // svuint8_t test_svmsb_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) @@ -876,7 +876,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( @@ -884,7 +884,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i16 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv8i16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint16_t test_svmsb_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) @@ -897,7 +897,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( @@ -905,7 +905,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i32 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv4i32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint32_t test_svmsb_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) @@ -918,7 +918,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( @@ -926,7 +926,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, i64 [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.mls.u.nxv2i64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svuint64_t test_svmsb_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) diff --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td --- a/llvm/include/llvm/IR/IntrinsicsAArch64.td +++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td @@ -1661,8 +1661,10 @@ def int_aarch64_sve_mad : AdvSIMD_Pred3VectorArg_Intrinsic; def int_aarch64_sve_msb : AdvSIMD_Pred3VectorArg_Intrinsic; def int_aarch64_sve_mla : AdvSIMD_Pred3VectorArg_Intrinsic; +def int_aarch64_sve_mla_u : AdvSIMD_Pred3VectorArg_Intrinsic; def int_aarch64_sve_mla_lane : AdvSIMD_3VectorArgIndexed_Intrinsic; def int_aarch64_sve_mls : AdvSIMD_Pred3VectorArg_Intrinsic; +def int_aarch64_sve_mls_u : AdvSIMD_Pred3VectorArg_Intrinsic; def int_aarch64_sve_mls_lane : AdvSIMD_3VectorArgIndexed_Intrinsic; def int_aarch64_sve_saddv : AdvSIMD_SVE_SADDV_Reduce_Intrinsic; diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -411,13 +411,15 @@ (add node:$op1, (vselect node:$pred, (AArch64mul_p_oneuse (SVEAllActive), node:$op2, node:$op3), (SVEDup0)))]>; // pattern for generating pseudo for MLA_ZPmZZ/MAD_ZPmZZ def AArch64mla_p : PatFrags<(ops node:$pred, node:$op1, node:$op2, node:$op3), - [(add node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3))]>; + [(int_aarch64_sve_mla_u node:$pred, node:$op1, node:$op2, node:$op3), + (add node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3))]>; def AArch64mls_m1 : PatFrags<(ops node:$pred, node:$op1, node:$op2, node:$op3), [(int_aarch64_sve_mls node:$pred, node:$op1, node:$op2, node:$op3), // sub(a, select(mask, mul(b, c), splat(0))) -> mls(a, mask, b, c) (sub node:$op1, (vselect node:$pred, (AArch64mul_p_oneuse (SVEAllActive), node:$op2, node:$op3), (SVEDup0)))]>; def AArch64mls_p : PatFrags<(ops node:$pred, node:$op1, node:$op2, node:$op3), - [(sub node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3))]>; + [(int_aarch64_sve_mls_u node:$pred, node:$op1, node:$op2, node:$op3), + (sub node:$op1, (AArch64mul_p_oneuse node:$pred, node:$op2, node:$op3))]>; def AArch64eor3 : PatFrags<(ops node:$op1, node:$op2, node:$op3), [(int_aarch64_sve_eor3 node:$op1, node:$op2, node:$op3), (xor node:$op1, (xor node:$op2, node:$op3))]>; diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -1628,6 +1628,10 @@ return instCombineSVEVectorFuseMulAddSub( IC, II, true); + case Intrinsic::aarch64_sve_add_u: + return instCombineSVEVectorFuseMulAddSub( + IC, II, true); case Intrinsic::aarch64_sve_fsub: case Intrinsic::aarch64_sve_sub: return instCombineSVEVectorSub(IC, II); @@ -1635,6 +1639,10 @@ return instCombineSVEVectorFuseMulAddSub( IC, II, true); + case Intrinsic::aarch64_sve_sub_u: + return instCombineSVEVectorFuseMulAddSub( + IC, II, true); case Intrinsic::aarch64_sve_tbl: return instCombineSVETBL(IC, II); case Intrinsic::aarch64_sve_uunpkhi: diff --git a/llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll b/llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll --- a/llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll +++ b/llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll @@ -108,6 +108,110 @@ ret %out } +; +; MLA +; + +define @mla_i8( %pg, %a, %b, %c) { +; CHECK-LABEL: mla_i8: +; CHECK: // %bb.0: +; CHECK-NEXT: mla z0.b, p0/m, z1.b, z2.b +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mla.u.nxv16i8( %pg, + %a, + %b, + %c) + ret %out +} + +define @mla_i16( %pg, %a, %b, %c) { +; CHECK-LABEL: mla_i16: +; CHECK: // %bb.0: +; CHECK-NEXT: mla z0.h, p0/m, z1.h, z2.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mla.u.nxv8i16( %pg, + %a, + %b, + %c) + ret %out +} + +define @mla_i32( %pg, %a, %b, %c) { +; CHECK-LABEL: mla_i32: +; CHECK: // %bb.0: +; CHECK-NEXT: mla z0.s, p0/m, z1.s, z2.s +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mla.u.nxv4i32( %pg, + %a, + %b, + %c) + ret %out +} + +define @mla_i64( %pg, %a, %b, %c) { +; CHECK-LABEL: mla_i64: +; CHECK: // %bb.0: +; CHECK-NEXT: mla z0.d, p0/m, z1.d, z2.d +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mla.u.nxv2i64( %pg, + %a, + %b, + %c) + ret %out +} + +; +; MLS +; + +define @mls_i8( %pg, %a, %b, %c) { +; CHECK-LABEL: mls_i8: +; CHECK: // %bb.0: +; CHECK-NEXT: mls z0.b, p0/m, z1.b, z2.b +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mls.u.nxv16i8( %pg, + %a, + %b, + %c) + ret %out +} + +define @mls_i16( %pg, %a, %b, %c) { +; CHECK-LABEL: mls_i16: +; CHECK: // %bb.0: +; CHECK-NEXT: mls z0.h, p0/m, z1.h, z2.h +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mls.u.nxv8i16( %pg, + %a, + %b, + %c) + ret %out +} + +define @mls_i32( %pg, %a, %b, %c) { +; CHECK-LABEL: mls_i32: +; CHECK: // %bb.0: +; CHECK-NEXT: mls z0.s, p0/m, z1.s, z2.s +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mls.u.nxv4i32( %pg, + %a, + %b, + %c) + ret %out +} + +define @mls_i64( %pg, %a, %b, %c) { +; CHECK-LABEL: mls_i64: +; CHECK: // %bb.0: +; CHECK-NEXT: mls z0.d, p0/m, z1.d, z2.d +; CHECK-NEXT: ret + %out = call @llvm.aarch64.sve.mls.u.nxv2i64( %pg, + %a, + %b, + %c) + ret %out +} + ; ; MUL ; @@ -1200,11 +1304,22 @@ ret %out } + declare @llvm.aarch64.sve.add.u.nxv16i8(, , ) declare @llvm.aarch64.sve.add.u.nxv8i16(, , ) declare @llvm.aarch64.sve.add.u.nxv4i32(, , ) declare @llvm.aarch64.sve.add.u.nxv2i64(, , ) +declare @llvm.aarch64.sve.mla.u.nxv16i8(, , , ) +declare @llvm.aarch64.sve.mla.u.nxv8i16(, , , ) +declare @llvm.aarch64.sve.mla.u.nxv4i32(, , , ) +declare @llvm.aarch64.sve.mla.u.nxv2i64(, , , ) + +declare @llvm.aarch64.sve.mls.u.nxv16i8(, , , ) +declare @llvm.aarch64.sve.mls.u.nxv8i16(, , , ) +declare @llvm.aarch64.sve.mls.u.nxv4i32(, , , ) +declare @llvm.aarch64.sve.mls.u.nxv2i64(, , , ) + declare @llvm.aarch64.sve.mul.u.nxv16i8(, , ) declare @llvm.aarch64.sve.mul.u.nxv8i16(, , ) declare @llvm.aarch64.sve.mul.u.nxv4i32(, , ) diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll @@ -37,6 +37,16 @@ ret %2 } +define @combine_mla_i8_u( %p, %a, %b, %c) #0 { +; CHECK-LABEL: @combine_mla_i8_u( +; CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.u.nxv16i8( [[P:%.*]], [[C:%.*]], [[A:%.*]], [[B:%.*]]) +; CHECK-NEXT: ret [[TMP1]] +; + %1 = tail call @llvm.aarch64.sve.mul.u.nxv16i8( %p, %a, %b) + %2 = tail call @llvm.aarch64.sve.add.u.nxv16i8( %p, %c, %1) + ret %2 +} + define @combine_fmad( %p, %a, %b, %c) #0 { ; CHECK-LABEL: @combine_fmad( ; CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[P:%.*]]) @@ -93,6 +103,16 @@ ret %2 } +define @combine_mls_i8_u( %p, %a, %b, %c) #0 { +; CHECK-LABEL: @combine_mls_i8_u( +; CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.u.nxv16i8( [[P:%.*]], [[C:%.*]], [[A:%.*]], [[B:%.*]]) +; CHECK-NEXT: ret [[TMP1]] +; + %1 = tail call @llvm.aarch64.sve.mul.u.nxv16i8( %p, %a, %b) + %2 = tail call @llvm.aarch64.sve.sub.u.nxv16i8( %p, %c, %1) + ret %2 +} + define @combine_fnmsb( %p, %a, %b, %c) #0 { ; CHECK-LABEL: @combine_fnmsb( ; CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[P:%.*]]) @@ -203,5 +223,8 @@ declare @llvm.aarch64.sve.mul.nxv16i8(, , ) declare @llvm.aarch64.sve.add.nxv16i8(, , ) declare @llvm.aarch64.sve.sub.nxv16i8(, , ) +declare @llvm.aarch64.sve.mul.u.nxv16i8(, , ) +declare @llvm.aarch64.sve.add.u.nxv16i8(, , ) +declare @llvm.aarch64.sve.sub.u.nxv16i8(, , ) attributes #0 = { "target-features"="+sve" }