Index: ELF/Target.cpp
===================================================================
--- ELF/Target.cpp
+++ ELF/Target.cpp
@@ -939,25 +939,29 @@
                                     uint32_t Type, uint64_t P,
                                     uint64_t SA) const {
   switch (Type) {
-  case R_AARCH64_ABS16:
-    checkIntUInt<16>(SA, Type);
-    write16le(Loc, SA);
+  case R_AARCH64_ABS64:
+    // No overflow check needed.
+    write64le(Loc, SA);
     break;
   case R_AARCH64_ABS32:
     checkIntUInt<32>(SA, Type);
     write32le(Loc, SA);
     break;
-  case R_AARCH64_ABS64:
-    // No overflow check needed.
-    write64le(Loc, SA);
+  case R_AARCH64_ABS16:
+    checkIntUInt<16>(SA, Type);
+    write16le(Loc, SA);
     break;
-  case R_AARCH64_ADD_ABS_LO12_NC:
+  case R_AARCH64_PREL64:
     // No overflow check needed.
-    // This relocation stores 12 bits and there's no instruction
-    // to do it. Instead, we do a 32 bits store of the value
-    // of r_addend bitwise-or'ed Loc. This assumes that the addend
-    // bits in Loc are zero.
-    or32le(Loc, (SA & 0xFFF) << 10);
+    write64le(Loc, SA - P);
+    break;
+  case R_AARCH64_PREL32:
+    checkIntUInt<32>(SA - P, Type);
+    write32le(Loc, SA - P);
+    break;
+  case R_AARCH64_PREL16:
+    checkIntUInt<16>(SA - P, Type);
+    write16le(Loc, SA - P);
     break;
   case R_AARCH64_ADR_PREL_LO21: {
     uint64_t X = SA - P;
@@ -965,48 +969,49 @@
     updateAArch64Adr(Loc, X & 0x1FFFFF);
     break;
   }
-  case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_ADR_PREL_PG_HI21: {
     uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
     checkInt<33>(X, Type);
     updateAArch64Adr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
   }
-  case R_AARCH64_JUMP26:
-  case R_AARCH64_CALL26: {
-    uint64_t X = SA - P;
-    checkInt<28>(X, Type);
-    or32le(Loc, (X & 0x0FFFFFFC) >> 2);
+  case R_AARCH64_ADD_ABS_LO12_NC:
+    // No overflow check needed.
+    // This relocation stores 12 bits and there's no instruction
+    // to do it. Instead, we do a 32 bits store of the value
+    // of r_addend bitwise-or'ed Loc. This assumes that the addend
+    // bits in Loc are zero.
+    or32le(Loc, (SA & 0xFFF) << 10);
     break;
-  }
-  case R_AARCH64_LDST32_ABS_LO12_NC:
+  case R_AARCH64_LDST8_ABS_LO12_NC:
     // No overflow check needed.
-    or32le(Loc, (SA & 0xFFC) << 8);
+    or32le(Loc, (SA & 0xFFF) << 10);
     break;
-  case R_AARCH64_LD64_GOT_LO12_NC:
-    checkAlignment<8>(SA, Type);
+  case R_AARCH64_LDST32_ABS_LO12_NC:
     // No overflow check needed.
-    or32le(Loc, (SA & 0xFF8) << 7);
+    or32le(Loc, (SA & 0xFFC) << 8);
     break;
   case R_AARCH64_LDST64_ABS_LO12_NC:
     // No overflow check needed.
     or32le(Loc, (SA & 0xFF8) << 7);
     break;
-  case R_AARCH64_LDST8_ABS_LO12_NC:
-    // No overflow check needed.
-    or32le(Loc, (SA & 0xFFF) << 10);
-    break;
-  case R_AARCH64_PREL16:
-    checkIntUInt<16>(SA - P, Type);
-    write16le(Loc, SA - P);
+  case R_AARCH64_JUMP26:
+  case R_AARCH64_CALL26: {
+    uint64_t X = SA - P;
+    checkInt<28>(X, Type);
+    or32le(Loc, (X & 0x0FFFFFFC) >> 2);
     break;
-  case R_AARCH64_PREL32:
-    checkIntUInt<32>(SA - P, Type);
-    write32le(Loc, SA - P);
+  }
+  case R_AARCH64_ADR_GOT_PAGE: {
+    uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
+    checkInt<33>(X, Type);
+    updateAArch64Adr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
-  case R_AARCH64_PREL64:
+  }
+  case R_AARCH64_LD64_GOT_LO12_NC:
+    checkAlignment<8>(SA, Type);
     // No overflow check needed.
-    write64le(Loc, SA - P);
+    or32le(Loc, (SA & 0xFF8) << 7);
     break;
   default:
     error("unrecognized reloc " + Twine(Type));