diff --git a/bolt/include/bolt/Core/Relocation.h b/bolt/include/bolt/Core/Relocation.h
--- a/bolt/include/bolt/Core/Relocation.h
+++ b/bolt/include/bolt/Core/Relocation.h
@@ -64,8 +64,7 @@
   static bool skipRelocationProcess(uint64_t &Type, uint64_t Contents);
 
   // Adjust value depending on relocation type (make it PC relative or not)
-  static uint64_t adjustValue(uint64_t Type, uint64_t Value,
-                              uint64_t PC);
+  static uint64_t encodeValue(uint64_t Type, uint64_t Value, uint64_t PC);
 
   /// Extract current relocated value from binary contents. This is used for
   /// RISC architectures where values are encoded in specific bits depending
diff --git a/bolt/lib/Core/BinarySection.cpp b/bolt/lib/Core/BinarySection.cpp
--- a/bolt/lib/Core/BinarySection.cpp
+++ b/bolt/lib/Core/BinarySection.cpp
@@ -146,7 +146,7 @@
     if (Reloc.Symbol)
       Value += Resolver(Reloc.Symbol);
 
-    Value = Relocation::adjustValue(Reloc.Type, Value,
+    Value = Relocation::encodeValue(Reloc.Type, Value,
                                     SectionAddress + Reloc.Offset);
 
     OS.pwrite(reinterpret_cast<const char *>(&Value),
diff --git a/bolt/lib/Core/Relocation.cpp b/bolt/lib/Core/Relocation.cpp
--- a/bolt/lib/Core/Relocation.cpp
+++ b/bolt/lib/Core/Relocation.cpp
@@ -262,10 +262,11 @@
   return false;
 }
 
-static uint64_t adjustValueX86(uint64_t Type, uint64_t Value, uint64_t PC) {
+static uint64_t encodeValueX86(uint64_t Type, uint64_t Value, uint64_t PC) {
   switch (Type) {
   default:
-    llvm_unreachable("not supported relocation");
+    llvm_unreachable("unsupported relocation");
+  case ELF::R_X86_64_64:
   case ELF::R_X86_64_32:
     break;
   case ELF::R_X86_64_PC32:
@@ -275,10 +276,10 @@
   return Value;
 }
 
-static uint64_t adjustValueAArch64(uint64_t Type, uint64_t Value, uint64_t PC) {
+static uint64_t encodeValueAArch64(uint64_t Type, uint64_t Value, uint64_t PC) {
   switch (Type) {
   default:
-    llvm_unreachable("not supported relocation");
+    llvm_unreachable("unsupported relocation");
   case ELF::R_AARCH64_ABS32:
     break;
   case ELF::R_AARCH64_PREL16:
@@ -566,11 +567,10 @@
   return skipRelocationProcessX86(Type, Contents);
 }
 
-uint64_t Relocation::adjustValue(uint64_t Type, uint64_t Value,
-                                 uint64_t PC) {
+uint64_t Relocation::encodeValue(uint64_t Type, uint64_t Value, uint64_t PC) {
   if (Arch == Triple::aarch64)
-    return adjustValueAArch64(Type, Value, PC);
-  return adjustValueX86(Type, Value, PC);
+    return encodeValueAArch64(Type, Value, PC);
+  return encodeValueX86(Type, Value, PC);
 }
 
 uint64_t Relocation::extractValue(uint64_t Type, uint64_t Contents,