diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -160,6 +160,9 @@
     ColWidth("misched-dump-schedule-trace-col-width", cl::Hidden,
              cl::desc("Set width of the columns showing resource booking."),
              cl::init(5));
+static cl::opt<bool> MISchedSortResourcesInTrace(
+    "misched-sort-respources-in-trace", cl::Hidden, cl::init(false),
+    cl::desc("Sort the resources printed in the dump trace"));
 #endif
 
 // DAG subtrees must have at least this many nodes.
@@ -993,17 +996,32 @@
     }
     dbgs() << "|\n";
     const MCSchedClassDesc *SC = getSchedClass(SU);
+
+    std::vector<TargetSchedModel::ProcResIter> ResourcesIt;
     for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC),
                                        PE = SchedModel.getWriteProcResEnd(SC);
          PI != PE; ++PI) {
+      ResourcesIt.push_back(PI);
+    }
+
+    if (MISchedSortResourcesInTrace)
+      std::sort(ResourcesIt.begin(), ResourcesIt.end(),
+                [](TargetSchedModel::ProcResIter LHS,
+                   TargetSchedModel::ProcResIter RHS) -> bool {
+                  return LHS->StartAtCycle < RHS->StartAtCycle ||
+                         (LHS->StartAtCycle == RHS->StartAtCycle &&
+                          LHS->Cycles < RHS->Cycles);
+                });
+    for (TargetSchedModel::ProcResIter PI : ResourcesIt) {
       C = FirstCycle;
       const std::string ResName =
           SchedModel.getResourceName(PI->ProcResourceIdx);
-      dbgs() << llvm::left_justify(ResName, HeaderColWidth);
-      for (; C < SU->TopReadyCycle; ++C) {
+      dbgs() << llvm::right_justify(ResName + " ", HeaderColWidth);
+      for (; C < SU->TopReadyCycle + PI->StartAtCycle; ++C) {
         dbgs() << llvm::left_justify("|", ColWidth);
       }
-      for (unsigned i = 0; i < PI->Cycles; ++i, ++C)
+      assert(PI->StartAtCycle < PI->Cycles && "Invalid resource usage");
+      for (unsigned i = 0; i < (PI->Cycles - PI->StartAtCycle); ++i, ++C)
         dbgs() << llvm::left_justify("| x", ColWidth);
       while (C++ <= LastCycle)
         dbgs() << llvm::left_justify("|", ColWidth);
@@ -1059,17 +1077,31 @@
     }
     dbgs() << "|\n";
     const MCSchedClassDesc *SC = getSchedClass(SU);
+    std::vector<TargetSchedModel::ProcResIter> ResourcesIt;
     for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC),
                                        PE = SchedModel.getWriteProcResEnd(SC);
          PI != PE; ++PI) {
+      ResourcesIt.push_back(PI);
+    }
+
+    if (MISchedSortResourcesInTrace)
+      std::sort(ResourcesIt.begin(), ResourcesIt.end(),
+                [](TargetSchedModel::ProcResIter LHS,
+                   TargetSchedModel::ProcResIter RHS) -> bool {
+                  return LHS->StartAtCycle < RHS->StartAtCycle ||
+                         (LHS->StartAtCycle == RHS->StartAtCycle &&
+                          LHS->Cycles < RHS->Cycles);
+                });
+    for (TargetSchedModel::ProcResIter PI : ResourcesIt) {
       C = FirstCycle;
       const std::string ResName =
           SchedModel.getResourceName(PI->ProcResourceIdx);
-      dbgs() << llvm::left_justify(ResName, HeaderColWidth);
-      for (; C > (int)SU->BotReadyCycle; --C) {
+      dbgs() << llvm::right_justify(ResName + " ", HeaderColWidth);
+      for (; C > ((int)SU->BotReadyCycle - (int)PI->StartAtCycle); --C) {
         dbgs() << llvm::left_justify("|", ColWidth);
       }
-      for (unsigned i = 0; i < PI->Cycles; ++i, --C)
+      assert(PI->StartAtCycle < PI->Cycles && "Invalid resource usage");
+      for (unsigned i = 0; i < (PI->Cycles - PI->StartAtCycle); ++i, --C)
         dbgs() << llvm::left_justify("| x", ColWidth);
       while (C-- >= LastCycle)
         dbgs() << llvm::left_justify("|", ColWidth);