diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -541,12 +541,6 @@
     return;
   }
   const MCExpr *AddrDelta = buildSymbolDiff(*this, Label, LastLabel);
-  int64_t Res;
-  if (AddrDelta->evaluateAsAbsolute(Res, getAssemblerPtr())) {
-    MCDwarfLineAddr::Emit(this, Assembler->getDWARFLinetableParams(), LineDelta,
-                          Res);
-    return;
-  }
   insert(new MCDwarfLineAddrFragment(LineDelta, *AddrDelta));
 }
 
diff --git a/llvm/test/MC/ELF/RISCV/debug-line.s b/llvm/test/MC/ELF/RISCV/debug-line.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/ELF/RISCV/debug-line.s
@@ -0,0 +1,37 @@
+## When assembling an assembly file with linker relaxation, emit DW_LNS_fixed_advance_pc
+## with ADD16/SUB16 relocations so that .debug_line can be fixed by the linker.
+## Without linker relaxation, we can emit special opcodes to make .debug_line smaller.
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -g -mattr=-relax < %s -o %t.norelax
+# RUN: llvm-dwarfdump -debug-line -v %t.norelax | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -g -mattr=+relax < %s -o %t.relax
+# RUN: llvm-dwarfdump -debug-line -v %t.relax | FileCheck %s
+# RUN: llvm-readobj -r %t.relax | FileCheck %s --check-prefix=RELOC
+
+call foo
+call foo
+call foo
+
+# CHECK:      DW_LNE_set_address
+# CHECK-NEXT: DW_LNS_advance_line ([[#]])
+# CHECK-NEXT: DW_LNS_copy
+# CHECK-NEXT:                         is_stmt
+# CHECK-NEXT: DW_LNS_advance_line
+# CHECK-NEXT: DW_LNS_fixed_advance_pc (0x0008)
+# CHECK-NEXT: DW_LNS_copy
+# CHECK-NEXT:                           is_stmt
+# CHECK-NEXT: DW_LNS_advance_line
+# CHECK-NEXT: DW_LNS_fixed_advance_pc (0x0008)
+# CHECK-NEXT: DW_LNS_copy
+# CHECK-NEXT:                           is_stmt
+# CHECK-NEXT: DW_LNS_fixed_advance_pc (0x0008)
+# CHECK-NEXT: DW_LNE_end_sequence
+
+# RELOC:      Section ([[#]]) .rela.debug_line {
+# RELOC-NEXT:   0x2C R_RISCV_64 - 0x0
+# RELOC-NEXT:   0x3A R_RISCV_ADD16 - 0x0
+# RELOC-NEXT:   0x3A R_RISCV_SUB16 - 0x0
+# RELOC-NEXT:   0x40 R_RISCV_ADD16 - 0x0
+# RELOC-NEXT:   0x40 R_RISCV_SUB16 - 0x0
+# RELOC-NEXT:   0x44 R_RISCV_ADD16 - 0x0
+# RELOC-NEXT:   0x44 R_RISCV_SUB16 - 0x0
+# RELOC-NEXT: }
diff --git a/llvm/test/MC/ELF/RISCV/lit.local.cfg b/llvm/test/MC/ELF/RISCV/lit.local.cfg
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/ELF/RISCV/lit.local.cfg
@@ -0,0 +1,2 @@
+if 'RISCV' not in config.root.targets:
+    config.unsupported = True