diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1081,7 +1081,16 @@
   case Intrinsic::amdgcn_flat_atomic_fadd:
   case Intrinsic::amdgcn_flat_atomic_fmax:
   case Intrinsic::amdgcn_flat_atomic_fmin: {
-    Module *M = II->getParent()->getParent()->getParent();
+    unsigned InOutAS[] = {OldV->getType()->getPointerAddressSpace(),
+                          NewV->getType()->getPointerAddressSpace()};
+    auto IsFlatAS = [](unsigned AS) {
+      // FIXME: isFlatGlobalAddrSpace is missing constant_32bit
+      return AMDGPU::isFlatGlobalAddrSpace(AS) ||
+             AS == AMDGPUAS::CONSTANT_ADDRESS_32BIT;
+    };
+    if (!llvm::all_of(InOutAS, IsFlatAS))
+      return nullptr;
+    Module *M = II->getModule();
     Type *DestTy = II->getType();
     Type *SrcTy = NewV->getType();
     Function *NewDecl = Intrinsic::getDeclaration(M, II->getIntrinsicID(),
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat-fadd-fmin-fmax-intrinsics.ll
@@ -23,9 +23,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f32_p2(ptr addrspace(2) %ptr, float %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f32_p2
 ; CHECK-SAME: (ptr addrspace(2) [[PTR:%.*]], float [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p2.f32(ptr addrspace(2) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p2.f32(ptr addrspace(2) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p2.f32(ptr addrspace(2) [[PTR]], float [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(2) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p0.f32(ptr [[CAST]], float [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(2) %ptr to ptr
@@ -38,9 +39,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f32_p3(ptr addrspace(3) %ptr, float %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f32_p3
 ; CHECK-SAME: (ptr addrspace(3) [[PTR:%.*]], float [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p3.f32(ptr addrspace(3) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p3.f32(ptr addrspace(3) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p3.f32(ptr addrspace(3) [[PTR]], float [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(3) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p0.f32(ptr [[CAST]], float [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(3) %ptr to ptr
@@ -68,9 +70,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f32_p5(ptr addrspace(5) %ptr, float %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f32_p5
 ; CHECK-SAME: (ptr addrspace(5) [[PTR:%.*]], float [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p5.f32(ptr addrspace(5) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p5.f32(ptr addrspace(5) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p5.f32(ptr addrspace(5) [[PTR]], float [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p0.f32(ptr [[CAST]], float [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(5) %ptr to ptr
@@ -98,9 +101,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f32_p7(ptr addrspace(7) %ptr, float %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f32_p7
 ; CHECK-SAME: (ptr addrspace(7) [[PTR:%.*]], float [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p7.f32(ptr addrspace(7) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p7.f32(ptr addrspace(7) [[PTR]], float [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p7.f32(ptr addrspace(7) [[PTR]], float [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(7) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call float @llvm.amdgcn.flat.atomic.fadd.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call float @llvm.amdgcn.flat.atomic.fmax.f32.p0.f32(ptr [[CAST]], float [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call float @llvm.amdgcn.flat.atomic.fmin.f32.p0.f32(ptr [[CAST]], float [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(7) %ptr to ptr
@@ -147,9 +151,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f64_p2(ptr addrspace(2) %ptr, double %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f64_p2
 ; CHECK-SAME: (ptr addrspace(2) [[PTR:%.*]], double [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p2.f64(ptr addrspace(2) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p2.f64(ptr addrspace(2) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p2.f64(ptr addrspace(2) [[PTR]], double [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(2) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p0.f64(ptr [[CAST]], double [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(2) %ptr to ptr
@@ -162,9 +167,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f64_p3(ptr addrspace(3) %ptr, double %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f64_p3
 ; CHECK-SAME: (ptr addrspace(3) [[PTR:%.*]], double [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p3.f64(ptr addrspace(3) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p3.f64(ptr addrspace(3) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p3.f64(ptr addrspace(3) [[PTR]], double [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(3) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p0.f64(ptr [[CAST]], double [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(3) %ptr to ptr
@@ -192,9 +198,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f64_p5(ptr addrspace(5) %ptr, double %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f64_p5
 ; CHECK-SAME: (ptr addrspace(5) [[PTR:%.*]], double [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p5.f64(ptr addrspace(5) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p5.f64(ptr addrspace(5) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p5.f64(ptr addrspace(5) [[PTR]], double [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p0.f64(ptr [[CAST]], double [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(5) %ptr to ptr
@@ -222,9 +229,10 @@
 define amdgpu_kernel void @flat_atomic_fadd_f64_p7(ptr addrspace(7) %ptr, double %data) {
 ; CHECK-LABEL: define amdgpu_kernel void @flat_atomic_fadd_f64_p7
 ; CHECK-SAME: (ptr addrspace(7) [[PTR:%.*]], double [[DATA:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p7.f64(ptr addrspace(7) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p7.f64(ptr addrspace(7) [[PTR]], double [[DATA]])
-; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p7.f64(ptr addrspace(7) [[PTR]], double [[DATA]])
+; CHECK-NEXT:    [[CAST:%.*]] = addrspacecast ptr addrspace(7) [[PTR]] to ptr
+; CHECK-NEXT:    [[ADD:%.*]] = call double @llvm.amdgcn.flat.atomic.fadd.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MAX:%.*]] = call double @llvm.amdgcn.flat.atomic.fmax.f64.p0.f64(ptr [[CAST]], double [[DATA]])
+; CHECK-NEXT:    [[MIN:%.*]] = call double @llvm.amdgcn.flat.atomic.fmin.f64.p0.f64(ptr [[CAST]], double [[DATA]])
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(7) %ptr to ptr