diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -604,6 +604,14 @@
     if (Result != MCDisassembler::Fail)
       return Result;
   }
+  if (STI.hasFeature(RISCV::FeatureStdExtZcmt)) {
+    LLVM_DEBUG(
+        dbgs() << "Trying Zcmt table (16-bit Table Jump Instructions):\n");
+    Result = decodeInstruction(DecoderTableRVZcmt16, MI, Insn, Address,
+                               this, STI);
+    if (Result != MCDisassembler::Fail)
+      return Result;
+  }
 
   LLVM_DEBUG(dbgs() << "Trying RISCV_C table (16-bit Instruction):\n");
   // Calling the auto-generated decoder function.
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
@@ -132,8 +132,8 @@
            Sched<[WriteSTH, ReadStoreData, ReadMemBase]>;
 }
 
-let Predicates = [HasStdExtZcmt],
-hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
+let DecoderNamespace = "RVZcmt", Predicates = [HasStdExtZcmt],
+    hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
 def CM_JT : RVInst16CJ<0b101, 0b10, (outs), (ins uimm5:$index),
                        "cm.jt", "$index">{
   bits<5> index;
@@ -149,7 +149,7 @@
   let Inst{12-10} = 0b000;
   let Inst{9-2} = index;
 }
-} // Predicates = [HasStdExtZcmt]
+} // DecoderNamespace = "RVZcmt", Predicates = [HasStdExtZcmt]...
 
 
 let Predicates = [HasStdExtZcb, HasStdExtMOrZmmul] in{