diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp --- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp @@ -989,7 +989,8 @@ if (!UseShortGranules) Size = AlignedSize; - Tag = IRB.CreateTrunc(Tag, IRB.getInt8Ty()); + assert(Tag->getType() == Int8Ty); + if (InstrumentWithCalls) { IRB.CreateCall(HwasanTagMemoryFunc, {IRB.CreatePointerCast(AI, Int8PtrTy), Tag, @@ -1036,15 +1037,15 @@ return FastMasks[AllocaNo % std::size(FastMasks)]; } -Value *HWAddressSanitizer::applyTagMask(IRBuilder<> &IRB, Value *OldTag) { - if (TagMaskByte == 0xFF) - return OldTag; // No need to clear the tag byte. - return IRB.CreateAnd(OldTag, - ConstantInt::get(OldTag->getType(), TagMaskByte)); +Value *HWAddressSanitizer::applyTagMask(IRBuilder<> &IRB, Value *Tag) { + Tag = IRB.CreateTrunc(Tag, Int8Ty); + if (TagMaskByte != 0xFF) // No need to clear the tag byte. + Tag = IRB.CreateAnd(Tag, ConstantInt::get(Tag->getType(), TagMaskByte)); + return Tag; } Value *HWAddressSanitizer::getNextTagWithCall(IRBuilder<> &IRB) { - return IRB.CreateZExt(IRB.CreateCall(HwasanGenerateTagFunc), IntptrTy); + return IRB.CreateCall(HwasanGenerateTagFunc); } Value *HWAddressSanitizer::getStackBaseTag(IRBuilder<> &IRB) { @@ -1075,7 +1076,6 @@ Value *StackPointerLong = getSP(IRB); Value *UARTag = applyTagMask(IRB, IRB.CreateLShr(StackPointerLong, PointerTagShift)); - UARTag->setName("hwasan.uar.tag"); return UARTag; } @@ -1085,6 +1085,8 @@ Value *PtrLong, Value *Tag) { assert(!UsePageAliases); Value *TaggedPtrLong; + assert(Tag->getType() == Int8Ty); + Tag = IRB.CreateZExt(Tag, IntptrTy); if (CompileKernel) { // Kernel addresses have 0xFF in the most significant byte. Value *ShiftedTag = @@ -1210,7 +1212,7 @@ case instr: { ThreadLongMaybeUntagged = getThreadLongMaybeUntagged(); - StackBaseTag = IRB.CreateAShr(ThreadLong, 3); + StackBaseTag = applyTagMask(IRB, IRB.CreateAShr(ThreadLong, 3)); // Store data to ring buffer. Value *FrameRecordInfo = getFrameRecordInfo(IRB); @@ -1305,9 +1307,10 @@ Value *AILong = IRB.CreatePointerCast(AI, IntptrTy); Value *AINoTagLong = untagPointer(IRB, AILong); Value *ShadowPtr = memToShadow(AINoTagLong, IRB); - Value *Replacement = tagPointer(IRB, AI->getType(), AILong, Tag); + Value *Replacement = tagPointer(IRB, AI->getType(), AINoTagLong, Tag); std::string Name = AI->hasName() ? AI->getName().str() : "alloca." + itostr(N); + Tag->setName(Name + ".tag"); AINoTagLong->setName(Name + ".notag"); Replacement->setName(Name + ".hwasan"); ShadowPtr->setName(Name + ".shadow"); diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll @@ -15,40 +15,40 @@ ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935 ; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 -; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]] -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr -; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 +; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44 +; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP6]] +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr +; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8 +; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56 +; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12 +; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1 +; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8 +; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]] +; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8 +; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1 +; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag() -; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64 +; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag() ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP17]], 72057594037927935 ; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]] -; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 56 -; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr -; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP18]] +; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56 +; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[X_NOTAG]], [[TMP20]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 ; CHECK-NEXT: store i8 4, ptr [[TMP22]], align 1 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[X]], i32 15 -; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1 +; CHECK-NEXT: store i8 [[X_TAG]], ptr [[TMP23]], align 1 ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll @@ -17,26 +17,27 @@ ; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]], !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] +; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP6]], !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]], !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP10]], align 1, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP11]], align 1, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]] +; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca @@ -46,26 +47,27 @@ ; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] +; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]], !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP10]], align 1, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP11]], align 1, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]] +; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll @@ -21,64 +21,64 @@ ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935 ; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 -; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP5]] -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr -; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 +; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44 +; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @test to i64), [[TMP6]] +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr +; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8 +; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56 +; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12 +; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1 +; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8 +; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]] +; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8 +; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1 +; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0 -; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP16]], 72057594037927935 -; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP17]] -; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56 -; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], [[TMP18]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP3]], 0 +; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP17]], 72057594037927935 +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP18]] +; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56 +; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[X_NOTAG]], [[TMP20]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]]) -; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8 -; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 -; CHECK-NEXT: store i8 4, ptr [[TMP21]], align 1 -; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X]], i32 15 -; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP22]], align 1 +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 +; CHECK-NEXT: store i8 4, ptr [[TMP22]], align 1 +; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[X]], i32 15 +; CHECK-NEXT: store i8 [[X_TAG]], ptr [[TMP23]], align 1 ; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]]) ; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] ; CHECK: invoke.cont: -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: ret void ; CHECK: lpad: ; CHECK-NEXT: [[TMP24:%.*]] = landingpad { ptr, i32 } ; CHECK-NEXT: cleanup ; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 0 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 19) ; CHECK-NEXT: store ptr [[TMP25]], ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 1 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 18) ; CHECK-NEXT: store i32 [[TMP26]], ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]]) -; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP27]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: br label [[EH_RESUME:%.*]] ; CHECK: eh.resume: -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 3) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EXN_SLOT]], i32 3) ; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 2) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr [[EHSELECTOR_SLOT]], i32 2) ; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0 ; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll @@ -15,33 +15,35 @@ ; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935 ; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 -; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP5]] -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr -; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 +; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; CHECK-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44 +; CHECK-NEXT: [[TMP7:%.*]] = or i64 ptrtoint (ptr @_Z6targetv to i64), [[TMP6]] +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr +; CHECK-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8 +; CHECK-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56 +; CHECK-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12 +; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1 +; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8 +; CHECK-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]] +; CHECK-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8 +; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP1]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP14]], 1 +; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP5]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP16]] to i8 ; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16 -; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0 -; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64 -; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP16]], 72057594037927935 -; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[BUF_NOTAG]], 4 -; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP17]] -; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56 -; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], [[TMP18]] -; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr -; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP20]], i64 256, i1 false) +; CHECK-NEXT: [[BUF_TAG:%.*]] = xor i8 [[TMP3]], 0 +; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF]] to i64 +; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP17]], 72057594037927935 +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[BUF_NOTAG]], 4 +; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP15]], i64 [[TMP18]] +; CHECK-NEXT: [[TMP19:%.*]] = zext i8 [[BUF_TAG]] to i64 +; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP19]], 56 +; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[BUF_NOTAG]], [[TMP20]] +; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[BUF_TAG]], i64 256, i1 false) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf) ; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [ ; CHECK-NEXT: i32 1, label [[RETURN:%.*]] @@ -50,14 +52,13 @@ ; CHECK: sw.bb1: ; CHECK-NEXT: br label [[RETURN]] ; CHECK: while.body: -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr @stackbuf, i32 19) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP15]], ptr @stackbuf, i32 19) ; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8 ; CHECK-NEXT: call void @may_jump() ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ] -; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP21]], i64 256, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 256, i1 false) ; CHECK-NEXT: ret i1 [[RETVAL_0]] ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll @@ -14,36 +14,36 @@ ; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20 ; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] -; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP4]], 63 -; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 57 -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP5]], 63 +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP5]], 63 +; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP2]], 57 +; CHECK-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP6]] to i8 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP7]], 63 ; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP8]], -9079256848778919937 +; CHECK-NEXT: [[TMP9:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP9]] to ptr +; CHECK-NEXT: [[TMP10:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP11:%.*]] = shl i64 [[TMP10]], 57 +; CHECK-NEXT: [[TMP12:%.*]] = or i64 [[X_NOTAG]], [[TMP11]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP12]] to ptr +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16) ; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16 -; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1 +; CHECK-NEXT: [[Y_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 1 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[Y]] to i64 ; CHECK-NEXT: [[Y_NOTAG:%.*]] = and i64 [[TMP13]], -9079256848778919937 ; CHECK-NEXT: [[TMP14:%.*]] = lshr i64 [[Y_NOTAG]], 4 ; CHECK-NEXT: [[Y_SHADOW:%.*]] = inttoptr i64 [[TMP14]] to ptr -; CHECK-NEXT: [[TMP15:%.*]] = shl i64 [[TMP12]], 57 -; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP13]], [[TMP15]] -; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP16]] to ptr -; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP12]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16) +; CHECK-NEXT: [[TMP15:%.*]] = zext i8 [[Y_TAG]] to i64 +; CHECK-NEXT: [[TMP16:%.*]] = shl i64 [[TMP15]], 57 +; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[Y_NOTAG]], [[TMP16]] +; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[Y_TAG]], i64 16) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]]) -; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP18]], i64 16) -; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP19]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[HWASAN_UAR_TAG]], i64 16) ; CHECK-NEXT: ret void ; %x = alloca i8, i64 4 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll @@ -16,22 +16,21 @@ ; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 57 -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP2]], 63 +; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP3]], 63 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() -; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], -9079256848778919937 -; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP6]] to ptr -; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 57 -; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]] +; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], -9079256848778919937 +; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr +; CHECK-NEXT: [[TMP6:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 57 +; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[X_NOTAG]], [[TMP7]] ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr -; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll @@ -18,23 +18,24 @@ ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63 -; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57 -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP4]], 63 +; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP1]], 57 +; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP6]], 63 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 -; CHECK-NEXT: [[TMP7:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr -; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57 -; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr -; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 +; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr +; CHECK-NEXT: [[TMP9:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP9]], 57 +; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[X_NOTAG]], [[TMP10]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[X_TAG]], i64 16) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[HWASAN_UAR_TAG]], i64 16) ; CHECK-NEXT: ret void ; ; INLINE-LABEL: define void @test_alloca @@ -43,40 +44,42 @@ ; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 -; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; INLINE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; INLINE-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]] -; INLINE-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr -; INLINE-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; INLINE-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; INLINE-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; INLINE-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; INLINE-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; INLINE-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; INLINE-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 -; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 -; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57 -; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63 +; INLINE-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; INLINE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 63 +; INLINE-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; INLINE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; INLINE-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 +; INLINE-NEXT: [[TMP8:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP7]] +; INLINE-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP1]] to ptr +; INLINE-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 +; INLINE-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP0]], 56 +; INLINE-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 +; INLINE-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 +; INLINE-NEXT: [[TMP13:%.*]] = add i64 [[TMP0]], 8 +; INLINE-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] +; INLINE-NEXT: store i64 [[TMP14]], ptr @__hwasan_tls, align 8 +; INLINE-NEXT: [[TMP15:%.*]] = or i64 [[TMP1]], 4294967295 +; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 +; INLINE-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; INLINE-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP6]], 57 +; INLINE-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i8 +; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP18]], 63 ; INLINE-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0 -; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 -; INLINE-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP17]], -9079256848778919937 -; INLINE-NEXT: [[TMP18:%.*]] = lshr i64 [[X_NOTAG]], 4 -; INLINE-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]] -; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57 -; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]] -; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr -; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 -; INLINE-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 -; INLINE-NEXT: store i8 4, ptr [[TMP22]], align 1 -; INLINE-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[X]], i32 15 -; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1 +; INLINE-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0 +; INLINE-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 +; INLINE-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], -9079256848778919937 +; INLINE-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 +; INLINE-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP20]] +; INLINE-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64 +; INLINE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 57 +; INLINE-NEXT: [[TMP23:%.*]] = or i64 [[X_NOTAG]], [[TMP22]] +; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; INLINE-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 +; INLINE-NEXT: store i8 4, ptr [[TMP24]], align 1 +; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[X]], i32 15 +; INLINE-NEXT: store i8 [[X_TAG]], ptr [[TMP25]], align 1 ; INLINE-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; INLINE-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false) +; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; INLINE-NEXT: ret void ; entry: @@ -95,25 +98,26 @@ ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63 -; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57 -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i8 [[TMP4]], 63 +; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP1]], 57 +; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP6]], 63 ; CHECK-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16 -; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 -; CHECK-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 -; CHECK-NEXT: [[TMP7:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4 -; CHECK-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr -; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57 -; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]] -; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr -; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP10]], i64 16) -; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 -; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP11]]) +; CHECK-NEXT: [[BUF_SROA_0_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 +; CHECK-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 +; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4 +; CHECK-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr +; CHECK-NEXT: [[TMP9:%.*]] = zext i8 [[BUF_SROA_0_TAG]] to i64 +; CHECK-NEXT: [[TMP10:%.*]] = shl i64 [[TMP9]], 57 +; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[BUF_SROA_0_NOTAG]], [[TMP10]] +; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[BUF_SROA_0_TAG]], i64 16) +; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 +; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP12]]) ; CHECK-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP12]], i64 16) +; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[HWASAN_UAR_TAG]], i64 16) ; CHECK-NEXT: ret i32 0 ; ; INLINE-LABEL: define i32 @test_simple @@ -122,70 +126,72 @@ ; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 -; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; INLINE-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; INLINE-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP5]] -; INLINE-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr -; INLINE-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; INLINE-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; INLINE-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; INLINE-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; INLINE-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; INLINE-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; INLINE-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 -; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 -; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57 -; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63 +; INLINE-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i8 +; INLINE-NEXT: [[TMP4:%.*]] = and i8 [[TMP3]], 63 +; INLINE-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; INLINE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; INLINE-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 +; INLINE-NEXT: [[TMP8:%.*]] = or i64 ptrtoint (ptr @test_simple to i64), [[TMP7]] +; INLINE-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP1]] to ptr +; INLINE-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 +; INLINE-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP0]], 56 +; INLINE-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 +; INLINE-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 +; INLINE-NEXT: [[TMP13:%.*]] = add i64 [[TMP0]], 8 +; INLINE-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] +; INLINE-NEXT: store i64 [[TMP14]], ptr @__hwasan_tls, align 8 +; INLINE-NEXT: [[TMP15:%.*]] = or i64 [[TMP1]], 4294967295 +; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 +; INLINE-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; INLINE-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP6]], 57 +; INLINE-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP17]] to i8 +; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP18]], 63 ; INLINE-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16 -; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0 -; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 -; INLINE-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP17]], -9079256848778919937 -; INLINE-NEXT: [[TMP18:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4 -; INLINE-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]] -; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57 -; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]] -; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr -; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 -; INLINE-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[BUF_SROA_0_SHADOW]], i32 0 -; INLINE-NEXT: store i8 1, ptr [[TMP22]], align 1 -; INLINE-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15 -; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1 -; INLINE-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 -; INLINE-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 57 -; INLINE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP25]] to i8 -; INLINE-NEXT: [[TMP27:%.*]] = and i64 [[TMP24]], -9079256848778919937 -; INLINE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 -; INLINE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP28]] -; INLINE-NEXT: [[TMP30:%.*]] = load i8, ptr [[TMP29]], align 1 -; INLINE-NEXT: [[TMP31:%.*]] = icmp ne i8 [[TMP26]], [[TMP30]] -; INLINE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP46:%.*]], !prof [[PROF1:![0-9]+]] -; INLINE: 32: -; INLINE-NEXT: [[TMP33:%.*]] = icmp ugt i8 [[TMP30]], 15 -; INLINE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP35:%.*]], !prof [[PROF1]] +; INLINE-NEXT: [[BUF_SROA_0_TAG:%.*]] = xor i8 [[TMP4]], 0 +; INLINE-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 +; INLINE-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP19]], -9079256848778919937 +; INLINE-NEXT: [[TMP20:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4 +; INLINE-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP20]] +; INLINE-NEXT: [[TMP21:%.*]] = zext i8 [[BUF_SROA_0_TAG]] to i64 +; INLINE-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 57 +; INLINE-NEXT: [[TMP23:%.*]] = or i64 [[BUF_SROA_0_NOTAG]], [[TMP22]] +; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; INLINE-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[BUF_SROA_0_SHADOW]], i32 0 +; INLINE-NEXT: store i8 1, ptr [[TMP24]], align 1 +; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15 +; INLINE-NEXT: store i8 [[BUF_SROA_0_TAG]], ptr [[TMP25]], align 1 +; INLINE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 +; INLINE-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 57 +; INLINE-NEXT: [[TMP28:%.*]] = trunc i64 [[TMP27]] to i8 +; INLINE-NEXT: [[TMP29:%.*]] = and i64 [[TMP26]], -9079256848778919937 +; INLINE-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4 +; INLINE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]] +; INLINE-NEXT: [[TMP32:%.*]] = load i8, ptr [[TMP31]], align 1 +; INLINE-NEXT: [[TMP33:%.*]] = icmp ne i8 [[TMP28]], [[TMP32]] +; INLINE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP48:%.*]], !prof [[PROF1:![0-9]+]] ; INLINE: 34: -; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP24]]) +; INLINE-NEXT: [[TMP35:%.*]] = icmp ugt i8 [[TMP32]], 15 +; INLINE-NEXT: br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP37:%.*]], !prof [[PROF1]] +; INLINE: 36: +; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP26]]) ; INLINE-NEXT: unreachable -; INLINE: 35: -; INLINE-NEXT: [[TMP36:%.*]] = and i64 [[TMP24]], 15 -; INLINE-NEXT: [[TMP37:%.*]] = trunc i64 [[TMP36]] to i8 -; INLINE-NEXT: [[TMP38:%.*]] = add i8 [[TMP37]], 0 -; INLINE-NEXT: [[TMP39:%.*]] = icmp uge i8 [[TMP38]], [[TMP30]] -; INLINE-NEXT: br i1 [[TMP39]], label [[TMP34]], label [[TMP40:%.*]], !prof [[PROF1]] -; INLINE: 40: -; INLINE-NEXT: [[TMP41:%.*]] = or i64 [[TMP27]], 15 -; INLINE-NEXT: [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr -; INLINE-NEXT: [[TMP43:%.*]] = load i8, ptr [[TMP42]], align 1 -; INLINE-NEXT: [[TMP44:%.*]] = icmp ne i8 [[TMP26]], [[TMP43]] -; INLINE-NEXT: br i1 [[TMP44]], label [[TMP34]], label [[TMP45:%.*]], !prof [[PROF1]] -; INLINE: 45: -; INLINE-NEXT: br label [[TMP46]] -; INLINE: 46: +; INLINE: 37: +; INLINE-NEXT: [[TMP38:%.*]] = and i64 [[TMP26]], 15 +; INLINE-NEXT: [[TMP39:%.*]] = trunc i64 [[TMP38]] to i8 +; INLINE-NEXT: [[TMP40:%.*]] = add i8 [[TMP39]], 0 +; INLINE-NEXT: [[TMP41:%.*]] = icmp uge i8 [[TMP40]], [[TMP32]] +; INLINE-NEXT: br i1 [[TMP41]], label [[TMP36]], label [[TMP42:%.*]], !prof [[PROF1]] +; INLINE: 42: +; INLINE-NEXT: [[TMP43:%.*]] = or i64 [[TMP29]], 15 +; INLINE-NEXT: [[TMP44:%.*]] = inttoptr i64 [[TMP43]] to ptr +; INLINE-NEXT: [[TMP45:%.*]] = load i8, ptr [[TMP44]], align 1 +; INLINE-NEXT: [[TMP46:%.*]] = icmp ne i8 [[TMP28]], [[TMP45]] +; INLINE-NEXT: br i1 [[TMP46]], label [[TMP36]], label [[TMP47:%.*]], !prof [[PROF1]] +; INLINE: 47: +; INLINE-NEXT: br label [[TMP48]] +; INLINE: 48: ; INLINE-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4 -; INLINE-NEXT: [[TMP47:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SROA_0_SHADOW]], i8 [[TMP47]], i64 1, i1 false) +; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SROA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; INLINE-NEXT: ret i32 0 ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll @@ -13,50 +13,50 @@ ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 -; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8 -; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; CHECK-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 8 +; CHECK-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; CHECK-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; CHECK-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 8 +; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0 -; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 -; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] -; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 -; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP5]], 0 +; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP20]], 72057594037927935 +; CHECK-NEXT: [[TMP21:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP21]] +; CHECK-NEXT: [[TMP22:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP23:%.*]] = shl i64 [[TMP22]], 56 +; CHECK-NEXT: [[TMP24:%.*]] = or i64 [[X_NOTAG]], [[TMP23]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16 -; CHECK-NEXT: [[TMP24:%.*]] = xor i64 [[TMP4]], 128 +; CHECK-NEXT: [[Y_TAG:%.*]] = xor i8 [[TMP5]], -128 ; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[Y]] to i64 ; CHECK-NEXT: [[Y_NOTAG:%.*]] = and i64 [[TMP25]], 72057594037927935 ; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[Y_NOTAG]], 4 -; CHECK-NEXT: [[Y_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]] -; CHECK-NEXT: [[TMP27:%.*]] = shl i64 [[TMP24]], 56 -; CHECK-NEXT: [[TMP28:%.*]] = or i64 [[TMP25]], [[TMP27]] -; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP28]] to ptr -; CHECK-NEXT: [[TMP29:%.*]] = trunc i64 [[TMP24]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[TMP29]], i64 1, i1 false) +; CHECK-NEXT: [[Y_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP26]] +; CHECK-NEXT: [[TMP27:%.*]] = zext i8 [[Y_TAG]] to i64 +; CHECK-NEXT: [[TMP28:%.*]] = shl i64 [[TMP27]], 56 +; CHECK-NEXT: [[TMP29:%.*]] = or i64 [[Y_NOTAG]], [[TMP28]] +; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP29]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[Y_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]]) -; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP30]], i64 1, i1 false) -; CHECK-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[TMP31]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; %x = alloca i8, i64 4 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll @@ -15,37 +15,38 @@ ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8 ; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 -; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8 -; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; CHECK-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 8 +; CHECK-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; CHECK-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; CHECK-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; CHECK-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 8 +; CHECK-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0 -; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 -; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] -; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 -; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP5]], 0 +; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP20]], 72057594037927935 +; CHECK-NEXT: [[TMP21:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP21]] +; CHECK-NEXT: [[TMP22:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP23:%.*]] = shl i64 [[TMP22]], 56 +; CHECK-NEXT: [[TMP24:%.*]] = or i64 [[X_NOTAG]], [[TMP23]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; %x = alloca i32, align 4 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll @@ -16,38 +16,38 @@ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 -; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 -; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 -; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr -; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 -; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 -; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 -; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 -; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 -; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] -; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 -; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr +; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 +; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56 +; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 +; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 +; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8 +; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] +; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8 +; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP17:%.*]] = call i8 @__hwasan_generate_tag() -; CHECK-NEXT: [[TMP18:%.*]] = zext i8 [[TMP17]] to i64 +; CHECK-NEXT: [[X_TAG:%.*]] = call i8 @__hwasan_generate_tag() ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 ; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP20]] -; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 -; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] +; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56 +; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[X_NOTAG]], [[TMP22]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll @@ -17,26 +17,27 @@ ; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]], !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] -; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] +; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP6]], !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]], !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP10]], align 1, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] +; DYNAMIC-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP11]], align 1, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] -; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]] +; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca @@ -46,26 +47,27 @@ ; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] -; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] +; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]], !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP10]], align 1, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]] +; ZERO-BASED-SHADOW-NEXT: store i8 [[X_TAG]], ptr [[TMP11]], align 1, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] -; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]] +; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false), !dbg [[DBG14:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll @@ -22,42 +22,43 @@ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 -; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 -; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 -; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr -; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 -; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 -; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 -; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 -; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 -; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] -; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 -; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr +; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 +; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56 +; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 +; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 +; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8 +; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] +; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8 +; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 -; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935 -; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]] -; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 -; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0 +; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 +; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] +; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56 +; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[X_NOTAG]], [[TMP22]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr ; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]]) -; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]]) ; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] ; CHECK: invoke.cont: -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: ret void ; CHECK: lpad: @@ -66,20 +67,19 @@ ; CHECK-NEXT: [[TMP25:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]]) ; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP25]]) ; CHECK-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 0 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EXN_SLOT]], i32 19) ; CHECK-NEXT: store ptr [[TMP26]], ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: [[TMP27:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 1 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EHSELECTOR_SLOT]], i32 18) ; CHECK-NEXT: store i32 [[TMP27]], ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]]) -; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP28]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: br label [[EH_RESUME:%.*]] ; CHECK: eh.resume: -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 3) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EXN_SLOT]], i32 3) ; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8 -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 2) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr [[EHSELECTOR_SLOT]], i32 2) ; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0 ; CHECK-NEXT: [[LPAD_VAL1:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1 diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll @@ -16,23 +16,24 @@ ; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = or i64 [[TMP4]], -72057594037927936 -; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr -; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 -; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 72057594037927935 -; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP4]], [[TMP7]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr -; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = or i64 [[TMP5]], -72057594037927936 +; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP6]] to ptr +; CHECK-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP8]], 72057594037927935 +; CHECK-NEXT: [[TMP10:%.*]] = and i64 [[X_NOTAG]], [[TMP9]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) -; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP10]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll @@ -99,37 +99,38 @@ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 -; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 -; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 -; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr -; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 -; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 -; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 -; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 -; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 -; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] -; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 -; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr +; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 +; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56 +; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 +; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 +; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8 +; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] +; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8 +; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 -; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 -; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935 -; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4 -; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]] -; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 -; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]] -; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr -; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false) +; CHECK-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0 +; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 +; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 +; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 +; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] +; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64 +; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56 +; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[X_NOTAG]], [[TMP22]] +; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]]) -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; CHECK-NEXT: ret void ; ; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca @@ -139,37 +140,38 @@ ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr -; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] -; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 -; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr +; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] +; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295 +; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56 +; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8 ; NOIFUNC-TLS-HISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 -; NOIFUNC-TLS-HISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4 -; NOIFUNC-TLS-HISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]] -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]] -; NOIFUNC-TLS-HISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 -; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false) +; NOIFUNC-TLS-HISTORY-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP4]], 0 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 +; NOIFUNC-TLS-HISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4 +; NOIFUNC-TLS-HISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP21:%.*]] = zext i8 [[X_TAG]] to i64 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56 +; NOIFUNC-TLS-HISTORY-NEXT: [[TMP23:%.*]] = or i64 [[X_NOTAG]], [[TMP22]] +; NOIFUNC-TLS-HISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; NOIFUNC-TLS-HISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) -; NOIFUNC-TLS-HISTORY-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false) +; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; NOIFUNC-TLS-HISTORY-NEXT: ret void ; ; NOIFUNC-TLS-NOHISTORY-LABEL: define void @test_alloca @@ -179,22 +181,23 @@ ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]] -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]] -; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 -; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP8]], i64 1, i1 false) +; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP6]] +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56 +; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]] +; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr +; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; NOIFUNC-TLS-NOHISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) -; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP9:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false) +; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; NOIFUNC-TLS-NOHISTORY-NEXT: ret void ; ; NOIFUNC-NOTLS-LABEL: define void @test_alloca @@ -204,22 +207,23 @@ ; NOIFUNC-NOTLS-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; NOIFUNC-NOTLS-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; NOIFUNC-NOTLS-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20 -; NOIFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP3]] -; NOIFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 +; NOIFUNC-NOTLS-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] +; NOIFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP4]] to i8 +; NOIFUNC-NOTLS-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 56 +; NOIFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP5]] to i8 ; NOIFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; NOIFUNC-NOTLS-NEXT: [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; NOIFUNC-NOTLS-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 -; NOIFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935 -; NOIFUNC-NOTLS-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4 -; NOIFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP6]] -; NOIFUNC-NOTLS-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 56 -; NOIFUNC-NOTLS-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]] -; NOIFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr -; NOIFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 -; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false) +; NOIFUNC-NOTLS-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; NOIFUNC-NOTLS-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64 +; NOIFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP6]], 72057594037927935 +; NOIFUNC-NOTLS-NEXT: [[TMP7:%.*]] = lshr i64 [[X_NOTAG]], 4 +; NOIFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP7]] +; NOIFUNC-NOTLS-NEXT: [[TMP8:%.*]] = zext i8 [[X_TAG]] to i64 +; NOIFUNC-NOTLS-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 56 +; NOIFUNC-NOTLS-NEXT: [[TMP10:%.*]] = or i64 [[X_NOTAG]], [[TMP9]] +; NOIFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr +; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; NOIFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) -; NOIFUNC-NOTLS-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP10]], i64 1, i1 false) +; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; NOIFUNC-NOTLS-NEXT: ret void ; ; IFUNC-NOTLS-LABEL: define void @test_alloca @@ -229,22 +233,23 @@ ; IFUNC-NOTLS-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; IFUNC-NOTLS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; IFUNC-NOTLS-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 -; IFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] -; IFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 +; IFUNC-NOTLS-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] +; IFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP3]] to i8 +; IFUNC-NOTLS-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 56 +; IFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP4]] to i8 ; IFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; IFUNC-NOTLS-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; IFUNC-NOTLS-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 -; IFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935 -; IFUNC-NOTLS-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4 -; IFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]] -; IFUNC-NOTLS-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 -; IFUNC-NOTLS-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]] -; IFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr -; IFUNC-NOTLS-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 -; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP8]], i64 1, i1 false) +; IFUNC-NOTLS-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; IFUNC-NOTLS-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 +; IFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935 +; IFUNC-NOTLS-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4 +; IFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP6]] +; IFUNC-NOTLS-NEXT: [[TMP7:%.*]] = zext i8 [[X_TAG]] to i64 +; IFUNC-NOTLS-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 56 +; IFUNC-NOTLS-NEXT: [[TMP9:%.*]] = or i64 [[X_NOTAG]], [[TMP8]] +; IFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr +; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[X_TAG]], i64 1, i1 false) ; IFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) -; IFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false) +; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; IFUNC-NOTLS-NEXT: ret void ; ; FUCHSIA-LABEL: define void @test_alloca @@ -253,37 +258,38 @@ ; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; FUCHSIA-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; FUCHSIA-NEXT: [[TMP1:%.*]] = ashr i64 [[TMP0]], 3 -; FUCHSIA-NEXT: [[TMP2:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; FUCHSIA-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; FUCHSIA-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 -; FUCHSIA-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44 -; FUCHSIA-NEXT: [[TMP6:%.*]] = or i64 [[TMP2]], [[TMP5]] -; FUCHSIA-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP0]] to ptr -; FUCHSIA-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8 -; FUCHSIA-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56 -; FUCHSIA-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12 -; FUCHSIA-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 -; FUCHSIA-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 -; FUCHSIA-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] -; FUCHSIA-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 -; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 +; FUCHSIA-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i8 +; FUCHSIA-NEXT: [[TMP3:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; FUCHSIA-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; FUCHSIA-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64 +; FUCHSIA-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44 +; FUCHSIA-NEXT: [[TMP7:%.*]] = or i64 [[TMP3]], [[TMP6]] +; FUCHSIA-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP0]] to ptr +; FUCHSIA-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8 +; FUCHSIA-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP0]], 56 +; FUCHSIA-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12 +; FUCHSIA-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1 +; FUCHSIA-NEXT: [[TMP12:%.*]] = add i64 [[TMP0]], 8 +; FUCHSIA-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]] +; FUCHSIA-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8 +; FUCHSIA-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP5]], 56 +; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP14]] to i8 ; FUCHSIA-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; FUCHSIA-NEXT: [[TMP13:%.*]] = xor i64 [[TMP1]], 0 -; FUCHSIA-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 -; FUCHSIA-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP14]], 72057594037927935 -; FUCHSIA-NEXT: [[TMP15:%.*]] = lshr i64 [[X_NOTAG]], 4 -; FUCHSIA-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP15]] to ptr -; FUCHSIA-NEXT: [[TMP16:%.*]] = shl i64 [[TMP13]], 56 -; FUCHSIA-NEXT: [[TMP17:%.*]] = or i64 [[TMP14]], [[TMP16]] -; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr -; FUCHSIA-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8 -; FUCHSIA-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 -; FUCHSIA-NEXT: store i8 4, ptr [[TMP19]], align 1 -; FUCHSIA-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[X]], i32 15 -; FUCHSIA-NEXT: store i8 [[TMP18]], ptr [[TMP20]], align 1 +; FUCHSIA-NEXT: [[X_TAG:%.*]] = xor i8 [[TMP2]], 0 +; FUCHSIA-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64 +; FUCHSIA-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP15]], 72057594037927935 +; FUCHSIA-NEXT: [[TMP16:%.*]] = lshr i64 [[X_NOTAG]], 4 +; FUCHSIA-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP16]] to ptr +; FUCHSIA-NEXT: [[TMP17:%.*]] = zext i8 [[X_TAG]] to i64 +; FUCHSIA-NEXT: [[TMP18:%.*]] = shl i64 [[TMP17]], 56 +; FUCHSIA-NEXT: [[TMP19:%.*]] = or i64 [[X_NOTAG]], [[TMP18]] +; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr +; FUCHSIA-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 +; FUCHSIA-NEXT: store i8 4, ptr [[TMP20]], align 1 +; FUCHSIA-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[X]], i32 15 +; FUCHSIA-NEXT: store i8 [[X_TAG]], ptr [[TMP21]], align 1 ; FUCHSIA-NEXT: call void @use(ptr [[X_HWASAN]]) -; FUCHSIA-NEXT: [[TMP21:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP21]], i64 1, i1 false) +; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; FUCHSIA-NEXT: ret void ; ; FUCHSIA-LIBCALL-LABEL: define void @test_alloca @@ -297,25 +303,26 @@ ; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = or i64 [[TMP0]], [[TMP3]] ; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP4]]) ; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 20 -; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP5]] -; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 +; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[TMP2]], [[TMP5]] +; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = trunc i64 [[TMP6]] to i8 +; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = lshr i64 [[TMP2]], 56 +; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP7]] to i8 ; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 -; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 -; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 -; FUCHSIA-LIBCALL-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP7]], 72057594037927935 -; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = lshr i64 [[X_NOTAG]], 4 -; FUCHSIA-LIBCALL-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 56 -; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] -; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 -; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP12]], align 1 -; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15 -; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP11]], ptr [[TMP13]], align 1 +; FUCHSIA-LIBCALL-NEXT: [[X_TAG:%.*]] = xor i8 [[HWASAN_STACK_BASE_TAG]], 0 +; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64 +; FUCHSIA-LIBCALL-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP8]], 72057594037927935 +; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = lshr i64 [[X_NOTAG]], 4 +; FUCHSIA-LIBCALL-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP9]] to ptr +; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = zext i8 [[X_TAG]] to i64 +; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = shl i64 [[TMP10]], 56 +; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = or i64 [[X_NOTAG]], [[TMP11]] +; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP12]] to ptr +; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0 +; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP13]], align 1 +; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15 +; FUCHSIA-LIBCALL-NEXT: store i8 [[X_TAG]], ptr [[TMP14]], align 1 ; FUCHSIA-LIBCALL-NEXT: call void @use(ptr [[X_HWASAN]]) -; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP14]], i64 1, i1 false) +; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; FUCHSIA-LIBCALL-NEXT: ret void ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll b/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll @@ -14,7 +14,7 @@ ; REQUIRES: aarch64-registered-target ; COLOR: sub sp, sp, #240 -; NOCOLOR: sub sp, sp, #400 +; NOCOLOR: sub sp, sp, #384 define i32 @myCall_w2(i32 %in) sanitize_hwaddress { entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll @@ -16,34 +16,36 @@ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3 -; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 -; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44 -; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP4]], [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i64 [[TMP2]] to ptr -; CHECK-NEXT: store i64 [[TMP8]], ptr [[TMP9]], align 8 -; CHECK-NEXT: [[TMP10:%.*]] = ashr i64 [[TMP2]], 56 -; CHECK-NEXT: [[TMP11:%.*]] = shl nuw nsw i64 [[TMP10]], 12 -; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[TMP11]], -1 -; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[TMP2]], 8 -; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], [[TMP12]] -; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 -; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 -; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 -; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 +; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 +; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 +; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP2]] to ptr +; CHECK-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 8 +; CHECK-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP2]], 56 +; CHECK-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 +; CHECK-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 +; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[TMP2]], 8 +; CHECK-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] +; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP1]], align 8 +; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP2]], 4294967295 +; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP7]], 56 +; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16 -; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 -; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64 -; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935 -; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[BUF_NOTAG]], 4 -; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]] -; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 -; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]] -; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr -; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP22]], i64 256, i1 false) +; CHECK-NEXT: [[BUF_TAG:%.*]] = xor i8 [[TMP4]], 0 +; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[BUF]] to i64 +; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935 +; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[BUF_NOTAG]], 4 +; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]] +; CHECK-NEXT: [[TMP21:%.*]] = zext i8 [[BUF_TAG]] to i64 +; CHECK-NEXT: [[TMP22:%.*]] = shl i64 [[TMP21]], 56 +; CHECK-NEXT: [[TMP23:%.*]] = or i64 [[BUF_NOTAG]], [[TMP22]] +; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP23]] to ptr +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[BUF_TAG]], i64 256, i1 false) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf) ; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [ ; CHECK-NEXT: i32 1, label [[RETURN:%.*]] @@ -52,14 +54,13 @@ ; CHECK: sw.bb1: ; CHECK-NEXT: br label [[RETURN]] ; CHECK: while.body: -; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr @stackbuf, i32 19) +; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP17]], ptr @stackbuf, i32 19) ; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8 ; CHECK-NEXT: call void @may_jump() ; CHECK-NEXT: br label [[RETURN]] ; CHECK: return: ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ] -; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP23]], i64 256, i1 false) +; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 256, i1 false) ; CHECK-NEXT: ret i1 [[RETVAL_0]] ; entry: diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll @@ -28,28 +28,27 @@ ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-SCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: br label [[TMP11:%.*]] ; X86-SCOPE: 11: -; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) -; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() -; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16) -; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]] -; X86-SCOPE: 15: +; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) +; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]] +; X86-SCOPE: 13: ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: ret i32 0 ; @@ -58,27 +57,26 @@ ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]] -; X86-NOSCOPE: 12: -; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() -; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]] -; X86-NOSCOPE: 14: +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-NOSCOPE-NEXT: br label [[TMP11:%.*]] +; X86-NOSCOPE: 11: +; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() +; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]] +; X86-NOSCOPE: 13: ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-NOSCOPE-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @standard_lifetime( @@ -86,44 +84,44 @@ ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]] -; AARCH64-SCOPE: 25: -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]] +; AARCH64-SCOPE: 26: +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond() -; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP29:%.*]], label [[TMP25]] -; AARCH64-SCOPE: 29: +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]] +; AARCH64-SCOPE: 28: ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: ret i32 0 ; @@ -132,43 +130,43 @@ ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: br label [[TMP26:%.*]] ; AARCH64-NOSCOPE: 26: ; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond() ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]] ; AARCH64-NOSCOPE: 28: ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP29]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime( @@ -176,47 +174,47 @@ ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]] -; AARCH64-SHORT-SCOPE: 25: -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]] +; AARCH64-SHORT-SCOPE: 26: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP27]], align 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP28]], align 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP28]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP31:%.*]], label [[TMP25]] -; AARCH64-SHORT-SCOPE: 31: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP26]] +; AARCH64-SHORT-SCOPE: 30: ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; @@ -225,46 +223,46 @@ ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP28:%.*]] ; AARCH64-SHORT-NOSCOPE: 28: ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond() ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]] ; AARCH64-SHORT-NOSCOPE: 30: ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP31]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; %1 = alloca i8, align 1 @@ -289,28 +287,27 @@ ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-SCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: br label [[TMP11:%.*]] ; X86-SCOPE: 11: -; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) -; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() -; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16) -; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: br i1 [[TMP13]], label [[TMP15:%.*]], label [[TMP11]] -; X86-SCOPE: 15: +; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) +; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]] +; X86-SCOPE: 13: ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: ret i32 0 ; @@ -319,27 +316,26 @@ ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]] -; X86-NOSCOPE: 12: -; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() -; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]] -; X86-NOSCOPE: 14: +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-NOSCOPE-NEXT: br label [[TMP11:%.*]] +; X86-NOSCOPE: 11: +; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() +; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP11]] +; X86-NOSCOPE: 13: ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-NOSCOPE-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP15]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @standard_lifetime_optnone( @@ -347,44 +343,44 @@ ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]] -; AARCH64-SCOPE: 25: -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SCOPE-NEXT: br label [[TMP26:%.*]] +; AARCH64-SCOPE: 26: +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond() -; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP29:%.*]], label [[TMP25]] -; AARCH64-SCOPE: 29: +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]] +; AARCH64-SCOPE: 28: ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: ret i32 0 ; @@ -393,43 +389,43 @@ ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: br label [[TMP26:%.*]] ; AARCH64-NOSCOPE: 26: ; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond() ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]] ; AARCH64-NOSCOPE: 28: ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP29]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone( @@ -437,47 +433,47 @@ ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]] -; AARCH64-SHORT-SCOPE: 25: -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP26:%.*]] +; AARCH64-SHORT-SCOPE: 26: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP27]], align 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP28]], align 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP28]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP31:%.*]], label [[TMP25]] -; AARCH64-SHORT-SCOPE: 31: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP26]] +; AARCH64-SHORT-SCOPE: 30: ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; @@ -486,46 +482,46 @@ ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP28:%.*]] ; AARCH64-SHORT-NOSCOPE: 28: ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond() ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]] ; AARCH64-SHORT-NOSCOPE: 30: ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP31]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; %1 = alloca i8, align 1 @@ -550,23 +546,22 @@ ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-SCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-SCOPE-NEXT: ret i32 0 ; ; X86-NOSCOPE-LABEL: @multiple_lifetimes( @@ -574,23 +569,22 @@ ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @multiple_lifetimes( @@ -598,39 +592,39 @@ ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes( @@ -638,39 +632,39 @@ ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes( @@ -678,42 +672,42 @@ ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes( @@ -721,42 +715,42 @@ ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; %1 = alloca i8, align 1 @@ -777,30 +771,28 @@ ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-SCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() -; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] -; X86-SCOPE: 13: +; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-SCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond() +; X86-SCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]] +; X86-SCOPE: 12: ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-SCOPE-NEXT: ret i32 0 -; X86-SCOPE: 15: -; X86-SCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16) +; X86-SCOPE: 13: +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-SCOPE-NEXT: ret i32 0 ; ; X86-NOSCOPE-LABEL: @unreachable_exit( @@ -808,29 +800,27 @@ ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() -; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] -; X86-NOSCOPE: 13: +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond() +; X86-NOSCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]] +; X86-NOSCOPE: 12: ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-NOSCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 -; X86-NOSCOPE: 15: -; X86-NOSCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16) +; X86-NOSCOPE: 13: +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @unreachable_exit( @@ -838,46 +828,45 @@ ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond() -; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]] +; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP28:%.*]] ; AARCH64-SCOPE: 27: ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: ret i32 0 -; AARCH64-SCOPE: 29: -; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) +; AARCH64-SCOPE: 28: +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @unreachable_exit( @@ -885,45 +874,44 @@ ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond() -; AARCH64-NOSCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]] +; AARCH64-NOSCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP28:%.*]] ; AARCH64-NOSCOPE: 27: ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 -; AARCH64-NOSCOPE: 29: -; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) +; AARCH64-NOSCOPE: 28: +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit( @@ -931,49 +919,48 @@ ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond() -; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]] +; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]] ; AARCH64-SHORT-SCOPE: 29: ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 -; AARCH64-SHORT-SCOPE: 31: -; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE: 30: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit( @@ -981,48 +968,47 @@ ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond() -; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]] +; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]] ; AARCH64-SHORT-NOSCOPE: 29: ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 -; AARCH64-SHORT-NOSCOPE: 31: -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE: 30: +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; %1 = alloca i8, align 1 @@ -1045,34 +1031,32 @@ ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-SCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-SCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-SCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-SCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-SCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() -; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] -; X86-SCOPE: 13: +; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-SCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond() +; X86-SCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]] +; X86-SCOPE: 12: ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP14]], i64 16) -; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: br label [[TMP17:%.*]] -; X86-SCOPE: 15: -; X86-SCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16) -; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP4]]) -; X86-SCOPE-NEXT: br label [[TMP17]] -; X86-SCOPE: 17: +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) +; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: br label [[TMP14:%.*]] +; X86-SCOPE: 13: +; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) +; X86-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP5]]) +; X86-SCOPE-NEXT: br label [[TMP14]] +; X86-SCOPE: 14: ; X86-SCOPE-NEXT: ret i32 0 ; ; X86-NOSCOPE-LABEL: @diamond_lifetime( @@ -1080,29 +1064,28 @@ ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 -; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 -; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 -; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() -; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 -; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937 -; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr -; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 -; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]] +; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i8 +; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i8 [[TMP4]], 63 +; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = alloca { i8, [15 x i8] }, align 16 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937 +; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 +; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr +; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 57 +; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr -; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) -; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() -; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP14:%.*]] -; X86-NOSCOPE: 13: +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[ALLOCA_0_TAG]], i64 16) +; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = tail call i1 (...) @cond() +; X86-NOSCOPE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP13:%.*]] +; X86-NOSCOPE: 12: ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; X86-NOSCOPE-NEXT: br label [[TMP15:%.*]] +; X86-NOSCOPE-NEXT: br label [[TMP14:%.*]] +; X86-NOSCOPE: 13: +; X86-NOSCOPE-NEXT: br label [[TMP14]] ; X86-NOSCOPE: 14: -; X86-NOSCOPE-NEXT: br label [[TMP15]] -; X86-NOSCOPE: 15: -; X86-NOSCOPE-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP16]], i64 16) +; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP5]], i8 [[HWASAN_UAR_TAG]], i64 16) ; X86-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SCOPE-LABEL: @diamond_lifetime( @@ -1110,50 +1093,49 @@ ; AARCH64-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond() -; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]] +; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP28:%.*]] ; AARCH64-SCOPE: 27: ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false) -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: br label [[TMP31:%.*]] +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: br label [[TMP29:%.*]] +; AARCH64-SCOPE: 28: +; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SCOPE-NEXT: br label [[TMP29]] ; AARCH64-SCOPE: 29: -; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) -; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SCOPE-NEXT: br label [[TMP31]] -; AARCH64-SCOPE: 31: ; AARCH64-SCOPE-NEXT: ret i32 0 ; ; AARCH64-NOSCOPE-LABEL: @diamond_lifetime( @@ -1161,35 +1143,36 @@ ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[ALLOCA_0_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond() ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP28:%.*]] ; AARCH64-NOSCOPE: 27: @@ -1198,8 +1181,7 @@ ; AARCH64-NOSCOPE: 28: ; AARCH64-NOSCOPE-NEXT: br label [[TMP29]] ; AARCH64-NOSCOPE: 29: -; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) +; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime( @@ -1207,53 +1189,52 @@ ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-SCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-SCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP20]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-SCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond() -; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]] +; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]] ; AARCH64-SHORT-SCOPE: 29: ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) -; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false) -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP33:%.*]] +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP31:%.*]] +; AARCH64-SHORT-SCOPE: 30: +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) +; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP20]]) +; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP31]] ; AARCH64-SHORT-SCOPE: 31: -; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false) -; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) -; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP33]] -; AARCH64-SHORT-SCOPE: 33: ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; ; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime( @@ -1261,38 +1242,39 @@ ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = or i64 [[TMP5]], [[TMP8]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP3]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP9]], ptr [[TMP10]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = ashr i64 [[TMP3]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = shl nuw nsw i64 [[TMP11]], 12 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = xor i64 [[TMP12]], -1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = add i64 [[TMP3]], 8 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], [[TMP13]] -; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP6:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP7:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP8]], 44 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP6]], [[TMP9]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP3]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP10]], ptr [[TMP11]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP12:%.*]] = ashr i64 [[TMP3]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP13:%.*]] = shl nuw nsw i64 [[TMP12]], 12 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], -1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP15:%.*]] = add i64 [[TMP3]], 8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], [[TMP14]] +; AARCH64-SHORT-NOSCOPE-NEXT: store i64 [[TMP16]], ptr [[TMP2]], align 4 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = or i64 [[TMP3]], 4294967295 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP17]], 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = lshr i64 [[TMP8]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = trunc i64 [[TMP19]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = alloca { i8, [15 x i8] }, align 16 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_TAG:%.*]] = call i8 @__hwasan_generate_tag() +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP20]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4 -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]] -; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP18]], i64 [[TMP22]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = zext i8 [[ALLOCA_0_TAG]] to i64 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = shl i64 [[TMP23]], 56 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = or i64 [[ALLOCA_0_NOTAG]], [[TMP24]] +; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP25]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1 -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 -; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1 +; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP20]], i32 15 +; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[ALLOCA_0_TAG]], ptr [[TMP27]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond() ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]] ; AARCH64-SHORT-NOSCOPE: 29: @@ -1301,8 +1283,7 @@ ; AARCH64-SHORT-NOSCOPE: 30: ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP31]] ; AARCH64-SHORT-NOSCOPE: 31: -; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 -; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false) +; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[HWASAN_UAR_TAG]], i64 1, i1 false) ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; %1 = alloca i8, align 1