diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -3702,11 +3702,21 @@
     setOrigin(&I, getOrigin(&I, 0));
   }
 
+  void handleIsFpClass(IntrinsicInst &I) {
+    IRBuilder<> IRB(&I);
+    Value *Shadow = getShadow(&I, 0);
+    setShadow(&I, IRB.CreateICmpNE(Shadow, getCleanShadow(Shadow)));
+    setOrigin(&I, getOrigin(&I, 0));
+  }
+
   void visitIntrinsicInst(IntrinsicInst &I) {
     switch (I.getIntrinsicID()) {
     case Intrinsic::abs:
       handleAbsIntrinsic(I);
       break;
+    case Intrinsic::is_fpclass:
+      handleIsFpClass(I);
+      break;
     case Intrinsic::lifetime_start:
       handleLifetimeStart(I);
       break;
diff --git a/llvm/test/Instrumentation/MemorySanitizer/create-class-from-logic-fcmp.ll b/llvm/test/Instrumentation/MemorySanitizer/create-class-from-logic-fcmp.ll
--- a/llvm/test/Instrumentation/MemorySanitizer/create-class-from-logic-fcmp.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/create-class-from-logic-fcmp.ll
@@ -42,14 +42,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0:![0-9]+]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7:[0-9]+]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -89,14 +84,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_f16_commute_or(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -136,14 +126,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_f16_negzero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -182,14 +167,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_fabs_oeq_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -229,15 +209,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_v2f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
-; IC_MSAN:       3:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       4:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i16> [[TMP1]], zeroinitializer
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store <2 x i1> [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret <2 x i1> [[CLASS]]
 ;
   %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
@@ -277,15 +251,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_v2f16_pos0_neg0_vec(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
-; IC_MSAN:       3:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       4:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i16> [[TMP1]], zeroinitializer
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store <2 x i1> [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret <2 x i1> [[CLASS]]
 ;
   %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
@@ -325,15 +293,9 @@
 ; IC_MSAN-LABEL: @not_isfinite_or_zero_v2f16_commute_or(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
-; IC_MSAN:       3:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       4:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i16> [[TMP1]], zeroinitializer
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store <2 x i1> [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret <2 x i1> [[CLASS]]
 ;
   %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
@@ -373,14 +335,9 @@
 ; IC_MSAN-LABEL: @oeq_isinf_or_oeq_zero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 612)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -419,14 +376,9 @@
 ; IC_MSAN-LABEL: @ueq_inf_or_oeq_zero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 611)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xH7C00
@@ -465,14 +417,9 @@
 ; IC_MSAN-LABEL: @oeq_isinf_or_fabs_oeq_zero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 612)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -512,14 +459,9 @@
 ; IC_MSAN-LABEL: @ueq_0_or_oeq_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 611)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -597,14 +539,9 @@
 ; IC_MSAN-LABEL: @ueq_inf_or_ueq_zero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 615)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -702,9 +639,9 @@
 ; IC_MSAN-NEXT:    [[TMP3:%.*]] = icmp ne i16 [[_MSPROP]], 0
 ; IC_MSAN-NEXT:    [[CMPINF:%.*]] = fcmp ueq half [[FABS]], 0xH7C00
 ; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0]]
+; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP4:%.*]], label [[TMP5:%.*]], !prof [[PROF0:![0-9]+]]
 ; IC_MSAN:       4:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
+; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7:[0-9]+]]
 ; IC_MSAN-NEXT:    unreachable
 ; IC_MSAN:       5:
 ; IC_MSAN-NEXT:    [[TMP6:%.*]] = ptrtoint ptr [[PTR:%.*]] to i64
@@ -891,14 +828,9 @@
 ; IC_MSAN-LABEL: @olt_0_or_fabs_ueq_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 543)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -938,14 +870,9 @@
 ; IC_MSAN-LABEL: @oeq_0_or_fabs_ult_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 507)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1163,14 +1090,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1208,14 +1130,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16_commute_and(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1253,14 +1170,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16_negzero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1298,15 +1210,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_v2f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
-; IC_MSAN:       3:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       4:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i16> [[TMP1]], zeroinitializer
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store <2 x i1> [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret <2 x i1> [[NOT_CLASS]]
 ;
   %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
@@ -1344,15 +1250,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_v2f16_comumte(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[TMP2:%.*]] = bitcast <2 x i16> [[TMP1]] to i32
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]]
-; IC_MSAN:       3:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       4:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne <2 x i16> [[TMP1]], zeroinitializer
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f16(<2 x half> [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store <2 x i1> zeroinitializer, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store <2 x i1> [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret <2 x i1> [[NOT_CLASS]]
 ;
   %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
@@ -1390,14 +1290,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16_not_une_zero(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1473,14 +1368,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16_swapped_constants(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 412)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1678,14 +1568,9 @@
 ; IC_MSAN-LABEL: @negated_isfinite_or_zero_f16_multi_use_cmp0_not_one_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT_CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 411)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT_CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1817,14 +1702,9 @@
 ; IC_MSAN-LABEL: @fcmp_one_0_and_fcmp_une_fabs_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 408)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1861,14 +1741,9 @@
 ; IC_MSAN-LABEL: @fcmp_une_0_and_fcmp_une_fabs_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 411)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1942,14 +1817,9 @@
 ; IC_MSAN-LABEL: @issubnormal_or_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -1988,14 +1858,9 @@
 ; IC_MSAN-LABEL: @olt_smallest_normal_or_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 764)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2032,14 +1897,9 @@
 ; IC_MSAN-LABEL: @not_issubnormal_or_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[NOT:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 267)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[NOT]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2078,14 +1938,9 @@
 ; IC_MSAN-LABEL: @issubnormal_uge_or_inf(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 783)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2285,14 +2140,9 @@
 ; IC_MSAN-LABEL: @issubnormal_or_finite_olt(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 504)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2332,14 +2182,9 @@
 ; IC_MSAN-LABEL: @issubnormal_or_finite_uge(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 759)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2376,14 +2221,9 @@
 ; IC_MSAN-LABEL: @issubnormal_and_finite_olt(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2464,14 +2304,9 @@
 ; IC_MSAN-LABEL: @fcmp_fabs_uge_inf_or_fabs_uge_smallest_norm(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 783)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2633,14 +2468,9 @@
 ; IC_MSAN-LABEL: @is_finite_or_uno(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[OR]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2679,14 +2509,9 @@
 ; IC_MSAN-LABEL: @oeq_isinf_or_uno(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 519)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -2800,14 +2625,9 @@
 ; IC_MSAN-LABEL: @oeq_isinf_and_ord(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 516)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[AND]]
 ;
   %fabs = call half @llvm.fabs.f16(half %x)
@@ -5737,14 +5557,9 @@
 ; IC_MSAN-LABEL: @issubnormal_or_inf_nnan_logical_select(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 756)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call nnan half @llvm.fabs.f16(half %x)
@@ -5781,14 +5596,9 @@
 ; IC_MSAN-LABEL: @issubnormal_and_ninf_nnan_logical_select(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 240)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %fabs = call nnan half @llvm.fabs.f16(half %x)
@@ -5826,14 +5636,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_neginf_or_oge_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 999)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xHFC00
@@ -5870,14 +5675,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_neginf_or_oge_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 996)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xHFC00
@@ -5996,14 +5796,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_neginf_or_ogt_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 900)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xHFC00
@@ -6040,14 +5835,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_neginf_or_ogt_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 903)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xHFC00
@@ -6166,14 +5956,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_neginf_or_ugt_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 903)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xHFC00
@@ -6292,14 +6077,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_posinf_or_ole_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 639)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xH7C00
@@ -6336,14 +6116,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_posinf_or_ole_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 636)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xH7C00
@@ -6462,14 +6237,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_posinf_or_olt_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 540)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xH7C00
@@ -6547,14 +6317,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_posinf_or_ult_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 543)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xH7C00
@@ -6591,14 +6356,9 @@
 ; IC_MSAN-LABEL: @fcmp_oeq_posinf_or_ult_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 543)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp oeq half %x, 0xH7C00
@@ -6717,14 +6477,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_posinf_or_ule_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 639)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xH7C00
@@ -6843,14 +6598,9 @@
 ; IC_MSAN-LABEL: @fcmp_ueq_posinf_or_olt_zero_f16(
 ; IC_MSAN-NEXT:    [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
 ; IC_MSAN-NEXT:    call void @llvm.donothing()
-; IC_MSAN-NEXT:    [[_MSCMP:%.*]] = icmp ne i16 [[TMP1]], 0
-; IC_MSAN-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
-; IC_MSAN:       2:
-; IC_MSAN-NEXT:    call void @__msan_warning_noreturn() #[[ATTR7]]
-; IC_MSAN-NEXT:    unreachable
-; IC_MSAN:       3:
+; IC_MSAN-NEXT:    [[TMP2:%.*]] = icmp ne i16 [[TMP1]], 0
 ; IC_MSAN-NEXT:    [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 543)
-; IC_MSAN-NEXT:    store i1 false, ptr @__msan_retval_tls, align 8
+; IC_MSAN-NEXT:    store i1 [[TMP2]], ptr @__msan_retval_tls, align 8
 ; IC_MSAN-NEXT:    ret i1 [[CLASS]]
 ;
   %cmpinf = fcmp ueq half %x, 0xH7C00