diff --git a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp --- a/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp +++ b/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp @@ -1108,12 +1108,12 @@ // Kernel addresses have 0xFF in the most significant byte. UntaggedPtrLong = IRB.CreateOr(PtrLong, ConstantInt::get(PtrLong->getType(), - 0xFFULL << PointerTagShift)); + TagMaskByte << PointerTagShift)); } else { // Userspace addresses have 0x00. - UntaggedPtrLong = - IRB.CreateAnd(PtrLong, ConstantInt::get(PtrLong->getType(), - ~(0xFFULL << PointerTagShift))); + UntaggedPtrLong = IRB.CreateAnd( + PtrLong, ConstantInt::get(PtrLong->getType(), + ~(TagMaskByte << PointerTagShift))); } return UntaggedPtrLong; } diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll @@ -38,7 +38,7 @@ ; INLINE-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk { ; INLINE-NEXT: entry: ; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 ; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 @@ -65,7 +65,7 @@ ; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr ; INLINE-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8 ; INLINE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64 -; INLINE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 144115188075855871 +; INLINE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], -9079256848778919937 ; INLINE-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4 ; INLINE-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]] ; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0 @@ -75,7 +75,7 @@ ; INLINE-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; INLINE-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; INLINE-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 -; INLINE-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 144115188075855871 +; INLINE-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], -9079256848778919937 ; INLINE-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4 ; INLINE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]] ; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false) @@ -119,7 +119,7 @@ ; INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] personality ptr @__hwasan_personality_thunk { ; INLINE-NEXT: entry: ; INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; INLINE-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3 ; INLINE-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64 @@ -146,7 +146,7 @@ ; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr ; INLINE-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8 ; INLINE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 -; INLINE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 144115188075855871 +; INLINE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], -9079256848778919937 ; INLINE-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4 ; INLINE-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]] ; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0 @@ -156,7 +156,7 @@ ; INLINE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 ; INLINE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 57 ; INLINE-NEXT: [[TMP29:%.*]] = trunc i64 [[TMP28]] to i8 -; INLINE-NEXT: [[TMP30:%.*]] = and i64 [[TMP27]], 144115188075855871 +; INLINE-NEXT: [[TMP30:%.*]] = and i64 [[TMP27]], -9079256848778919937 ; INLINE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4 ; INLINE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]] ; INLINE-NEXT: [[TMP33:%.*]] = load i8, ptr [[TMP32]], align 1 @@ -186,7 +186,7 @@ ; INLINE-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4 ; INLINE-NEXT: [[TMP50:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; INLINE-NEXT: [[TMP51:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 -; INLINE-NEXT: [[TMP52:%.*]] = and i64 [[TMP51]], 144115188075855871 +; INLINE-NEXT: [[TMP52:%.*]] = and i64 [[TMP51]], -9079256848778919937 ; INLINE-NEXT: [[TMP53:%.*]] = lshr i64 [[TMP52]], 4 ; INLINE-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP53]] ; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP54]], i8 [[TMP50]], i64 1, i1 false) diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll --- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll +++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll @@ -34,14 +34,14 @@ ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; ABORT-INLINE-NEXT: entry: ; ABORT-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; ABORT-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; ABORT-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; ABORT-INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64 ; ABORT-INLINE-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 57 ; ABORT-INLINE-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 -; ABORT-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 4 ; ABORT-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]] ; ABORT-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 @@ -75,14 +75,14 @@ ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; RECOVER-INLINE-NEXT: entry: ; RECOVER-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; RECOVER-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; RECOVER-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; RECOVER-INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64 ; RECOVER-INLINE-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 57 ; RECOVER-INLINE-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 -; RECOVER-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 4 ; RECOVER-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]] ; RECOVER-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 @@ -143,7 +143,7 @@ ; ABORT-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] { ; ABORT-INLINE-NEXT: entry: ; ABORT-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; ABORT-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; ABORT-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr @@ -156,7 +156,7 @@ ; RECOVER-INLINE-SAME: (ptr [[A:%.*]]) #[[ATTR0]] { ; RECOVER-INLINE-NEXT: entry: ; RECOVER-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; RECOVER-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; RECOVER-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr @@ -196,14 +196,14 @@ ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] { ; ABORT-INLINE-NEXT: entry: ; ABORT-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; ABORT-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; ABORT-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; ABORT-INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64 ; ABORT-INLINE-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 57 ; ABORT-INLINE-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 -; ABORT-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 4 ; ABORT-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]] ; ABORT-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 @@ -237,14 +237,14 @@ ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i8 [[B:%.*]]) #[[ATTR0]] { ; RECOVER-INLINE-NEXT: entry: ; RECOVER-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; RECOVER-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; RECOVER-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; RECOVER-INLINE-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[A]] to i64 ; RECOVER-INLINE-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP4]], 57 ; RECOVER-INLINE-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8 -; RECOVER-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP7:%.*]] = and i64 [[TMP4]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP8:%.*]] = lshr i64 [[TMP7]], 4 ; RECOVER-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]] ; RECOVER-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 @@ -305,7 +305,7 @@ ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] { ; ABORT-INLINE-NEXT: entry: ; ABORT-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; ABORT-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; ABORT-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr @@ -318,7 +318,7 @@ ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i40 [[B:%.*]]) #[[ATTR0]] { ; RECOVER-INLINE-NEXT: entry: ; RECOVER-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; RECOVER-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; RECOVER-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr @@ -358,7 +358,7 @@ ; ABORT-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { ; ABORT-INLINE-NEXT: entry: ; ABORT-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; ABORT-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; ABORT-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; ABORT-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; ABORT-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr @@ -371,7 +371,7 @@ ; RECOVER-INLINE-SAME: (ptr [[A:%.*]], i64 [[B:%.*]]) #[[ATTR0]] { ; RECOVER-INLINE-NEXT: entry: ; RECOVER-INLINE-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 -; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 144115188075855871 +; RECOVER-INLINE-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], -9079256848778919937 ; RECOVER-INLINE-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295 ; RECOVER-INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1 ; RECOVER-INLINE-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr