Index: llvm/lib/Analysis/InstructionSimplify.cpp =================================================================== --- llvm/lib/Analysis/InstructionSimplify.cpp +++ llvm/lib/Analysis/InstructionSimplify.cpp @@ -1052,17 +1052,17 @@ // X / 1 -> X // X % 1 -> 0 - // If this is a boolean op (single-bit element type), we can't have - // division-by-zero or remainder-by-zero, so assume the divisor is 1. - // Similarly, if we're zero-extending a boolean divisor, then assume it's a 1. - Value *X; - if (match(Op1, m_One()) || Ty->isIntOrIntVectorTy(1) || - (match(Op1, m_ZExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1))) + // If the divisor can only be zero or one, we can't have division-by-zero + // or remainder-by-zero, so assume the divisor is 1. + // e.g. 1, zext (i8 X), sdiv X (Y and 1) + KnownBits Known = computeKnownBits(Op1, Q.DL, 0, Q.AC, Q.CxtI, Q.DT); + if (Known.countMinLeadingZeros() >= Known.getBitWidth() - 1) return IsDiv ? Op0 : Constant::getNullValue(Ty); // If X * Y does not overflow, then: // X * Y / Y -> X // X * Y % Y -> 0 + Value *X; if (match(Op0, m_c_Mul(m_Value(X), m_Specific(Op1)))) { auto *Mul = cast(Op0); // The multiplication can't overflow if it is defined not to, or if Index: llvm/test/Transforms/InstCombine/zext-or-icmp.ll =================================================================== --- llvm/test/Transforms/InstCombine/zext-or-icmp.ll +++ llvm/test/Transforms/InstCombine/zext-or-icmp.ll @@ -248,7 +248,7 @@ ; CHECK-NEXT: store i32 [[ADD]], ptr [[F]], align 4 ; CHECK-NEXT: [[REM18:%.*]] = srem i32 [[LOR_EXT]], [[ADD]] ; CHECK-NEXT: [[CONV19:%.*]] = zext i32 [[REM18]] to i64 -; CHECK-NEXT: store i32 0, ptr [[D]], align 8 +; CHECK-NEXT: store i32 [[SROA38]], ptr [[D]], align 8 ; CHECK-NEXT: [[R:%.*]] = icmp ult i64 [[INSERT_INSERT41]], [[CONV19]] ; CHECK-NEXT: call void @llvm.assume(i1 [[R]]) ; CHECK-NEXT: ret i1 true Index: llvm/test/Transforms/InstSimplify/div.ll =================================================================== --- llvm/test/Transforms/InstSimplify/div.ll +++ llvm/test/Transforms/InstSimplify/div.ll @@ -437,9 +437,7 @@ define i32 @sdiv_one_srem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @sdiv_one_srem_divisor( -; CHECK-NEXT: [[SREM:%.*]] = srem i32 1, [[B:%.*]] -; CHECK-NEXT: [[SDIV:%.*]] = sdiv i32 [[A:%.*]], [[SREM]] -; CHECK-NEXT: ret i32 [[SDIV]] +; CHECK-NEXT: ret i32 [[A:%.*]] ; %srem = srem i32 1, %b %sdiv = sdiv i32 %a, %srem @@ -448,9 +446,7 @@ define i32 @sdiv_one_urem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @sdiv_one_urem_divisor( -; CHECK-NEXT: [[UREM:%.*]] = urem i32 1, [[B:%.*]] -; CHECK-NEXT: [[SDIV:%.*]] = sdiv i32 [[A:%.*]], [[UREM]] -; CHECK-NEXT: ret i32 [[SDIV]] +; CHECK-NEXT: ret i32 [[A:%.*]] ; %urem = urem i32 1, %b %sdiv = sdiv i32 %a, %urem @@ -459,9 +455,7 @@ define i32 @udiv_one_srem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @udiv_one_srem_divisor( -; CHECK-NEXT: [[SREM:%.*]] = srem i32 1, [[B:%.*]] -; CHECK-NEXT: [[UDIV:%.*]] = udiv i32 [[A:%.*]], [[SREM]] -; CHECK-NEXT: ret i32 [[UDIV]] +; CHECK-NEXT: ret i32 [[A:%.*]] ; %srem = srem i32 1, %b %udiv = udiv i32 %a, %srem @@ -470,9 +464,7 @@ define i32 @udiv_one_urem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @udiv_one_urem_divisor( -; CHECK-NEXT: [[UREM:%.*]] = urem i32 1, [[B:%.*]] -; CHECK-NEXT: [[UDIV:%.*]] = udiv i32 [[A:%.*]], [[UREM]] -; CHECK-NEXT: ret i32 [[UDIV]] +; CHECK-NEXT: ret i32 [[A:%.*]] ; %urem = urem i32 1, %b %udiv = udiv i32 %a, %urem @@ -481,9 +473,7 @@ define i32 @srem_one_srem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @srem_one_srem_divisor( -; CHECK-NEXT: [[SREM:%.*]] = srem i32 1, [[B:%.*]] -; CHECK-NEXT: [[SREM1:%.*]] = srem i32 [[A:%.*]], [[SREM]] -; CHECK-NEXT: ret i32 [[SREM1]] +; CHECK-NEXT: ret i32 0 ; %srem = srem i32 1, %b %srem1 = srem i32 %a, %srem @@ -492,9 +482,7 @@ define i32 @urem_one_srem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @urem_one_srem_divisor( -; CHECK-NEXT: [[SREM:%.*]] = srem i32 1, [[B:%.*]] -; CHECK-NEXT: [[UREM:%.*]] = urem i32 [[A:%.*]], [[SREM]] -; CHECK-NEXT: ret i32 [[UREM]] +; CHECK-NEXT: ret i32 0 ; %srem = srem i32 1, %b %urem = urem i32 %a, %srem @@ -503,9 +491,7 @@ define i32 @srem_one_urem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @srem_one_urem_divisor( -; CHECK-NEXT: [[UREM:%.*]] = urem i32 1, [[B:%.*]] -; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[A:%.*]], [[UREM]] -; CHECK-NEXT: ret i32 [[SREM]] +; CHECK-NEXT: ret i32 0 ; %urem = urem i32 1, %b %srem = srem i32 %a, %urem @@ -514,9 +500,7 @@ define i32 @urem_one_urem_divisor(i32 %a, i32 %b) { ; CHECK-LABEL: @urem_one_urem_divisor( -; CHECK-NEXT: [[UREM:%.*]] = urem i32 1, [[B:%.*]] -; CHECK-NEXT: [[UREM1:%.*]] = urem i32 [[A:%.*]], [[UREM]] -; CHECK-NEXT: ret i32 [[UREM1]] +; CHECK-NEXT: ret i32 0 ; %urem = urem i32 1, %b %urem1 = urem i32 %a, %urem @@ -525,9 +509,7 @@ define <2 x i8> @sdiv_one_vec_srem_divisor(<2 x i8> %a, <2 x i8> %b) { ; CHECK-LABEL: @sdiv_one_vec_srem_divisor( -; CHECK-NEXT: [[SREM:%.*]] = srem <2 x i8> , [[B:%.*]] -; CHECK-NEXT: [[SDIV:%.*]] = sdiv <2 x i8> [[A:%.*]], [[SREM]] -; CHECK-NEXT: ret <2 x i8> [[SDIV]] +; CHECK-NEXT: ret <2 x i8> [[A:%.*]] ; %srem = srem <2 x i8> , %b %sdiv = sdiv <2 x i8> %a, %srem @@ -536,9 +518,7 @@ define i32 @sdiv_and_one_divisor(i32 %x, i32 %y) { ; CHECK-LABEL: @sdiv_and_one_divisor( -; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 1 -; CHECK-NEXT: [[RES:%.*]] = sdiv i32 [[Y:%.*]], [[AND]] -; CHECK-NEXT: ret i32 [[RES]] +; CHECK-NEXT: ret i32 [[Y:%.*]] ; %and = and i32 %x, 1 %res = sdiv i32 %y, %and @@ -547,9 +527,7 @@ define <2 x i8> @sdiv_and_one_vec_divisor(<2 x i8> %x, <2 x i8> %y) { ; CHECK-LABEL: @sdiv_and_one_vec_divisor( -; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[RES:%.*]] = sdiv <2 x i8> [[Y:%.*]], [[AND]] -; CHECK-NEXT: ret <2 x i8> [[RES]] +; CHECK-NEXT: ret <2 x i8> [[Y:%.*]] ; %and = and <2 x i8> %x, %res = sdiv <2 x i8> %y, %and @@ -558,10 +536,7 @@ define i32 @sdiv_neg_or_divisor(i32 %x, i32 %y) { ; CHECK-LABEL: @sdiv_neg_or_divisor( -; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2 -; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[OR]], -1 -; CHECK-NEXT: [[RES:%.*]] = sdiv i32 [[Y:%.*]], [[NEG]] -; CHECK-NEXT: ret i32 [[RES]] +; CHECK-NEXT: ret i32 [[Y:%.*]] ; %or = or i32 %x, -2 %neg = xor i32 %or, -1