Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -221,6 +221,9 @@ bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, SmallVectorImpl &Instructions); + bool expandTrunc(MCInst &Inst, bool isDouble, bool is64Bit, SMLoc IDLoc, + SmallVectorImpl &Instructions); + bool expandUlw(MCInst &Inst, SMLoc IDLoc, SmallVectorImpl &Instructions); @@ -2037,6 +2040,16 @@ case Mips::DUDivMacro: return expandDiv(Inst, IDLoc, Instructions, true, false) ? MER_Fail : MER_Success; + case Mips::PseudoTRUNC_W_S: + return expandTrunc(Inst, false, false, IDLoc, Instructions) ? MER_Fail + : MER_Success; + case Mips::PseudoTRUNC_W_D32: + return expandTrunc(Inst, true, false, IDLoc, Instructions) ? MER_Fail + : MER_Success; + case Mips::PseudoTRUNC_W_D: + return expandTrunc(Inst, true, true, IDLoc, Instructions) ? MER_Fail + : MER_Success; + case Mips::Ulh: return expandUlh(Inst, true, IDLoc, Instructions) ? MER_Fail : MER_Success; case Mips::Ulhu: @@ -3027,6 +3040,47 @@ return false; } +bool MipsAsmParser::expandTrunc(MCInst &Inst, bool isDouble, bool is64Bit, + SMLoc IDLoc, + SmallVectorImpl &Instructions) { + + assert(Inst.getNumOperands() == 3 && "Invalid operand count"); + assert(Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg() && + Inst.getOperand(2).isReg() && "Invalid instruction operand."); + + unsigned FirstReg = Inst.getOperand(0).getReg(); + unsigned SecondReg = Inst.getOperand(1).getReg(); + unsigned ThirdReg = Inst.getOperand(2).getReg(); + + if (hasMips1() && !hasMips2()) { + unsigned ATReg = getATReg(IDLoc); + if (!ATReg) + return true; + emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, Instructions); + emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, Instructions); + if (AssemblerOptions.back()->isReorder()) + createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions); + emitRRI(Mips::ORi, ATReg, ThirdReg, 0x3, IDLoc, Instructions); + emitRRI(Mips::XORi, ATReg, ATReg, 0x2, IDLoc, Instructions); + emitRR(Mips::CTC1, Mips::RA, ATReg, IDLoc, Instructions); + if (AssemblerOptions.back()->isReorder()) + createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions); + emitRR(isDouble ? (is64Bit ? Mips::CVT_W_D64 : Mips::CVT_W_D32) + : Mips::CVT_W_S, + FirstReg, SecondReg, IDLoc, Instructions); + emitRR(Mips::CTC1, Mips::RA, ThirdReg, IDLoc, Instructions); + if (isDouble && AssemblerOptions.back()->isReorder()) + createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Instructions); + return false; + } + + emitRR(isDouble ? (is64Bit ? Mips::TRUNC_W_D64 : Mips::TRUNC_W_D32) + : Mips::TRUNC_W_S, + FirstReg, SecondReg, IDLoc, Instructions); + + return false; +} + bool MipsAsmParser::expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, SmallVectorImpl &Instructions) { if (hasMips32r6() || hasMips64r6()) { Index: lib/Target/Mips/MipsInstrFPU.td =================================================================== --- lib/Target/Mips/MipsInstrFPU.td +++ lib/Target/Mips/MipsInstrFPU.td @@ -551,6 +551,15 @@ def ExtractElementF64 : ExtractElementF64Base, FGR_32, HARDFLOAT; def ExtractElementF64_64 : ExtractElementF64Base, FGR_64, HARDFLOAT; +def PseudoTRUNC_W_S : MipsAsmPseudoInst<(outs FGR32Opnd : $fd), + (ins FGR32Opnd : $fs, GPR32Opnd : $rs), "trunc.w.s\t$fd, $fs, $rs">; + +def PseudoTRUNC_W_D32 : MipsAsmPseudoInst<(outs FGR32Opnd : $fd), + (ins AFGR64Opnd : $fs, GPR32Opnd : $rs), "trunc.w.d\t$fd, $fs, $rs">, FGR_32, HARDFLOAT; + +def PseudoTRUNC_W_D : MipsAsmPseudoInst<(outs FGR32Opnd : $fd), + (ins FGR64Opnd : $fs, GPR32Opnd : $rs), "trunc.w.d\t$fd, $fs, $rs">, FGR_64, HARDFLOAT; + //===----------------------------------------------------------------------===// // InstAliases. //===----------------------------------------------------------------------===// Index: test/MC/Mips/mips1/valid.s =================================================================== --- test/MC/Mips/mips1/valid.s +++ test/MC/Mips/mips1/valid.s @@ -123,4 +123,28 @@ xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] + .set at + trunc.w.s $f4,$f6,$4 + # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] + # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] + # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + # CHECK: ori $1, $4, 3 # encoding: [0x34,0x81,0x00,0x03] + # CHECK: xori $1, $1, 2 # encoding: [0x38,0x21,0x00,0x02] + # CHECK: ctc1 $1, $ra # encoding: [0x44,0xc1,0xf8,0x00] + # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + # CHECK: cvt.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x24] + # CHECK: ctc1 $4, $ra # encoding: [0x44,0xc4,0xf8,0x00] + + trunc.w.d $f4,$f6,$4 + # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] + # CHECK: cfc1 $4, $ra # encoding: [0x44,0x44,0xf8,0x00] + # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + # CHECK: ori $1, $4, 3 # encoding: [0x34,0x81,0x00,0x03] + # CHECK: xori $1, $1, 2 # encoding: [0x38,0x21,0x00,0x02] + # CHECK: ctc1 $1, $ra # encoding: [0x44,0xc1,0xf8,0x00] + # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + # CHECK: cvt.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x24] + # CHECK: ctc1 $4, $ra # encoding: [0x44,0xc4,0xf8,0x00] + # CHECK: nop # encoding: [0x00,0x00,0x00,0x00] + 1: Index: test/MC/Mips/mips2/valid.s =================================================================== --- test/MC/Mips/mips2/valid.s +++ test/MC/Mips/mips2/valid.s @@ -167,8 +167,10 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips3/valid.s =================================================================== --- test/MC/Mips/mips3/valid.s +++ test/MC/Mips/mips3/valid.s @@ -231,10 +231,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips32/valid.s =================================================================== --- test/MC/Mips/mips32/valid.s +++ test/MC/Mips/mips32/valid.s @@ -197,8 +197,10 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips32r2/valid.s =================================================================== --- test/MC/Mips/mips32r2/valid.s +++ test/MC/Mips/mips32r2/valid.s @@ -234,8 +234,10 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] wsbh $k1,$9 xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips32r3/valid.s =================================================================== --- test/MC/Mips/mips32r3/valid.s +++ test/MC/Mips/mips32r3/valid.s @@ -234,8 +234,10 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] wsbh $k1,$9 xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips32r5/valid.s =================================================================== --- test/MC/Mips/mips32r5/valid.s +++ test/MC/Mips/mips32r5/valid.s @@ -235,8 +235,10 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f14 # encoding: [0x46,0x20,0x75,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] wsbh $k1,$9 xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips4/valid.s =================================================================== --- test/MC/Mips/mips4/valid.s +++ test/MC/Mips/mips4/valid.s @@ -260,10 +260,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips5/valid.s =================================================================== --- test/MC/Mips/mips5/valid.s +++ test/MC/Mips/mips5/valid.s @@ -262,10 +262,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips64/valid.s =================================================================== --- test/MC/Mips/mips64/valid.s +++ test/MC/Mips/mips64/valid.s @@ -281,10 +281,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] Index: test/MC/Mips/mips64r2/valid.s =================================================================== --- test/MC/Mips/mips64r2/valid.s +++ test/MC/Mips/mips64r2/valid.s @@ -307,10 +307,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9 Index: test/MC/Mips/mips64r3/valid.s =================================================================== --- test/MC/Mips/mips64r3/valid.s +++ test/MC/Mips/mips64r3/valid.s @@ -307,10 +307,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9 Index: test/MC/Mips/mips64r5/valid.s =================================================================== --- test/MC/Mips/mips64r5/valid.s +++ test/MC/Mips/mips64r5/valid.s @@ -308,10 +308,12 @@ tne $6,$17 # CHECK: tne $6, $17 # encoding: [0x00,0xd1,0x00,0x36] tne $7,$8,885 # CHECK: tne $7, $8, 885 # encoding: [0x00,0xe8,0xdd,0x76] tnei $12,-29647 - trunc.l.d $f23,$f23 - trunc.l.s $f28,$f31 - trunc.w.d $f22,$f15 - trunc.w.s $f28,$f30 + trunc.l.d $f23,$f23 # CHECK: trunc.l.d $f23, $f23 # encoding: [0x46,0x20,0xbd,0xc9] + trunc.l.s $f28,$f31 # CHECK: trunc.l.s $f28, $f31 # encoding: [0x46,0x00,0xff,0x09] + trunc.w.d $f22,$f15 # CHECK: trunc.w.d $f22, $f15 # encoding: [0x46,0x20,0x7d,0x8d] + trunc.w.s $f28,$f30 # CHECK: trunc.w.s $f28, $f30 # encoding: [0x46,0x00,0xf7,0x0d] + trunc.w.d $f4,$f6,$4 # CHECK: trunc.w.d $f4, $f6 # encoding: [0x46,0x20,0x31,0x0d] + trunc.w.s $f4,$f6,$4 # CHECK: trunc.w.s $f4, $f6 # encoding: [0x46,0x00,0x31,0x0d] xor $s2,$a0,$s8 xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] wsbh $k1,$9