diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h --- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h @@ -145,7 +145,7 @@ /// that bit's value is legal. E.g. if bit 64 is set, then 64 bit scalar /// stores are legal. DenseMap LegalStoreSizes; - bool IsPreLegalizer; + bool IsPreLegalizer = false; /// Contains instructions to be erased at the end of a block scan. SmallSet InstsToErase; diff --git a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h --- a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h +++ b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h @@ -71,7 +71,7 @@ MachineFunction *MF = nullptr; const TargetRegisterInfo *TRI = nullptr; LoopTraversal::TraversalOrder TraversedMBBOrder; - unsigned NumRegUnits; + unsigned NumRegUnits = 0; /// Instruction that defined each register, relative to the beginning of the /// current basic block. When a LiveRegsDefInfo is used to represent a /// live-out register, this value is relative to the end of the basic block, @@ -87,7 +87,7 @@ /// Current instruction number. /// The first instruction in each basic block is 0. - int CurInstr; + int CurInstr = -1; /// Maps instructions to their instruction Ids, relative to the beginning of /// their basic blocks. diff --git a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h --- a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h +++ b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -152,7 +152,7 @@ MachineBasicBlock::iterator RegionEnd; /// Instructions in this region (distance(RegionBegin, RegionEnd)). - unsigned NumRegionInstrs; + unsigned NumRegionInstrs = 0; /// After calling BuildSchedGraph, each machine instruction in the current /// scheduling region is mapped to an SUnit. diff --git a/llvm/lib/CodeGen/BranchFolding.h b/llvm/lib/CodeGen/BranchFolding.h --- a/llvm/lib/CodeGen/BranchFolding.h +++ b/llvm/lib/CodeGen/BranchFolding.h @@ -113,10 +113,10 @@ }; std::vector SameTails; - bool AfterBlockPlacement; - bool EnableTailMerge; - bool EnableHoistCommonCode; - bool UpdateLiveIns; + bool AfterBlockPlacement = false; + bool EnableTailMerge = false; + bool EnableHoistCommonCode = false; + bool UpdateLiveIns = false; unsigned MinCommonTailLength; const TargetInstrInfo *TII = nullptr; const MachineRegisterInfo *MRI = nullptr; diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -3247,7 +3247,7 @@ bool IgnoreProfitability; /// True if we are optimizing for size. - bool OptSize; + bool OptSize = false; ProfileSummaryInfo *PSI; BlockFrequencyInfo *BFI; diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp --- a/llvm/lib/CodeGen/IfConversion.cpp +++ b/llvm/lib/CodeGen/IfConversion.cpp @@ -197,8 +197,8 @@ LivePhysRegs Redefs; - bool PreRegAlloc; - bool MadeChange; + bool PreRegAlloc = true; + bool MadeChange = false; int FnNum = -1; std::function PredicateFtor; diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp --- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp +++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp @@ -411,7 +411,7 @@ /// True: use block profile count to compute tail duplication cost. /// False: use block frequency to compute tail duplication cost. - bool UseProfileCount; + bool UseProfileCount = false; /// Allocator and owner of BlockChain structures. /// diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp --- a/llvm/lib/CodeGen/MachineCombiner.cpp +++ b/llvm/lib/CodeGen/MachineCombiner.cpp @@ -78,7 +78,7 @@ TargetSchedModel TSchedModel; /// True if optimizing for code size. - bool OptSize; + bool OptSize = false; public: static char ID; diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp --- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp +++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp @@ -393,7 +393,7 @@ CopyTracker Tracker; - bool Changed; + bool Changed = false; }; } // end anonymous namespace diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -118,8 +118,8 @@ const MachineFrameInfo *MFI = nullptr; MachineRegisterInfo *MRI = nullptr; TargetSchedModel SchedModel; - bool PreRegAlloc; - bool HasProfileData; + bool PreRegAlloc = false; + bool HasProfileData = false; // Various analyses that we use... AliasAnalysis *AA = nullptr; // Alias analysis info. @@ -128,8 +128,8 @@ MachineDominatorTree *DT = nullptr; // Machine dominator tree for the cur loop // State that is updated as we process loops - bool Changed; // True if a loop is changed. - bool FirstInLoop; // True if it's the first LICM in the loop. + bool Changed = false; // True if a loop is changed. + bool FirstInLoop = false; // True if it's the first LICM in the loop. MachineLoop *CurLoop = nullptr; // The current loop we are working on. MachineBasicBlock *CurPreheader = nullptr; // The preheader for CurLoop. @@ -163,7 +163,7 @@ // If a MBB does not dominate loop exiting blocks then it may not safe // to hoist loads from this block. // Tri-state: 0 - false, 1 - true, 2 - unknown - unsigned SpeculationState; + unsigned SpeculationState = SpeculateUnknown; public: MachineLICMBase(char &PassID, bool PreRegAlloc) diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -102,12 +102,12 @@ const MachineRegisterInfo *MRI = nullptr; const RegisterBankInfo *RBI = nullptr; - unsigned foundErrors; + unsigned foundErrors = 0; // Avoid querying the MachineFunctionProperties for each operand. - bool isFunctionRegBankSelected; - bool isFunctionSelected; - bool isFunctionTracksDebugUserValues; + bool isFunctionRegBankSelected = false; + bool isFunctionSelected = false; + bool isFunctionTracksDebugUserValues = false; using RegVector = SmallVector; using RegMaskVector = SmallVector; diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp --- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp +++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp @@ -111,11 +111,11 @@ // Flag to control whether to use the register scavenger to resolve // frame index materialization registers. Set according to // TRI->requiresFrameIndexScavenging() for the current function. - bool FrameIndexVirtualScavenging; + bool FrameIndexVirtualScavenging = false; // Flag to control whether the scavenger should be passed even though // FrameIndexVirtualScavenging is used. - bool FrameIndexEliminationScavenging; + bool FrameIndexEliminationScavenging = false; // Emit remarks. MachineOptimizationRemarkEmitter *ORE = nullptr; diff --git a/llvm/lib/CodeGen/RegAllocGreedy.h b/llvm/lib/CodeGen/RegAllocGreedy.h --- a/llvm/lib/CodeGen/RegAllocGreedy.h +++ b/llvm/lib/CodeGen/RegAllocGreedy.h @@ -204,7 +204,7 @@ CO_Interf = 2 }; - uint8_t CutOffInfo; + uint8_t CutOffInfo = CutOffStage::CO_None; #ifndef NDEBUG static const char *const StageName[]; @@ -278,9 +278,9 @@ /// Flags for the live range priority calculation, determined once per /// machine function. - bool RegClassPriorityTrumpsGlobalness; + bool RegClassPriorityTrumpsGlobalness = false; - bool ReverseLocalAssignment; + bool ReverseLocalAssignment = false; public: RAGreedy(const RegClassFilterFunc F = allocateAllRegClasses); diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp --- a/llvm/lib/CodeGen/ShrinkWrap.cpp +++ b/llvm/lib/CodeGen/ShrinkWrap.cpp @@ -135,13 +135,13 @@ MachineOptimizationRemarkEmitter *ORE = nullptr; /// Frequency of the Entry block. - uint64_t EntryFreq; + uint64_t EntryFreq = 0; /// Current opcode for frame setup. - unsigned FrameSetupOpcode; + unsigned FrameSetupOpcode = ~0u; /// Current opcode for frame destroy. - unsigned FrameDestroyOpcode; + unsigned FrameDestroyOpcode = ~0u; /// Stack pointer register, used by llvm.{savestack,restorestack} Register SP; diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp --- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -95,7 +95,7 @@ LiveVariables *LV = nullptr; LiveIntervals *LIS = nullptr; AliasAnalysis *AA = nullptr; - CodeGenOpt::Level OptLevel; + CodeGenOpt::Level OptLevel = CodeGenOpt::None; // The current basic block being processed. MachineBasicBlock *MBB = nullptr;