diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -8937,6 +8937,24 @@
       return DAG.getNode(ISD::OR, dl, VT, Shift, DAG.getConstant(1, dl, VT));
     }
 
+    // Check for SMAX(lhs, 0) and SMIN(lhs, 0) patterns.
+    // (SELECT_CC setgt, lhs, 0, lhs, 0) -> (BIC lhs, (SRA lhs, typesize-1))
+    // (SELECT_CC setlt, lhs, 0, lhs, 0) -> (AND lhs, (SRA lhs, typesize-1))
+    // Both require less instructions than compare and conditional select.
+    if ((CC == ISD::SETGT || CC == ISD::SETLT) && LHS == TVal &&
+        RHSC && RHSC->isZero() && CFVal && CFVal->isZero() &&
+        LHS.getValueType() == RHS.getValueType()) {
+      EVT VT = LHS.getValueType();
+      SDValue Shift =
+          DAG.getNode(ISD::SRA, dl, VT, LHS,
+                      DAG.getConstant(VT.getSizeInBits() - 1, dl, VT));
+
+      if (CC == ISD::SETGT)
+        Shift = DAG.getNOT(dl, Shift, VT);
+
+      return DAG.getNode(ISD::AND, dl, VT, LHS, Shift);
+    }
+
     unsigned Opcode = AArch64ISD::CSEL;
 
     // If both the TVal and the FVal are constants, see if we can swap them in
diff --git a/llvm/test/CodeGen/AArch64/fpclamptosat.ll b/llvm/test/CodeGen/AArch64/fpclamptosat.ll
--- a/llvm/test/CodeGen/AArch64/fpclamptosat.ll
+++ b/llvm/test/CodeGen/AArch64/fpclamptosat.ll
@@ -157,10 +157,10 @@
 ; CHECK-LABEL: stest_f64i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -178,7 +178,7 @@
 ; CHECK-LABEL: utest_f64i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzu w8, d0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w0, w8, w9, lo
 ; CHECK-NEXT:    ret
@@ -194,7 +194,7 @@
 ; CHECK-LABEL: ustest_f64i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
 ; CHECK-NEXT:    bic w0, w8, w8, asr #31
@@ -213,10 +213,10 @@
 ; CHECK-LABEL: stest_f32i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -234,7 +234,7 @@
 ; CHECK-LABEL: utest_f32i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzu w8, s0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w0, w8, w9, lo
 ; CHECK-NEXT:    ret
@@ -250,7 +250,7 @@
 ; CHECK-LABEL: ustest_f32i16:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
 ; CHECK-NEXT:    bic w0, w8, w8, asr #31
@@ -269,11 +269,11 @@
 ; CHECK-CVT-LABEL: stest_f16i16:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #32767
+; CHECK-CVT-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
-; CHECK-CVT-NEXT:    mov w9, #-32768
+; CHECK-CVT-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-CVT-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -281,10 +281,10 @@
 ; CHECK-FP16-LABEL: stest_f16i16:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #32767
+; CHECK-FP16-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
-; CHECK-FP16-NEXT:    mov w9, #-32768
+; CHECK-FP16-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-FP16-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -302,7 +302,7 @@
 ; CHECK-CVT-LABEL: utesth_f16i16:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #65535
+; CHECK-CVT-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-CVT-NEXT:    fcvtzu w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, lo
@@ -311,7 +311,7 @@
 ; CHECK-FP16-LABEL: utesth_f16i16:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzu w8, h0
-; CHECK-FP16-NEXT:    mov w9, #65535
+; CHECK-FP16-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, lo
 ; CHECK-FP16-NEXT:    ret
@@ -327,7 +327,7 @@
 ; CHECK-CVT-LABEL: ustest_f16i16:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #65535
+; CHECK-CVT-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
@@ -337,7 +337,7 @@
 ; CHECK-FP16-LABEL: ustest_f16i16:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #65535
+; CHECK-FP16-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
 ; CHECK-FP16-NEXT:    bic w0, w8, w8, asr #31
@@ -679,10 +679,10 @@
 ; CHECK-LABEL: stest_f64i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -698,7 +698,7 @@
 ; CHECK-LABEL: utest_f64i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzu w8, d0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w0, w8, w9, lo
 ; CHECK-NEXT:    ret
@@ -713,11 +713,10 @@
 ; CHECK-LABEL: ustest_f64i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    cmp w8, #0
-; CHECK-NEXT:    csel w0, w8, wzr, gt
+; CHECK-NEXT:    bic w0, w8, w8, asr #31
 ; CHECK-NEXT:    ret
 entry:
   %conv = fptosi double %x to i32
@@ -731,10 +730,10 @@
 ; CHECK-LABEL: stest_f32i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -750,7 +749,7 @@
 ; CHECK-LABEL: utest_f32i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzu w8, s0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w0, w8, w9, lo
 ; CHECK-NEXT:    ret
@@ -765,11 +764,10 @@
 ; CHECK-LABEL: ustest_f32i16_mm:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #65535
+; CHECK-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    cmp w8, #0
-; CHECK-NEXT:    csel w0, w8, wzr, gt
+; CHECK-NEXT:    bic w0, w8, w8, asr #31
 ; CHECK-NEXT:    ret
 entry:
   %conv = fptosi float %x to i32
@@ -783,11 +781,11 @@
 ; CHECK-CVT-LABEL: stest_f16i16_mm:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #32767
+; CHECK-CVT-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
-; CHECK-CVT-NEXT:    mov w9, #-32768
+; CHECK-CVT-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-CVT-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -795,10 +793,10 @@
 ; CHECK-FP16-LABEL: stest_f16i16_mm:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #32767
+; CHECK-FP16-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
-; CHECK-FP16-NEXT:    mov w9, #-32768
+; CHECK-FP16-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-FP16-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -814,7 +812,7 @@
 ; CHECK-CVT-LABEL: utesth_f16i16_mm:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #65535
+; CHECK-CVT-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-CVT-NEXT:    fcvtzu w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, lo
@@ -823,7 +821,7 @@
 ; CHECK-FP16-LABEL: utesth_f16i16_mm:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzu w8, h0
-; CHECK-FP16-NEXT:    mov w9, #65535
+; CHECK-FP16-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, lo
 ; CHECK-FP16-NEXT:    ret
@@ -838,22 +836,20 @@
 ; CHECK-CVT-LABEL: ustest_f16i16_mm:
 ; CHECK-CVT:       // %bb.0: // %entry
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #65535
+; CHECK-CVT-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
-; CHECK-CVT-NEXT:    cmp w8, #0
-; CHECK-CVT-NEXT:    csel w0, w8, wzr, gt
+; CHECK-CVT-NEXT:    bic w0, w8, w8, asr #31
 ; CHECK-CVT-NEXT:    ret
 ;
 ; CHECK-FP16-LABEL: ustest_f16i16_mm:
 ; CHECK-FP16:       // %bb.0: // %entry
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #65535
+; CHECK-FP16-NEXT:    mov w9, #65535 // =0xffff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
-; CHECK-FP16-NEXT:    cmp w8, #0
-; CHECK-FP16-NEXT:    csel w0, w8, wzr, gt
+; CHECK-FP16-NEXT:    bic w0, w8, w8, asr #31
 ; CHECK-FP16-NEXT:    ret
 entry:
   %conv = fptosi half %x to i32
diff --git a/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll b/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
--- a/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
+++ b/llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
@@ -21,9 +21,7 @@
 ; CHECK-LABEL: test_signed_i1_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    cmp w8, #0
-; CHECK-NEXT:    csel w8, w8, wzr, lt
-; CHECK-NEXT:    cmp w8, #0
+; CHECK-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-NEXT:    csinv w8, w8, wzr, ge
 ; CHECK-NEXT:    and w0, w8, #0x1
 ; CHECK-NEXT:    ret
@@ -35,10 +33,10 @@
 ; CHECK-LABEL: test_signed_i8_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w9, s0
-; CHECK-NEXT:    mov w8, #127
+; CHECK-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-NEXT:    cmp w9, #127
 ; CHECK-NEXT:    csel w8, w9, w8, lt
-; CHECK-NEXT:    mov w9, #-128
+; CHECK-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-NEXT:    cmn w8, #128
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -50,10 +48,10 @@
 ; CHECK-LABEL: test_signed_i13_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w9, s0
-; CHECK-NEXT:    mov w8, #4095
+; CHECK-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-NEXT:    cmp w9, #4095
 ; CHECK-NEXT:    csel w8, w9, w8, lt
-; CHECK-NEXT:    mov w9, #-4096
+; CHECK-NEXT:    mov w9, #-4096 // =0xfffff000
 ; CHECK-NEXT:    cmn w8, #1, lsl #12 // =4096
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -65,10 +63,10 @@
 ; CHECK-LABEL: test_signed_i16_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -80,10 +78,10 @@
 ; CHECK-LABEL: test_signed_i19_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, s0
-; CHECK-NEXT:    mov w9, #262143
+; CHECK-NEXT:    mov w9, #262143 // =0x3ffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-262144
+; CHECK-NEXT:    mov w9, #-262144 // =0xfffc0000
 ; CHECK-NEXT:    cmn w8, #64, lsl #12 // =262144
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -104,10 +102,10 @@
 ; CHECK-LABEL: test_signed_i50_f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs x8, s0
-; CHECK-NEXT:    mov x9, #562949953421311
+; CHECK-NEXT:    mov x9, #562949953421311 // =0x1ffffffffffff
 ; CHECK-NEXT:    cmp x8, x9
 ; CHECK-NEXT:    csel x8, x8, x9, lt
-; CHECK-NEXT:    mov x9, #-562949953421312
+; CHECK-NEXT:    mov x9, #-562949953421312 // =0xfffe000000000000
 ; CHECK-NEXT:    cmp x8, x9
 ; CHECK-NEXT:    csel x0, x8, x9, gt
 ; CHECK-NEXT:    ret
@@ -132,12 +130,12 @@
 ; CHECK-NEXT:    fmov s8, s0
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v0.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
-; CHECK-NEXT:    mov x10, #34359738367
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
+; CHECK-NEXT:    mov x10, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s0
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    mov x8, #-34359738368
+; CHECK-NEXT:    mov x8, #-34359738368 // =0xfffffff800000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp s8, s0
@@ -160,12 +158,12 @@
 ; CHECK-NEXT:    fmov s8, s0
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v0.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
-; CHECK-NEXT:    mov x10, #9223372036854775807
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
+; CHECK-NEXT:    mov x10, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s0
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    mov x8, #-9223372036854775808
+; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp s8, s0
@@ -199,9 +197,7 @@
 ; CHECK-LABEL: test_signed_i1_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    cmp w8, #0
-; CHECK-NEXT:    csel w8, w8, wzr, lt
-; CHECK-NEXT:    cmp w8, #0
+; CHECK-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-NEXT:    csinv w8, w8, wzr, ge
 ; CHECK-NEXT:    and w0, w8, #0x1
 ; CHECK-NEXT:    ret
@@ -213,10 +209,10 @@
 ; CHECK-LABEL: test_signed_i8_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w9, d0
-; CHECK-NEXT:    mov w8, #127
+; CHECK-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-NEXT:    cmp w9, #127
 ; CHECK-NEXT:    csel w8, w9, w8, lt
-; CHECK-NEXT:    mov w9, #-128
+; CHECK-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-NEXT:    cmn w8, #128
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -228,10 +224,10 @@
 ; CHECK-LABEL: test_signed_i13_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w9, d0
-; CHECK-NEXT:    mov w8, #4095
+; CHECK-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-NEXT:    cmp w9, #4095
 ; CHECK-NEXT:    csel w8, w9, w8, lt
-; CHECK-NEXT:    mov w9, #-4096
+; CHECK-NEXT:    mov w9, #-4096 // =0xfffff000
 ; CHECK-NEXT:    cmn w8, #1, lsl #12 // =4096
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -243,10 +239,10 @@
 ; CHECK-LABEL: test_signed_i16_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-32768
+; CHECK-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -258,10 +254,10 @@
 ; CHECK-LABEL: test_signed_i19_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs w8, d0
-; CHECK-NEXT:    mov w9, #262143
+; CHECK-NEXT:    mov w9, #262143 // =0x3ffff
 ; CHECK-NEXT:    cmp w8, w9
 ; CHECK-NEXT:    csel w8, w8, w9, lt
-; CHECK-NEXT:    mov w9, #-262144
+; CHECK-NEXT:    mov w9, #-262144 // =0xfffc0000
 ; CHECK-NEXT:    cmn w8, #64, lsl #12 // =262144
 ; CHECK-NEXT:    csel w0, w8, w9, gt
 ; CHECK-NEXT:    ret
@@ -282,10 +278,10 @@
 ; CHECK-LABEL: test_signed_i50_f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    fcvtzs x8, d0
-; CHECK-NEXT:    mov x9, #562949953421311
+; CHECK-NEXT:    mov x9, #562949953421311 // =0x1ffffffffffff
 ; CHECK-NEXT:    cmp x8, x9
 ; CHECK-NEXT:    csel x8, x8, x9, lt
-; CHECK-NEXT:    mov x9, #-562949953421312
+; CHECK-NEXT:    mov x9, #-562949953421312 // =0xfffe000000000000
 ; CHECK-NEXT:    cmp x8, x9
 ; CHECK-NEXT:    csel x0, x8, x9, gt
 ; CHECK-NEXT:    ret
@@ -309,14 +305,14 @@
 ; CHECK-NEXT:    str x30, [sp, #8] // 8-byte Folded Spill
 ; CHECK-NEXT:    fmov d8, d0
 ; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4170333254945079296
-; CHECK-NEXT:    mov x10, #34359738367
+; CHECK-NEXT:    mov x8, #-4170333254945079296 // =0xc620000000000000
+; CHECK-NEXT:    mov x10, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    mov x8, #5053038781909696511
+; CHECK-NEXT:    mov x8, #5053038781909696511 // =0x461fffffffffffff
 ; CHECK-NEXT:    fcmp d8, d0
 ; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    mov x8, #-34359738368
+; CHECK-NEXT:    mov x8, #-34359738368 // =0xfffffff800000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp d8, d0
@@ -338,14 +334,14 @@
 ; CHECK-NEXT:    str x30, [sp, #8] // 8-byte Folded Spill
 ; CHECK-NEXT:    fmov d8, d0
 ; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4044232465378705408
-; CHECK-NEXT:    mov x10, #9223372036854775807
+; CHECK-NEXT:    mov x8, #-4044232465378705408 // =0xc7e0000000000000
+; CHECK-NEXT:    mov x10, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    mov x8, #5179139571476070399
+; CHECK-NEXT:    mov x8, #5179139571476070399 // =0x47dfffffffffffff
 ; CHECK-NEXT:    fcmp d8, d0
 ; CHECK-NEXT:    fmov d0, x8
-; CHECK-NEXT:    mov x8, #-9223372036854775808
+; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp d8, d0
@@ -380,9 +376,7 @@
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
-; CHECK-CVT-NEXT:    cmp w8, #0
-; CHECK-CVT-NEXT:    csel w8, w8, wzr, lt
-; CHECK-CVT-NEXT:    cmp w8, #0
+; CHECK-CVT-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-CVT-NEXT:    csinv w8, w8, wzr, ge
 ; CHECK-CVT-NEXT:    and w0, w8, #0x1
 ; CHECK-CVT-NEXT:    ret
@@ -390,9 +384,7 @@
 ; CHECK-FP16-LABEL: test_signed_i1_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    cmp w8, #0
-; CHECK-FP16-NEXT:    csel w8, w8, wzr, lt
-; CHECK-FP16-NEXT:    cmp w8, #0
+; CHECK-FP16-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-FP16-NEXT:    csinv w8, w8, wzr, ge
 ; CHECK-FP16-NEXT:    and w0, w8, #0x1
 ; CHECK-FP16-NEXT:    ret
@@ -404,11 +396,11 @@
 ; CHECK-CVT-LABEL: test_signed_i8_f16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w8, #127
+; CHECK-CVT-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-CVT-NEXT:    fcvtzs w9, s0
 ; CHECK-CVT-NEXT:    cmp w9, #127
 ; CHECK-CVT-NEXT:    csel w8, w9, w8, lt
-; CHECK-CVT-NEXT:    mov w9, #-128
+; CHECK-CVT-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-CVT-NEXT:    cmn w8, #128
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -416,10 +408,10 @@
 ; CHECK-FP16-LABEL: test_signed_i8_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs w9, h0
-; CHECK-FP16-NEXT:    mov w8, #127
+; CHECK-FP16-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-FP16-NEXT:    cmp w9, #127
 ; CHECK-FP16-NEXT:    csel w8, w9, w8, lt
-; CHECK-FP16-NEXT:    mov w9, #-128
+; CHECK-FP16-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-FP16-NEXT:    cmn w8, #128
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -431,11 +423,11 @@
 ; CHECK-CVT-LABEL: test_signed_i13_f16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w8, #4095
+; CHECK-CVT-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-CVT-NEXT:    fcvtzs w9, s0
 ; CHECK-CVT-NEXT:    cmp w9, #4095
 ; CHECK-CVT-NEXT:    csel w8, w9, w8, lt
-; CHECK-CVT-NEXT:    mov w9, #-4096
+; CHECK-CVT-NEXT:    mov w9, #-4096 // =0xfffff000
 ; CHECK-CVT-NEXT:    cmn w8, #1, lsl #12 // =4096
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -443,10 +435,10 @@
 ; CHECK-FP16-LABEL: test_signed_i13_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs w9, h0
-; CHECK-FP16-NEXT:    mov w8, #4095
+; CHECK-FP16-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-FP16-NEXT:    cmp w9, #4095
 ; CHECK-FP16-NEXT:    csel w8, w9, w8, lt
-; CHECK-FP16-NEXT:    mov w9, #-4096
+; CHECK-FP16-NEXT:    mov w9, #-4096 // =0xfffff000
 ; CHECK-FP16-NEXT:    cmn w8, #1, lsl #12 // =4096
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -458,11 +450,11 @@
 ; CHECK-CVT-LABEL: test_signed_i16_f16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #32767
+; CHECK-CVT-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
-; CHECK-CVT-NEXT:    mov w9, #-32768
+; CHECK-CVT-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-CVT-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -470,10 +462,10 @@
 ; CHECK-FP16-LABEL: test_signed_i16_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #32767
+; CHECK-FP16-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
-; CHECK-FP16-NEXT:    mov w9, #-32768
+; CHECK-FP16-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-FP16-NEXT:    cmn w8, #8, lsl #12 // =32768
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -485,11 +477,11 @@
 ; CHECK-CVT-LABEL: test_signed_i19_f16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov w9, #262143
+; CHECK-CVT-NEXT:    mov w9, #262143 // =0x3ffff
 ; CHECK-CVT-NEXT:    fcvtzs w8, s0
 ; CHECK-CVT-NEXT:    cmp w8, w9
 ; CHECK-CVT-NEXT:    csel w8, w8, w9, lt
-; CHECK-CVT-NEXT:    mov w9, #-262144
+; CHECK-CVT-NEXT:    mov w9, #-262144 // =0xfffc0000
 ; CHECK-CVT-NEXT:    cmn w8, #64, lsl #12 // =262144
 ; CHECK-CVT-NEXT:    csel w0, w8, w9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -497,10 +489,10 @@
 ; CHECK-FP16-LABEL: test_signed_i19_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs w8, h0
-; CHECK-FP16-NEXT:    mov w9, #262143
+; CHECK-FP16-NEXT:    mov w9, #262143 // =0x3ffff
 ; CHECK-FP16-NEXT:    cmp w8, w9
 ; CHECK-FP16-NEXT:    csel w8, w8, w9, lt
-; CHECK-FP16-NEXT:    mov w9, #-262144
+; CHECK-FP16-NEXT:    mov w9, #-262144 // =0xfffc0000
 ; CHECK-FP16-NEXT:    cmn w8, #64, lsl #12 // =262144
 ; CHECK-FP16-NEXT:    csel w0, w8, w9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -527,11 +519,11 @@
 ; CHECK-CVT-LABEL: test_signed_i50_f16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvt s0, h0
-; CHECK-CVT-NEXT:    mov x9, #562949953421311
+; CHECK-CVT-NEXT:    mov x9, #562949953421311 // =0x1ffffffffffff
 ; CHECK-CVT-NEXT:    fcvtzs x8, s0
 ; CHECK-CVT-NEXT:    cmp x8, x9
 ; CHECK-CVT-NEXT:    csel x8, x8, x9, lt
-; CHECK-CVT-NEXT:    mov x9, #-562949953421312
+; CHECK-CVT-NEXT:    mov x9, #-562949953421312 // =0xfffe000000000000
 ; CHECK-CVT-NEXT:    cmp x8, x9
 ; CHECK-CVT-NEXT:    csel x0, x8, x9, gt
 ; CHECK-CVT-NEXT:    ret
@@ -539,10 +531,10 @@
 ; CHECK-FP16-LABEL: test_signed_i50_f16:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    fcvtzs x8, h0
-; CHECK-FP16-NEXT:    mov x9, #562949953421311
+; CHECK-FP16-NEXT:    mov x9, #562949953421311 // =0x1ffffffffffff
 ; CHECK-FP16-NEXT:    cmp x8, x9
 ; CHECK-FP16-NEXT:    csel x8, x8, x9, lt
-; CHECK-FP16-NEXT:    mov x9, #-562949953421312
+; CHECK-FP16-NEXT:    mov x9, #-562949953421312 // =0xfffe000000000000
 ; CHECK-FP16-NEXT:    cmp x8, x9
 ; CHECK-FP16-NEXT:    csel x0, x8, x9, gt
 ; CHECK-FP16-NEXT:    ret
@@ -574,12 +566,12 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v0.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
-; CHECK-NEXT:    mov x10, #34359738367
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
+; CHECK-NEXT:    mov x10, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s0
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    mov x8, #-34359738368
+; CHECK-NEXT:    mov x8, #-34359738368 // =0xfffffff800000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp s8, s0
@@ -603,12 +595,12 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v0.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
-; CHECK-NEXT:    mov x10, #9223372036854775807
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
+; CHECK-NEXT:    mov x10, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    ldr x30, [sp, #8] // 8-byte Folded Reload
 ; CHECK-NEXT:    fcmp s8, s0
 ; CHECK-NEXT:    fmov s0, w8
-; CHECK-NEXT:    mov x8, #-9223372036854775808
+; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000
 ; CHECK-NEXT:    csel x9, xzr, x0, lt
 ; CHECK-NEXT:    csel x8, x8, x1, lt
 ; CHECK-NEXT:    fcmp s8, s0
diff --git a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
--- a/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
+++ b/llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
@@ -260,14 +260,14 @@
 ; CHECK-NEXT:    mov w19, w0
 ; CHECK-NEXT:    bl __fixtfsi
 ; CHECK-NEXT:    cmp w19, #0
-; CHECK-NEXT:    mov w8, #-2147483648
+; CHECK-NEXT:    mov w8, #-2147483648 // =0x80000000
 ; CHECK-NEXT:    csel w19, w8, w0, lt
 ; CHECK-NEXT:    adrp x8, .LCPI14_1
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI14_1]
 ; CHECK-NEXT:    bl __gttf2
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov w8, #2147483647
+; CHECK-NEXT:    mov w8, #2147483647 // =0x7fffffff
 ; CHECK-NEXT:    cmp w0, #0
 ; CHECK-NEXT:    csel w19, w8, w19, gt
 ; CHECK-NEXT:    mov v1.16b, v0.16b
@@ -308,13 +308,13 @@
 ; CHECK-NEXT:    adrp x8, .LCPI15_1
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    cmp w19, #0
-; CHECK-NEXT:    mov w20, #-2147483648
+; CHECK-NEXT:    mov w20, #-2147483648 // =0x80000000
 ; CHECK-NEXT:    csel w19, w20, w0, lt
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI15_1]
 ; CHECK-NEXT:    str q1, [sp] // 16-byte Folded Spill
 ; CHECK-NEXT:    bl __gttf2
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    mov w21, #2147483647
+; CHECK-NEXT:    mov w21, #2147483647 // =0x7fffffff
 ; CHECK-NEXT:    cmp w0, #0
 ; CHECK-NEXT:    csel w19, w21, w19, gt
 ; CHECK-NEXT:    mov v1.16b, v0.16b
@@ -378,13 +378,13 @@
 ; CHECK-NEXT:    adrp x8, .LCPI16_1
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
 ; CHECK-NEXT:    cmp w19, #0
-; CHECK-NEXT:    mov w20, #-2147483648
+; CHECK-NEXT:    mov w20, #-2147483648 // =0x80000000
 ; CHECK-NEXT:    csel w19, w20, w0, lt
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI16_1]
 ; CHECK-NEXT:    str q1, [sp] // 16-byte Folded Spill
 ; CHECK-NEXT:    bl __gttf2
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    mov w21, #2147483647
+; CHECK-NEXT:    mov w21, #2147483647 // =0x7fffffff
 ; CHECK-NEXT:    cmp w0, #0
 ; CHECK-NEXT:    csel w19, w21, w19, gt
 ; CHECK-NEXT:    mov v1.16b, v0.16b
@@ -469,13 +469,13 @@
 ; CHECK-NEXT:    adrp x8, .LCPI17_1
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    cmp w19, #0
-; CHECK-NEXT:    mov w20, #-2147483648
+; CHECK-NEXT:    mov w20, #-2147483648 // =0x80000000
 ; CHECK-NEXT:    csel w19, w20, w0, lt
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI17_1]
 ; CHECK-NEXT:    str q1, [sp, #16] // 16-byte Folded Spill
 ; CHECK-NEXT:    bl __gttf2
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov w21, #2147483647
+; CHECK-NEXT:    mov w21, #2147483647 // =0x7fffffff
 ; CHECK-NEXT:    cmp w0, #0
 ; CHECK-NEXT:    csel w19, w21, w19, gt
 ; CHECK-NEXT:    mov v1.16b, v0.16b
@@ -771,9 +771,9 @@
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-NEXT:    mov s1, v0.s[1]
-; CHECK-NEXT:    mov x8, #562949953421311
+; CHECK-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
 ; CHECK-NEXT:    fcvtzs x10, s0
-; CHECK-NEXT:    mov x11, #-562949953421312
+; CHECK-NEXT:    mov x11, #-562949953421312 // =0xfffe000000000000
 ; CHECK-NEXT:    fcvtzs x9, s1
 ; CHECK-NEXT:    cmp x9, x8
 ; CHECK-NEXT:    csel x9, x9, x8, lt
@@ -828,9 +828,9 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
-; CHECK-NEXT:    mov x21, #-34359738368
-; CHECK-NEXT:    mov x22, #34359738367
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
+; CHECK-NEXT:    mov x21, #-34359738368 // =0xfffffff800000000
+; CHECK-NEXT:    mov x22, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
@@ -894,9 +894,9 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
-; CHECK-NEXT:    mov x21, #-9223372036854775808
-; CHECK-NEXT:    mov x22, #9223372036854775807
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
+; CHECK-NEXT:    mov x21, #-9223372036854775808 // =0x8000000000000000
+; CHECK-NEXT:    mov x22, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
@@ -1028,8 +1028,8 @@
 ; CHECK-LABEL: test_signed_v4f32_v4i50:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
-; CHECK-NEXT:    mov x9, #562949953421311
-; CHECK-NEXT:    mov x10, #-562949953421312
+; CHECK-NEXT:    mov x9, #562949953421311 // =0x1ffffffffffff
+; CHECK-NEXT:    mov x10, #-562949953421312 // =0xfffe000000000000
 ; CHECK-NEXT:    fcvtzs x12, s0
 ; CHECK-NEXT:    mov s2, v1.s[1]
 ; CHECK-NEXT:    fcvtzs x8, s1
@@ -1105,10 +1105,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
-; CHECK-NEXT:    mov x25, #-34359738368
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
+; CHECK-NEXT:    mov x25, #-34359738368 // =0xfffffff800000000
 ; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x26, #34359738367
+; CHECK-NEXT:    mov x26, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
@@ -1209,10 +1209,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
-; CHECK-NEXT:    mov x25, #-9223372036854775808
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
+; CHECK-NEXT:    mov x25, #-9223372036854775808 // =0x8000000000000000
 ; CHECK-NEXT:    ldr q0, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x26, #9223372036854775807
+; CHECK-NEXT:    mov x26, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    ext v0.16b, v0.16b, v0.16b, #8
@@ -1304,13 +1304,9 @@
 ; CHECK-NEXT:    mov d1, v0.d[1]
 ; CHECK-NEXT:    fcvtzs w9, d0
 ; CHECK-NEXT:    fcvtzs w8, d1
-; CHECK-NEXT:    cmp w8, #0
-; CHECK-NEXT:    csel w8, w8, wzr, lt
-; CHECK-NEXT:    cmp w8, #0
+; CHECK-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-NEXT:    csinv w8, w8, wzr, ge
-; CHECK-NEXT:    cmp w9, #0
-; CHECK-NEXT:    csel w9, w9, wzr, lt
-; CHECK-NEXT:    cmp w9, #0
+; CHECK-NEXT:    ands w9, w9, w9, asr #31
 ; CHECK-NEXT:    csinv w9, w9, wzr, ge
 ; CHECK-NEXT:    fmov s0, w9
 ; CHECK-NEXT:    mov v0.s[1], w8
@@ -1324,9 +1320,9 @@
 ; CHECK-LABEL: test_signed_v2f64_v2i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    mov w8, #127
+; CHECK-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-NEXT:    fcvtzs w10, d0
-; CHECK-NEXT:    mov w11, #-128
+; CHECK-NEXT:    mov w11, #-128 // =0xffffff80
 ; CHECK-NEXT:    fcvtzs w9, d1
 ; CHECK-NEXT:    cmp w9, #127
 ; CHECK-NEXT:    csel w9, w9, w8, lt
@@ -1348,9 +1344,9 @@
 ; CHECK-LABEL: test_signed_v2f64_v2i13:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    mov w8, #4095
+; CHECK-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-NEXT:    fcvtzs w10, d0
-; CHECK-NEXT:    mov w11, #-4096
+; CHECK-NEXT:    mov w11, #-4096 // =0xfffff000
 ; CHECK-NEXT:    fcvtzs w9, d1
 ; CHECK-NEXT:    cmp w9, #4095
 ; CHECK-NEXT:    csel w9, w9, w8, lt
@@ -1372,9 +1368,9 @@
 ; CHECK-LABEL: test_signed_v2f64_v2i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    mov w8, #32767
+; CHECK-NEXT:    mov w8, #32767 // =0x7fff
 ; CHECK-NEXT:    fcvtzs w10, d0
-; CHECK-NEXT:    mov w11, #-32768
+; CHECK-NEXT:    mov w11, #-32768 // =0xffff8000
 ; CHECK-NEXT:    fcvtzs w9, d1
 ; CHECK-NEXT:    cmp w9, w8
 ; CHECK-NEXT:    csel w9, w9, w8, lt
@@ -1396,9 +1392,9 @@
 ; CHECK-LABEL: test_signed_v2f64_v2i19:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    mov w8, #262143
+; CHECK-NEXT:    mov w8, #262143 // =0x3ffff
 ; CHECK-NEXT:    fcvtzs w10, d0
-; CHECK-NEXT:    mov w11, #-262144
+; CHECK-NEXT:    mov w11, #-262144 // =0xfffc0000
 ; CHECK-NEXT:    fcvtzs w9, d1
 ; CHECK-NEXT:    cmp w9, w8
 ; CHECK-NEXT:    csel w9, w9, w8, lt
@@ -1434,9 +1430,9 @@
 ; CHECK-LABEL: test_signed_v2f64_v2i50:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d1, v0.d[1]
-; CHECK-NEXT:    mov x8, #562949953421311
+; CHECK-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
 ; CHECK-NEXT:    fcvtzs x10, d0
-; CHECK-NEXT:    mov x11, #-562949953421312
+; CHECK-NEXT:    mov x11, #-562949953421312 // =0xfffe000000000000
 ; CHECK-NEXT:    fcvtzs x9, d1
 ; CHECK-NEXT:    cmp x9, x8
 ; CHECK-NEXT:    csel x9, x9, x8, lt
@@ -1484,13 +1480,13 @@
 ; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
 ; CHECK-NEXT:    fmov d0, d8
 ; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4170333254945079296
-; CHECK-NEXT:    mov x21, #-34359738368
-; CHECK-NEXT:    mov x22, #34359738367
+; CHECK-NEXT:    mov x8, #-4170333254945079296 // =0xc620000000000000
+; CHECK-NEXT:    mov x21, #-34359738368 // =0xfffffff800000000
+; CHECK-NEXT:    mov x22, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    fmov d9, x8
-; CHECK-NEXT:    mov x8, #5053038781909696511
+; CHECK-NEXT:    mov x8, #5053038781909696511 // =0x461fffffffffffff
 ; CHECK-NEXT:    fcmp d8, d9
 ; CHECK-NEXT:    fmov d10, x8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
@@ -1550,13 +1546,13 @@
 ; CHECK-NEXT:    str q0, [sp] // 16-byte Folded Spill
 ; CHECK-NEXT:    fmov d0, d8
 ; CHECK-NEXT:    bl __fixdfti
-; CHECK-NEXT:    mov x8, #-4044232465378705408
-; CHECK-NEXT:    mov x21, #-9223372036854775808
-; CHECK-NEXT:    mov x22, #9223372036854775807
+; CHECK-NEXT:    mov x8, #-4044232465378705408 // =0xc7e0000000000000
+; CHECK-NEXT:    mov x21, #-9223372036854775808 // =0x8000000000000000
+; CHECK-NEXT:    mov x22, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
 ; CHECK-NEXT:    // kill: def $d0 killed $d0 killed $q0
 ; CHECK-NEXT:    fmov d9, x8
-; CHECK-NEXT:    mov x8, #5179139571476070399
+; CHECK-NEXT:    mov x8, #5179139571476070399 // =0x47dfffffffffffff
 ; CHECK-NEXT:    fcmp d8, d9
 ; CHECK-NEXT:    fmov d10, x8
 ; CHECK-NEXT:    csel x8, xzr, x0, lt
@@ -1728,8 +1724,8 @@
 ; CHECK-CVT-NEXT:    fcvt s2, h0
 ; CHECK-CVT-NEXT:    mov h3, v0.h[2]
 ; CHECK-CVT-NEXT:    mov h0, v0.h[3]
-; CHECK-CVT-NEXT:    mov x8, #562949953421311
-; CHECK-CVT-NEXT:    mov x11, #-562949953421312
+; CHECK-CVT-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
+; CHECK-CVT-NEXT:    mov x11, #-562949953421312 // =0xfffe000000000000
 ; CHECK-CVT-NEXT:    fcvt s1, h1
 ; CHECK-CVT-NEXT:    fcvtzs x9, s2
 ; CHECK-CVT-NEXT:    fcvt s0, h0
@@ -1760,8 +1756,8 @@
 ; CHECK-FP16-NEXT:    // kill: def $d0 killed $d0 def $q0
 ; CHECK-FP16-NEXT:    mov h1, v0.h[1]
 ; CHECK-FP16-NEXT:    fcvtzs x9, h0
-; CHECK-FP16-NEXT:    mov x8, #562949953421311
-; CHECK-FP16-NEXT:    mov x11, #-562949953421312
+; CHECK-FP16-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
+; CHECK-FP16-NEXT:    mov x11, #-562949953421312 // =0xfffe000000000000
 ; CHECK-FP16-NEXT:    cmp x9, x8
 ; CHECK-FP16-NEXT:    fcvtzs x10, h1
 ; CHECK-FP16-NEXT:    mov h1, v0.h[2]
@@ -1859,10 +1855,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x25, #-34359738368
-; CHECK-NEXT:    mov x26, #34359738367
+; CHECK-NEXT:    mov x25, #-34359738368 // =0xfffffff800000000
+; CHECK-NEXT:    mov x26, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    mov h0, v0.h[2]
@@ -1966,10 +1962,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v9.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
 ; CHECK-NEXT:    ldr q0, [sp] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x25, #-9223372036854775808
-; CHECK-NEXT:    mov x26, #9223372036854775807
+; CHECK-NEXT:    mov x25, #-9223372036854775808 // =0x8000000000000000
+; CHECK-NEXT:    mov x26, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    fmov s10, w8
 ; CHECK-NEXT:    fcmp s8, s9
 ; CHECK-NEXT:    mov h0, v0.h[2]
@@ -2062,60 +2058,44 @@
 ; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
 ; CHECK-CVT-NEXT:    mov s2, v1.s[1]
+; CHECK-CVT-NEXT:    mov s3, v1.s[2]
+; CHECK-CVT-NEXT:    mov s4, v1.s[3]
+; CHECK-CVT-NEXT:    mov s5, v0.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w9, s1
-; CHECK-CVT-NEXT:    fcvtzs w13, s0
+; CHECK-CVT-NEXT:    fcvtzs w10, s0
+; CHECK-CVT-NEXT:    mov s1, v0.s[2]
+; CHECK-CVT-NEXT:    mov s0, v0.s[3]
 ; CHECK-CVT-NEXT:    fcvtzs w8, s2
-; CHECK-CVT-NEXT:    mov s2, v1.s[2]
-; CHECK-CVT-NEXT:    mov s1, v1.s[3]
-; CHECK-CVT-NEXT:    cmp w8, #0
-; CHECK-CVT-NEXT:    csel w8, w8, wzr, lt
-; CHECK-CVT-NEXT:    fcvtzs w10, s2
-; CHECK-CVT-NEXT:    cmp w8, #0
-; CHECK-CVT-NEXT:    mov s2, v0.s[1]
+; CHECK-CVT-NEXT:    fcvtzs w11, s3
+; CHECK-CVT-NEXT:    fcvtzs w12, s4
+; CHECK-CVT-NEXT:    fcvtzs w13, s5
+; CHECK-CVT-NEXT:    ands w8, w8, w8, asr #31
 ; CHECK-CVT-NEXT:    csinv w8, w8, wzr, ge
-; CHECK-CVT-NEXT:    cmp w9, #0
-; CHECK-CVT-NEXT:    csel w9, w9, wzr, lt
-; CHECK-CVT-NEXT:    fcvtzs w11, s1
-; CHECK-CVT-NEXT:    cmp w9, #0
-; CHECK-CVT-NEXT:    mov s1, v0.s[2]
+; CHECK-CVT-NEXT:    ands w9, w9, w9, asr #31
 ; CHECK-CVT-NEXT:    csinv w9, w9, wzr, ge
-; CHECK-CVT-NEXT:    cmp w10, #0
-; CHECK-CVT-NEXT:    csel w10, w10, wzr, lt
-; CHECK-CVT-NEXT:    fcvtzs w12, s2
-; CHECK-CVT-NEXT:    cmp w10, #0
-; CHECK-CVT-NEXT:    mov s0, v0.s[3]
-; CHECK-CVT-NEXT:    csinv w10, w10, wzr, ge
-; CHECK-CVT-NEXT:    cmp w11, #0
-; CHECK-CVT-NEXT:    csel w11, w11, wzr, lt
-; CHECK-CVT-NEXT:    fmov s2, w9
-; CHECK-CVT-NEXT:    cmp w11, #0
+; CHECK-CVT-NEXT:    ands w11, w11, w11, asr #31
 ; CHECK-CVT-NEXT:    csinv w11, w11, wzr, ge
-; CHECK-CVT-NEXT:    cmp w12, #0
-; CHECK-CVT-NEXT:    csel w12, w12, wzr, lt
-; CHECK-CVT-NEXT:    cmp w12, #0
+; CHECK-CVT-NEXT:    ands w12, w12, w12, asr #31
 ; CHECK-CVT-NEXT:    csinv w12, w12, wzr, ge
-; CHECK-CVT-NEXT:    cmp w13, #0
-; CHECK-CVT-NEXT:    csel w13, w13, wzr, lt
-; CHECK-CVT-NEXT:    cmp w13, #0
-; CHECK-CVT-NEXT:    csinv w9, w13, wzr, ge
-; CHECK-CVT-NEXT:    fcvtzs w13, s1
+; CHECK-CVT-NEXT:    ands w13, w13, w13, asr #31
+; CHECK-CVT-NEXT:    csinv w13, w13, wzr, ge
+; CHECK-CVT-NEXT:    ands w10, w10, w10, asr #31
+; CHECK-CVT-NEXT:    csinv w10, w10, wzr, ge
+; CHECK-CVT-NEXT:    fmov s2, w9
+; CHECK-CVT-NEXT:    fcvtzs w9, s1
+; CHECK-CVT-NEXT:    fmov s3, w10
 ; CHECK-CVT-NEXT:    mov v2.s[1], w8
-; CHECK-CVT-NEXT:    fmov s1, w9
-; CHECK-CVT-NEXT:    cmp w13, #0
-; CHECK-CVT-NEXT:    csel w8, w13, wzr, lt
+; CHECK-CVT-NEXT:    ands w8, w9, w9, asr #31
+; CHECK-CVT-NEXT:    csinv w8, w8, wzr, ge
 ; CHECK-CVT-NEXT:    fcvtzs w9, s0
-; CHECK-CVT-NEXT:    cmp w8, #0
-; CHECK-CVT-NEXT:    mov v1.s[1], w12
+; CHECK-CVT-NEXT:    mov v3.s[1], w13
+; CHECK-CVT-NEXT:    mov v2.s[2], w11
+; CHECK-CVT-NEXT:    mov v3.s[2], w8
+; CHECK-CVT-NEXT:    ands w8, w9, w9, asr #31
 ; CHECK-CVT-NEXT:    csinv w8, w8, wzr, ge
-; CHECK-CVT-NEXT:    cmp w9, #0
-; CHECK-CVT-NEXT:    csel w9, w9, wzr, lt
-; CHECK-CVT-NEXT:    mov v2.s[2], w10
-; CHECK-CVT-NEXT:    cmp w9, #0
-; CHECK-CVT-NEXT:    mov v1.s[2], w8
-; CHECK-CVT-NEXT:    csinv w8, w9, wzr, ge
-; CHECK-CVT-NEXT:    mov v2.s[3], w11
-; CHECK-CVT-NEXT:    mov v1.s[3], w8
-; CHECK-CVT-NEXT:    uzp1 v0.8h, v1.8h, v2.8h
+; CHECK-CVT-NEXT:    mov v2.s[3], w12
+; CHECK-CVT-NEXT:    mov v3.s[3], w8
+; CHECK-CVT-NEXT:    uzp1 v0.8h, v3.8h, v2.8h
 ; CHECK-CVT-NEXT:    xtn v0.8b, v0.8h
 ; CHECK-CVT-NEXT:    ret
 ;
@@ -2136,9 +2116,9 @@
 ; CHECK-CVT-LABEL: test_signed_v8f16_v8i8:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
-; CHECK-CVT-NEXT:    mov w8, #127
+; CHECK-CVT-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
-; CHECK-CVT-NEXT:    mov w10, #-128
+; CHECK-CVT-NEXT:    mov w10, #-128 // =0xffffff80
 ; CHECK-CVT-NEXT:    mov s2, v1.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w11, s1
 ; CHECK-CVT-NEXT:    fcvtzs w15, s0
@@ -2210,9 +2190,9 @@
 ; CHECK-CVT-LABEL: test_signed_v8f16_v8i13:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
-; CHECK-CVT-NEXT:    mov w8, #4095
+; CHECK-CVT-NEXT:    mov w8, #4095 // =0xfff
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
-; CHECK-CVT-NEXT:    mov w10, #-4096
+; CHECK-CVT-NEXT:    mov w10, #-4096 // =0xfffff000
 ; CHECK-CVT-NEXT:    mov s2, v1.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w11, s1
 ; CHECK-CVT-NEXT:    fcvtzs w15, s0
@@ -2286,9 +2266,9 @@
 ; CHECK-CVT-LABEL: test_signed_v8f16_v8i16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvtl2 v1.4s, v0.8h
-; CHECK-CVT-NEXT:    mov w8, #32767
+; CHECK-CVT-NEXT:    mov w8, #32767 // =0x7fff
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
-; CHECK-CVT-NEXT:    mov w10, #-32768
+; CHECK-CVT-NEXT:    mov w10, #-32768 // =0xffff8000
 ; CHECK-CVT-NEXT:    mov s2, v1.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w11, s1
 ; CHECK-CVT-NEXT:    fcvtzs w15, s0
@@ -2396,8 +2376,8 @@
 ; CHECK-CVT-LABEL: test_signed_v8f16_v8i50:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
-; CHECK-CVT-NEXT:    mov x8, #562949953421311
-; CHECK-CVT-NEXT:    mov x12, #-562949953421312
+; CHECK-CVT-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
+; CHECK-CVT-NEXT:    mov x12, #-562949953421312 // =0xfffe000000000000
 ; CHECK-CVT-NEXT:    fcvt s5, h0
 ; CHECK-CVT-NEXT:    mov h2, v1.h[1]
 ; CHECK-CVT-NEXT:    fcvt s3, h1
@@ -2457,8 +2437,8 @@
 ; CHECK-FP16-LABEL: test_signed_v8f16_v8i50:
 ; CHECK-FP16:       // %bb.0:
 ; CHECK-FP16-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
-; CHECK-FP16-NEXT:    mov x8, #562949953421311
-; CHECK-FP16-NEXT:    mov x11, #-562949953421312
+; CHECK-FP16-NEXT:    mov x8, #562949953421311 // =0x1ffffffffffff
+; CHECK-FP16-NEXT:    mov x11, #-562949953421312 // =0xfffe000000000000
 ; CHECK-FP16-NEXT:    mov h2, v1.h[1]
 ; CHECK-FP16-NEXT:    fcvtzs x9, h1
 ; CHECK-FP16-NEXT:    mov h3, v1.h[2]
@@ -2613,10 +2593,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v10.2s, #241, lsl #24
-; CHECK-NEXT:    mov w8, #1895825407
+; CHECK-NEXT:    mov w8, #1895825407 // =0x70ffffff
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x25, #-34359738368
-; CHECK-NEXT:    mov x22, #34359738367
+; CHECK-NEXT:    mov x25, #-34359738368 // =0xfffffff800000000
+; CHECK-NEXT:    mov x22, #34359738367 // =0x7ffffffff
 ; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    fcmp s8, s10
 ; CHECK-NEXT:    mov h0, v0.h[3]
@@ -2809,10 +2789,10 @@
 ; CHECK-NEXT:    fmov s0, s8
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    movi v10.2s, #255, lsl #24
-; CHECK-NEXT:    mov w8, #2130706431
+; CHECK-NEXT:    mov w8, #2130706431 // =0x7effffff
 ; CHECK-NEXT:    ldr q0, [sp, #32] // 16-byte Folded Reload
-; CHECK-NEXT:    mov x21, #-9223372036854775808
-; CHECK-NEXT:    mov x22, #9223372036854775807
+; CHECK-NEXT:    mov x21, #-9223372036854775808 // =0x8000000000000000
+; CHECK-NEXT:    mov x22, #9223372036854775807 // =0x7fffffffffffffff
 ; CHECK-NEXT:    fmov s9, w8
 ; CHECK-NEXT:    fcmp s8, s10
 ; CHECK-NEXT:    mov h0, v0.h[1]
@@ -3046,9 +3026,9 @@
 ; CHECK-CVT-LABEL: test_signed_v16f16_v16i8:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvtl2 v2.4s, v1.8h
-; CHECK-CVT-NEXT:    mov w8, #127
+; CHECK-CVT-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-CVT-NEXT:    fcvtl v1.4s, v1.4h
-; CHECK-CVT-NEXT:    mov w9, #-128
+; CHECK-CVT-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-CVT-NEXT:    mov s3, v2.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w11, s2
 ; CHECK-CVT-NEXT:    fcvtzs w10, s3
@@ -3179,9 +3159,9 @@
 ; CHECK-CVT-LABEL: test_signed_v16f16_v16i16:
 ; CHECK-CVT:       // %bb.0:
 ; CHECK-CVT-NEXT:    fcvtl2 v2.4s, v0.8h
-; CHECK-CVT-NEXT:    mov w8, #32767
+; CHECK-CVT-NEXT:    mov w8, #32767 // =0x7fff
 ; CHECK-CVT-NEXT:    fcvtl v0.4s, v0.4h
-; CHECK-CVT-NEXT:    mov w9, #-32768
+; CHECK-CVT-NEXT:    mov w9, #-32768 // =0xffff8000
 ; CHECK-CVT-NEXT:    mov s3, v2.s[1]
 ; CHECK-CVT-NEXT:    fcvtzs w11, s2
 ; CHECK-CVT-NEXT:    fcvtzs w10, s3
@@ -3309,9 +3289,9 @@
 ; CHECK-LABEL: test_signed_v8f64_v8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d4, v3.d[1]
-; CHECK-NEXT:    mov w8, #127
+; CHECK-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-NEXT:    fcvtzs w10, d3
-; CHECK-NEXT:    mov w11, #-128
+; CHECK-NEXT:    mov w11, #-128 // =0xffffff80
 ; CHECK-NEXT:    mov d3, v1.d[1]
 ; CHECK-NEXT:    fcvtzs w13, d2
 ; CHECK-NEXT:    fcvtzs w15, d1
@@ -3374,9 +3354,9 @@
 ; CHECK-LABEL: test_signed_v16f64_v16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d16, v0.d[1]
-; CHECK-NEXT:    mov w8, #127
+; CHECK-NEXT:    mov w8, #127 // =0x7f
 ; CHECK-NEXT:    fcvtzs w11, d0
-; CHECK-NEXT:    mov w9, #-128
+; CHECK-NEXT:    mov w9, #-128 // =0xffffff80
 ; CHECK-NEXT:    mov d0, v2.d[1]
 ; CHECK-NEXT:    fcvtzs w13, d1
 ; CHECK-NEXT:    fcvtzs w10, d16
@@ -3511,9 +3491,9 @@
 ; CHECK-LABEL: test_signed_v8f64_v8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d4, v3.d[1]
-; CHECK-NEXT:    mov w8, #32767
+; CHECK-NEXT:    mov w8, #32767 // =0x7fff
 ; CHECK-NEXT:    fcvtzs w10, d3
-; CHECK-NEXT:    mov w11, #-32768
+; CHECK-NEXT:    mov w11, #-32768 // =0xffff8000
 ; CHECK-NEXT:    mov d3, v1.d[1]
 ; CHECK-NEXT:    fcvtzs w13, d2
 ; CHECK-NEXT:    fcvtzs w15, d1
@@ -3576,9 +3556,9 @@
 ; CHECK-LABEL: test_signed_v16f64_v16i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    mov d16, v3.d[1]
-; CHECK-NEXT:    mov w9, #32767
+; CHECK-NEXT:    mov w9, #32767 // =0x7fff
 ; CHECK-NEXT:    fcvtzs w11, d3
-; CHECK-NEXT:    mov w8, #-32768
+; CHECK-NEXT:    mov w8, #-32768 // =0xffff8000
 ; CHECK-NEXT:    mov d3, v1.d[1]
 ; CHECK-NEXT:    fcvtzs w14, d2
 ; CHECK-NEXT:    fcvtzs w15, d1
diff --git a/llvm/test/CodeGen/AArch64/min-max-combine.ll b/llvm/test/CodeGen/AArch64/min-max-combine.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/min-max-combine.ll
@@ -0,0 +1,199 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s --check-prefixes=CHECK-ISEL
+; RUN: llc -mtriple=aarch64-eabi %s -o - -mattr=cssc | FileCheck %s --check-prefixes=CHECK-CSSC
+; RUN: llc -mtriple=aarch64-eabi -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK-GLOBAL
+; RUN: llc -mtriple=aarch64-eabi -global-isel %s -o - -mattr=cssc | FileCheck %s --check-prefixes=CHECK-CSSC
+
+; These tests check for @llvm.smax, @llvm.smin combines.
+
+; SMAX
+
+declare i8 @llvm.smax.i8(i8 %a, i8 %b) readnone
+
+define i8 @smaxi8_zero(i8 %a) {
+; CHECK-ISEL-LABEL: smaxi8_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    sxtb w8, w0
+; CHECK-ISEL-NEXT:    bic w0, w8, w8, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smaxi8_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    sxtb w8, w0
+; CHECK-CSSC-NEXT:    smax w0, w8, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi8_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    sxtb w8, w0
+; CHECK-GLOBAL-NEXT:    cmp w8, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, gt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i8 @llvm.smax.i8(i8 %a, i8 0)
+  ret i8 %c
+}
+
+declare i16 @llvm.smax.i16(i16 %a, i16 %b) readnone
+
+define i16 @smaxi16_zero(i16 %a) {
+; CHECK-ISEL-LABEL: smaxi16_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    sxth w8, w0
+; CHECK-ISEL-NEXT:    bic w0, w8, w8, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smaxi16_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    sxth w8, w0
+; CHECK-CSSC-NEXT:    smax w0, w8, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi16_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    sxth w8, w0
+; CHECK-GLOBAL-NEXT:    cmp w8, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, gt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i16 @llvm.smax.i16(i16 %a, i16 0)
+  ret i16 %c
+}
+
+declare i32 @llvm.smax.i32(i32 %a, i32 %b) readnone
+
+define i32 @smaxi32_zero(i32 %a) {
+; CHECK-ISEL-LABEL: smaxi32_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    bic w0, w0, w0, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smaxi32_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    smax w0, w0, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi32_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, gt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i32 @llvm.smax.i32(i32 %a, i32 0)
+  ret i32 %c
+}
+
+declare i64 @llvm.smax.i64(i64 %a, i64 %b) readnone
+
+define i64 @smaxi64_zero(i64 %a) {
+; CHECK-ISEL-LABEL: smaxi64_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    bic x0, x0, x0, asr #63
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smaxi64_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    smax x0, x0, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smaxi64_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, #0
+; CHECK-GLOBAL-NEXT:    csel x0, x0, xzr, gt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i64 @llvm.smax.i64(i64 %a, i64 0)
+  ret i64 %c
+}
+
+; SMIN
+
+declare i8 @llvm.smin.i8(i8 %a, i8 %b) readnone
+
+define i8 @smini8_zero(i8 %a) {
+; CHECK-ISEL-LABEL: smini8_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    sxtb w8, w0
+; CHECK-ISEL-NEXT:    and w0, w8, w8, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smini8_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    sxtb w8, w0
+; CHECK-CSSC-NEXT:    smin w0, w8, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini8_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    sxtb w8, w0
+; CHECK-GLOBAL-NEXT:    cmp w8, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, lt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i8 @llvm.smin.i8(i8 %a, i8 0)
+  ret i8 %c
+}
+
+declare i16 @llvm.smin.i16(i16 %a, i16 %b) readnone
+
+define i16 @smini16_zero(i16 %a) {
+; CHECK-ISEL-LABEL: smini16_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    sxth w8, w0
+; CHECK-ISEL-NEXT:    and w0, w8, w8, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smini16_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    sxth w8, w0
+; CHECK-CSSC-NEXT:    smin w0, w8, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini16_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    sxth w8, w0
+; CHECK-GLOBAL-NEXT:    cmp w8, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, lt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i16 @llvm.smin.i16(i16 %a, i16 0)
+  ret i16 %c
+}
+
+declare i32 @llvm.smin.i32(i32 %a, i32 %b) readnone
+
+define i32 @smini32_zero(i32 %a) {
+; CHECK-ISEL-LABEL: smini32_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    and w0, w0, w0, asr #31
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smini32_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    smin w0, w0, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini32_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp w0, #0
+; CHECK-GLOBAL-NEXT:    csel w0, w0, wzr, lt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i32 @llvm.smin.i32(i32 %a, i32 0)
+  ret i32 %c
+}
+
+declare i64 @llvm.smin.i64(i64 %a, i64 %b) readnone
+
+define i64 @smini64_zero(i64 %a) {
+; CHECK-ISEL-LABEL: smini64_zero:
+; CHECK-ISEL:       // %bb.0:
+; CHECK-ISEL-NEXT:    and x0, x0, x0, asr #63
+; CHECK-ISEL-NEXT:    ret
+;
+; CHECK-CSSC-LABEL: smini64_zero:
+; CHECK-CSSC:       // %bb.0:
+; CHECK-CSSC-NEXT:    smin x0, x0, #0
+; CHECK-CSSC-NEXT:    ret
+;
+; CHECK-GLOBAL-LABEL: smini64_zero:
+; CHECK-GLOBAL:       // %bb.0:
+; CHECK-GLOBAL-NEXT:    cmp x0, #0
+; CHECK-GLOBAL-NEXT:    csel x0, x0, xzr, lt
+; CHECK-GLOBAL-NEXT:    ret
+  %c = call i64 @llvm.smin.i64(i64 %a, i64 0)
+  ret i64 %c
+}