diff --git a/clang/lib/CodeGen/ABIInfo.h b/clang/lib/CodeGen/ABIInfo.h --- a/clang/lib/CodeGen/ABIInfo.h +++ b/clang/lib/CodeGen/ABIInfo.h @@ -120,6 +120,9 @@ CodeGenTypes &CGT; bool SwiftErrorInRegister; + bool occupiesMoreThan(ArrayRef scalarTypes, + unsigned maxAllRegisters) const; + public: SwiftABIInfo(CodeGen::CodeGenTypes &CGT, bool SwiftErrorInRegister) : CGT(CGT), SwiftErrorInRegister(SwiftErrorInRegister) {} diff --git a/clang/lib/CodeGen/ABIInfo.cpp b/clang/lib/CodeGen/ABIInfo.cpp new file mode 100644 --- /dev/null +++ b/clang/lib/CodeGen/ABIInfo.cpp @@ -0,0 +1,96 @@ +//===- ABIInfoImpl.cpp ----------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "ABIInfo.h" +#include "ABIInfoImpl.h" + +using namespace clang; +using namespace clang::CodeGen; + +ABIArgInfo ABIInfo::getNaturalAlignIndirect(QualType Ty, bool ByVal, + bool Realign, + llvm::Type *Padding) const { + return ABIArgInfo::getIndirect(getContext().getTypeAlignInChars(Ty), ByVal, + Realign, Padding); +} + +ABIArgInfo ABIInfo::getNaturalAlignIndirectInReg(QualType Ty, + bool Realign) const { + return ABIArgInfo::getIndirectInReg(getContext().getTypeAlignInChars(Ty), + /*ByVal*/ false, Realign); +} + +Address ABIInfo::EmitMSVAArg(CodeGenFunction &CGF, Address VAListAddr, + QualType Ty) const { + return Address::invalid(); +} + +bool ABIInfo::isPromotableIntegerTypeForABI(QualType Ty) const { + if (getContext().isPromotableIntegerType(Ty)) + return true; + + if (const auto *EIT = Ty->getAs()) + if (EIT->getNumBits() < getContext().getTypeSize(getContext().IntTy)) + return true; + + return false; +} + +ABIInfo::~ABIInfo() = default; + +SwiftABIInfo::~SwiftABIInfo() = default; + +bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys, + bool AsReturnValue) const { + return occupiesMoreThan(ComponentTys, /*total=*/4); +} + +bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy, + unsigned NumElts) const { + // The default implementation of this assumes that the target guarantees + // 128-bit SIMD support but nothing more. + return (VectorSize.getQuantity() > 8 && VectorSize.getQuantity() <= 16); +} + +CGCXXABI &ABIInfo::getCXXABI() const { return CGT.getCXXABI(); } + +ASTContext &ABIInfo::getContext() const { return CGT.getContext(); } + +llvm::LLVMContext &ABIInfo::getVMContext() const { + return CGT.getLLVMContext(); +} + +const llvm::DataLayout &ABIInfo::getDataLayout() const { + return CGT.getDataLayout(); +} + +const TargetInfo &ABIInfo::getTarget() const { return CGT.getTarget(); } + +const CodeGenOptions &ABIInfo::getCodeGenOpts() const { + return CGT.getCodeGenOpts(); +} + +bool ABIInfo::isAndroid() const { return getTarget().getTriple().isAndroid(); } + +bool ABIInfo::isOHOSFamily() const { + return getTarget().getTriple().isOHOSFamily(); +} + +bool ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const { + return false; +} + +bool ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base, + uint64_t Members) const { + return false; +} + +bool ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate() const { + // For compatibility with GCC, ignore empty bitfields in C++ mode. + return getContext().getLangOpts().CPlusPlus; +} diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -124,7 +124,7 @@ /// registers when expanded? /// /// This is intended to be the basis of a reasonable basic implementation -/// of should{Pass,Return}IndirectlyForSwift. +/// of should{Pass,Return}Indirectly. /// /// For most targets, a limit of four total registers is reasonable; this /// limits the amount of code required in order to move around the value @@ -133,15 +133,14 @@ /// immediately within the callee. But some targets may need to further /// limit the register count due to an inability to support that many /// return registers. -static bool occupiesMoreThan(CodeGenTypes &cgt, - ArrayRef scalarTypes, - unsigned maxAllRegisters) { +bool SwiftABIInfo::occupiesMoreThan(ArrayRef scalarTypes, + unsigned maxAllRegisters) const { unsigned intCount = 0, fpCount = 0; for (llvm::Type *type : scalarTypes) { if (type->isPointerTy()) { intCount++; } else if (auto intTy = dyn_cast(type)) { - auto ptrWidth = cgt.getTarget().getPointerWidth(LangAS::Default); + auto ptrWidth = CGT.getTarget().getPointerWidth(LangAS::Default); intCount += (intTy->getBitWidth() + ptrWidth - 1) / ptrWidth; } else { assert(type->isVectorTy() || type->isFloatingPointTy()); @@ -154,7 +153,7 @@ bool SwiftABIInfo::shouldPassIndirectly(ArrayRef ComponentTys, bool AsReturnValue) const { - return occupiesMoreThan(CGT, ComponentTys, /*total=*/4); + return occupiesMoreThan(ComponentTys, /*total=*/4); } bool SwiftABIInfo::isLegalVectorType(CharUnits VectorSize, llvm::Type *EltTy, @@ -1245,7 +1244,7 @@ // integer registers and three fp registers. Oddly, it'll use up to // four vector registers for vectors, but those can overlap with the // scalar registers. - return occupiesMoreThan(CGT, ComponentTys, /*total=*/3); + return occupiesMoreThan(ComponentTys, /*total=*/3); } };