diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -5304,6 +5304,14 @@ "is also a destination"); [[fallthrough]]; } + case AArch64::LDR_ZA: + case AArch64::STR_ZA: { + if (Inst.getOperand(2).isImm() && Inst.getOperand(4).isImm() && + Inst.getOperand(2).getImm() != Inst.getOperand(4).getImm()) + return Error(Loc[1], + "unpredictable instruction, immediate and offset mismatch."); + break; + } case AArch64::LDPDi: case AArch64::LDPQi: case AArch64::LDPSi: diff --git a/llvm/test/MC/AArch64/SME/ldr-diagnostics.s b/llvm/test/MC/AArch64/SME/ldr-diagnostics.s --- a/llvm/test/MC/AArch64/SME/ldr-diagnostics.s +++ b/llvm/test/MC/AArch64/SME/ldr-diagnostics.s @@ -51,3 +51,10 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: ldr za[w12, #0], [x0, #0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Mismatch between offset and immediate +ldr za[w14, 6], [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, immediate and offset mismatch. +// CHECK-NEXT: ldr za[w14, 6], [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SME/str-diagnostics.s b/llvm/test/MC/AArch64/SME/str-diagnostics.s --- a/llvm/test/MC/AArch64/SME/str-diagnostics.s +++ b/llvm/test/MC/AArch64/SME/str-diagnostics.s @@ -51,3 +51,10 @@ // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: str za[w12, #0], [x0, #0] // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +// ------------------------------------------------------------------------- // +// Mismatch between offset and immediate +str za[w14, 6], [x10, #5, mul vl] +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unpredictable instruction, immediate and offset mismatch. +// CHECK-NEXT: str za[w14, 6], [x10, #5, mul vl] +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: