Index: lib/Support/TargetParser.cpp =================================================================== --- lib/Support/TargetParser.cpp +++ lib/Support/TargetParser.cpp @@ -104,9 +104,6 @@ }; // List of CPU names and their arches. -// The same CPU can have multiple arches and can be default on multiple arches. -// When finding the Arch for a CPU, first-found prevails. Sort them accordingly. -// When this becomes table-generated, we'd probably need two tables. // FIXME: TableGen this. static const struct { const char *NameCStr; @@ -576,3 +573,49 @@ } return 0; } + +// ======================================================= // +// Make sure all names are unique and non-empty +// ======================================================= // + +static constexpr bool is_in(const char* elt) { + return false; +} +template +static constexpr bool is_in(const char* elt, + const char* head, Tail... tail) { + return (elt == head) || is_in(elt, tail...); +} + +static constexpr bool distinct() { return true; } +template +static constexpr bool distinct(const char* head, Tail... tail) { + return !is_in(head, tail...) && distinct(tail...); +} + +static_assert(distinct( +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) NAME, +#include "llvm/Support/ARMTargetParser.def" + ""), "Duplicate ARM_FPU names!"); + +static_assert(distinct( +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \ + ARCH_BASE_EXT) NAME, +#include "llvm/Support/ARMTargetParser.def" + ""), "Duplicate ARM_ARCH names!"); + +static_assert(distinct( +#define ARM_ARCH_EXT_NAME(NAME, ID) NAME, +#include "llvm/Support/ARMTargetParser.def" + ""), "Duplicate ARM_ARCH_EXT_NAME's!"); + +static_assert(distinct( +#define ARM_HW_DIV_NAME(NAME, ID) NAME, +#include "llvm/Support/ARMTargetParser.def" + ""), "Duplicate ARM_HW_DIV_NAME's!"); + +static_assert(distinct( +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) NAME, +#include "llvm/Support/ARMTargetParser.def" + ""), "Duplicate ARM_CPU_NAME's!"); +