diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -11930,6 +11930,7 @@ BuildMI(*BB, MI, dl, TII->get(is8bit ? PPC::EXTSB : PPC::EXTSH), ValueReg) .addReg(MI.getOperand(3).getReg()); MI.getOperand(3).setReg(ValueReg); + incr = ValueReg; } // If we support part-word atomic mnemonics, just use them if (Subtarget.hasPartwordAtomics()) diff --git a/llvm/test/CodeGen/PowerPC/all-atomics.ll b/llvm/test/CodeGen/PowerPC/all-atomics.ll --- a/llvm/test/CodeGen/PowerPC/all-atomics.ll +++ b/llvm/test/CodeGen/PowerPC/all-atomics.ll @@ -5816,31 +5816,32 @@ ; ; AIX32-LABEL: atommax2: ; AIX32: # %bb.0: # %entry -; AIX32-NEXT: li 6, 0 +; AIX32-NEXT: li 7, 0 ; AIX32-NEXT: rlwinm 5, 3, 3, 27, 27 +; AIX32-NEXT: extsh 6, 4 ; AIX32-NEXT: sync ; AIX32-NEXT: xori 5, 5, 16 -; AIX32-NEXT: ori 6, 6, 65535 -; AIX32-NEXT: slw 7, 4, 5 -; AIX32-NEXT: slw 6, 6, 5 +; AIX32-NEXT: ori 7, 7, 65535 +; AIX32-NEXT: slw 8, 6, 5 +; AIX32-NEXT: slw 7, 7, 5 ; AIX32-NEXT: rlwinm 3, 3, 0, 0, 29 -; AIX32-NEXT: and 7, 7, 6 +; AIX32-NEXT: and 8, 8, 7 ; AIX32-NEXT: L..BB9_1: # %entry ; AIX32-NEXT: # -; AIX32-NEXT: lwarx 8, 0, 3 -; AIX32-NEXT: and 9, 8, 6 -; AIX32-NEXT: srw 9, 9, 5 -; AIX32-NEXT: extsh 9, 9 -; AIX32-NEXT: cmpw 9, 4 +; AIX32-NEXT: lwarx 9, 0, 3 +; AIX32-NEXT: and 10, 9, 7 +; AIX32-NEXT: srw 10, 10, 5 +; AIX32-NEXT: extsh 10, 10 +; AIX32-NEXT: cmpw 10, 6 ; AIX32-NEXT: bgt 0, L..BB9_3 ; AIX32-NEXT: # %bb.2: # %entry ; AIX32-NEXT: # -; AIX32-NEXT: andc 9, 8, 6 -; AIX32-NEXT: or 9, 7, 9 -; AIX32-NEXT: stwcx. 9, 0, 3 +; AIX32-NEXT: andc 10, 9, 7 +; AIX32-NEXT: or 10, 8, 10 +; AIX32-NEXT: stwcx. 10, 0, 3 ; AIX32-NEXT: bne 0, L..BB9_1 ; AIX32-NEXT: L..BB9_3: # %entry -; AIX32-NEXT: srw 3, 8, 5 +; AIX32-NEXT: srw 3, 9, 5 ; AIX32-NEXT: lwsync ; AIX32-NEXT: clrlwi 3, 3, 16 ; AIX32-NEXT: extsh 3, 3 diff --git a/llvm/test/CodeGen/PowerPC/atomic-minmax.ll b/llvm/test/CodeGen/PowerPC/atomic-minmax.ll --- a/llvm/test/CodeGen/PowerPC/atomic-minmax.ll +++ b/llvm/test/CodeGen/PowerPC/atomic-minmax.ll @@ -336,11 +336,12 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: li 5, 0 ; CHECK-NEXT: rlwinm 6, 3, 3, 27, 27 +; CHECK-NEXT: extsh 4, 4 ; CHECK-NEXT: ori 7, 5, 65535 ; CHECK-NEXT: xori 5, 6, 16 +; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: slw 8, 4, 5 ; CHECK-NEXT: slw 6, 7, 5 -; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: and 7, 8, 6 ; CHECK-NEXT: .LBB16_1: # %entry ; CHECK-NEXT: # @@ -369,11 +370,12 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: li 5, 0 ; CHECK-NEXT: rlwinm 6, 3, 3, 27, 27 +; CHECK-NEXT: extsh 4, 4 ; CHECK-NEXT: ori 7, 5, 65535 ; CHECK-NEXT: xori 5, 6, 16 +; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: slw 8, 4, 5 ; CHECK-NEXT: slw 6, 7, 5 -; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: and 7, 8, 6 ; CHECK-NEXT: .LBB17_1: # %entry ; CHECK-NEXT: # @@ -464,10 +466,11 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: rlwinm 5, 3, 3, 27, 28 ; CHECK-NEXT: li 6, 255 +; CHECK-NEXT: extsb 4, 4 ; CHECK-NEXT: xori 5, 5, 24 -; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: slw 7, 4, 5 ; CHECK-NEXT: slw 6, 6, 5 +; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: and 7, 7, 6 ; CHECK-NEXT: .LBB20_1: # %entry ; CHECK-NEXT: # @@ -496,10 +499,11 @@ ; CHECK: # %bb.0: # %entry ; CHECK-NEXT: rlwinm 5, 3, 3, 27, 28 ; CHECK-NEXT: li 6, 255 +; CHECK-NEXT: extsb 4, 4 ; CHECK-NEXT: xori 5, 5, 24 -; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: slw 7, 4, 5 ; CHECK-NEXT: slw 6, 6, 5 +; CHECK-NEXT: rldicr 3, 3, 0, 61 ; CHECK-NEXT: and 7, 7, 6 ; CHECK-NEXT: .LBB21_1: # %entry ; CHECK-NEXT: # diff --git a/llvm/test/CodeGen/PowerPC/pr61882.ll b/llvm/test/CodeGen/PowerPC/pr61882.ll --- a/llvm/test/CodeGen/PowerPC/pr61882.ll +++ b/llvm/test/CodeGen/PowerPC/pr61882.ll @@ -9,6 +9,7 @@ ; CHECK: # %bb.0: ; CHECK-NEXT: rlwinm r5, r3, 3, 27, 28 ; CHECK-NEXT: li r6, 255 +; CHECK-NEXT: extsb r4, r4 ; CHECK-NEXT: sync ; CHECK-NEXT: xori r5, r5, 24 ; CHECK-NEXT: rlwinm r3, r3, 0, 0, 29