Index: include/llvm/ADT/Triple.h
===================================================================
--- include/llvm/ADT/Triple.h
+++ include/llvm/ADT/Triple.h
@@ -99,7 +99,6 @@
     ARMSubArch_v7em,
     ARMSubArch_v7m,
     ARMSubArch_v7s,
-    ARMSubArch_v7k,
     ARMSubArch_v6,
     ARMSubArch_v6m,
     ARMSubArch_v6k,
Index: include/llvm/Support/ARMTargetParser.def
===================================================================
--- include/llvm/Support/ARMTargetParser.def
+++ include/llvm/Support/ARMTargetParser.def
@@ -97,8 +97,6 @@
           FK_NONE, AEK_NONE)
 ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
           FK_NEON_VFPV4, AEK_DSP)
-ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
-          FK_NONE, AEK_DSP)
 #undef ARM_ARCH
 
 #ifndef ARM_ARCH_EXT_NAME
@@ -212,7 +210,6 @@
 ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE)
 ARM_CPU_NAME("swift", AK_ARMV7S, FK_NEON_VFPV4, true,
              (AEK_HWDIVARM | AEK_HWDIV))
-ARM_CPU_NAME("cortex-a7", AK_ARMV7K, FK_NONE, true, AEK_HWDIVARM | AEK_HWDIV)
 // Invalid CPU
 ARM_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, AEK_INVALID)
 #undef ARM_CPU_NAME
Index: lib/Support/TargetParser.cpp
===================================================================
--- lib/Support/TargetParser.cpp
+++ lib/Support/TargetParser.cpp
@@ -384,7 +384,7 @@
       .Case("v6hl", "v6k")
       .Cases("v6m", "v6sm", "v6s-m", "v6-m")
       .Cases("v6z", "v6zk", "v6kz")
-      .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
+      .Cases("v7", "v7a", "v7hl", "v7k", "v7l", "v7-a")
       .Case("v7r", "v7-r")
       .Case("v7m", "v7-m")
       .Case("v7em", "v7e-m")
@@ -531,7 +531,6 @@
   case ARM::AK_ARMV7R:
     return ARM::PK_R;
   case ARM::AK_ARMV7A:
-  case ARM::AK_ARMV7K:
   case ARM::AK_ARMV8A:
   case ARM::AK_ARMV8_1A:
     return ARM::PK_A;
@@ -570,7 +569,6 @@
   case ARM::AK_ARMV7M:
   case ARM::AK_ARMV7S:
   case ARM::AK_ARMV7EM:
-  case ARM::AK_ARMV7K:
     return 7;
   case ARM::AK_ARMV8A:
   case ARM::AK_ARMV8_1A:
Index: lib/Support/Triple.cpp
===================================================================
--- lib/Support/Triple.cpp
+++ lib/Support/Triple.cpp
@@ -507,8 +507,6 @@
   case ARM::AK_ARMV7A:
   case ARM::AK_ARMV7R:
     return Triple::ARMSubArch_v7;
-  case ARM::AK_ARMV7K:
-    return Triple::ARMSubArch_v7k;
   case ARM::AK_ARMV7M:
     return Triple::ARMSubArch_v7m;
   case ARM::AK_ARMV7S:
@@ -1370,6 +1368,9 @@
   case llvm::Triple::Win32:
     // FIXME: this is invalid for WindowsCE
     return "cortex-a9";
+  case llvm::Triple::TvOS:
+  case llvm::Triple::WatchOS:
+    return "cortex-a7";
   default:
     break;
   }
Index: lib/Target/ARM/ARMSubtarget.cpp
===================================================================
--- lib/Target/ARM/ARMSubtarget.cpp
+++ lib/Target/ARM/ARMSubtarget.cpp
@@ -151,8 +151,9 @@
   UseNaClTrap = false;
   GenLongCalls = false;
   UnsafeFPMath = false;
+  // ARMv7k does not use SjLj exception handling.
   UseSjLjEH = (isTargetDarwin() &&
-               TargetTriple.getSubArch() != Triple::ARMSubArch_v7k);
+               !TargetTriple.getArchName().endswith("v7k"));
 }
 
 void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
@@ -166,7 +167,6 @@
         CPUString = "swift";
       else if (ArchName.endswith("v7k"))
         // Default to the Cortex-a7 CPU when targeting armv7k/thumbv7k.
-        // ARMv7k does not use SjLj exception handling.
         CPUString = "cortex-a7";
     }
   }
Index: lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
===================================================================
--- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -1032,8 +1032,6 @@
     return MachO::CPU_SUBTYPE_ARM_V7;
   case ARM::AK_ARMV7S:
     return MachO::CPU_SUBTYPE_ARM_V7S;
-  case ARM::AK_ARMV7K:
-    return MachO::CPU_SUBTYPE_ARM_V7K;
   case ARM::AK_ARMV6M:
     return MachO::CPU_SUBTYPE_ARM_V6M;
   case ARM::AK_ARMV7M:
@@ -1051,7 +1049,10 @@
   default:
     llvm_unreachable("unsupported object format");
   case Triple::MachO: {
-    MachO::CPUSubTypeARM CS = getMachOSubTypeFromArch(TheTriple.getArchName());
+    StringRef Arch = TheTriple.getArchName();
+    MachO::CPUSubTypeARM CS = (Arch == "armv7k" || Arch == "thumbv7k")
+                              ? MachO::CPU_SUBTYPE_ARM_V7K
+                              : getMachOSubTypeFromArch(Arch);
     return new ARMAsmBackendDarwin(T, TheTriple, MRI, CS);
   }
   case Triple::COFF: