Index: llvm/lib/Target/M68k/M68k.td =================================================================== --- llvm/lib/Target/M68k/M68k.td +++ llvm/lib/Target/M68k/M68k.td @@ -37,10 +37,19 @@ "Is M68030 ISA supported", [ FeatureISA20 ]>; +def FeatureISA881 + : SubtargetFeature<"isa-68881", "FPUKind", "M881", + "Is M68881 (FPU) ISA supported">; + +def FeatureISA882 + : SubtargetFeature<"isa-68882", "FPUKind", "M882", + "Is M68882 (FPU) ISA supported", + [ FeatureISA881 ]>; + def FeatureISA40 : SubtargetFeature<"isa-68040", "SubtargetKind", "M40", "Is M68040 ISA supported", - [ FeatureISA30 ]>; + [ FeatureISA30, FeatureISA882 ]>; def FeatureISA60 : SubtargetFeature<"isa-68060", "SubtargetKind", "M60", Index: llvm/lib/Target/M68k/M68kInstrInfo.td =================================================================== --- llvm/lib/Target/M68k/M68kInstrInfo.td +++ llvm/lib/Target/M68k/M68kInstrInfo.td @@ -435,6 +435,10 @@ def AtLeastM680 # i # "0" : Predicate<"Subtarget->atLeastM680"#i#"0()">, AssemblerPredicate<(all_of !cast("FeatureISA"#i#"0"))>; +def AtLeastM68881 : Predicate<"Subtarget->atLeastM68881()">, + AssemblerPredicate<(all_of FeatureISA881)>; +def AtLeastM68882 : Predicate<"Subtarget->atLeastM68882()">, + AssemblerPredicate<(all_of FeatureISA882)>; //===----------------------------------------------------------------------===// // Condition Codes Index: llvm/lib/Target/M68k/M68kSubtarget.h =================================================================== --- llvm/lib/Target/M68k/M68kSubtarget.h +++ llvm/lib/Target/M68k/M68kSubtarget.h @@ -51,6 +51,9 @@ enum SubtargetEnum { M00, M10, M20, M30, M40, M60 }; SubtargetEnum SubtargetKind = M00; + enum FPKindEnum { M881, M882 }; + std::optional FPUKind; + std::bitset UserReservedRegister; InstrItineraryData InstrItins; @@ -88,9 +91,12 @@ bool atLeastM68040() const { return SubtargetKind >= M40; } bool atLeastM68060() const { return SubtargetKind >= M60; } - bool useSmallSection() const { return UseSmallSection; } + /// Floating point support + bool hasFPU() const { return FPUKind.has_value(); } + bool atLeastM68881() const { return hasFPU() && *FPUKind >= M881; } + bool atLeastM68882() const { return hasFPU() && *FPUKind >= M882; } - bool abiUsesSoftFloat() const; + bool useSmallSection() const { return UseSmallSection; } const Triple &getTargetTriple() const { return TargetTriple; } Index: llvm/lib/Target/M68k/M68kSubtarget.cpp =================================================================== --- llvm/lib/Target/M68k/M68kSubtarget.cpp +++ llvm/lib/Target/M68k/M68kSubtarget.cpp @@ -84,8 +84,6 @@ bool M68kSubtarget::isLegalToCallImmediateAddr() const { return true; } -bool M68kSubtarget::abiUsesSoftFloat() const { return true; } - M68kSubtarget &M68kSubtarget::initializeSubtargetDependencies( StringRef CPU, Triple TT, StringRef FS, const M68kTargetMachine &TM) { std::string CPUName = selectM68kCPU(TT, CPU).str(); Index: llvm/test/CodeGen/M68k/m6888x-features.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/M68k/m6888x-features.ll @@ -0,0 +1,10 @@ +; RUN: llc -mtriple=m68k -mattr="+isa-68881" %s -o - 2>&1 | FileCheck %s +; RUN: llc -mtriple=m68k -mattr="+isa-68882" %s -o - 2>&1 | FileCheck %s + +define dso_local i32 @f() { +entry: + ret i32 0 +} + +; Make sure that all of the features listed are recognized. +; CHECK-NOT: is not a recognized feature for this target