diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -38098,6 +38098,15 @@ Known.resetAll(); switch (Opc) { default: break; + case X86ISD::MUL_IMM: { + KnownBits Known2 = + DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); + APInt Val = Known2.Zero; + Val.flipAllBits(); + Val *= cast(Op.getOperand(1))->getAPIntValue(); + Known.Zero.setBitsFrom(Val.getActiveBits()); + break; + } case X86ISD::SETCC: Known.Zero.setBitsFrom(1); break; diff --git a/llvm/test/CodeGen/X86/select-constant-lea.ll b/llvm/test/CodeGen/X86/select-constant-lea.ll --- a/llvm/test/CodeGen/X86/select-constant-lea.ll +++ b/llvm/test/CodeGen/X86/select-constant-lea.ll @@ -8,8 +8,7 @@ ; BASE-NEXT: xorl %eax, %eax ; BASE-NEXT: cmpl $10, %edi ; BASE-NEXT: setae %al -; BASE-NEXT: leal (%rax,%rax,4), %eax -; BASE-NEXT: orl $8, %eax +; BASE-NEXT: leal 8(%rax,%rax,4), %eax ; BASE-NEXT: retq ; ; SLOWLEA3-LABEL: select_unsigned_lt_10_8_13j: @@ -18,7 +17,7 @@ ; SLOWLEA3-NEXT: cmpl $10, %edi ; SLOWLEA3-NEXT: setae %al ; SLOWLEA3-NEXT: leal (%rax,%rax,4), %eax -; SLOWLEA3-NEXT: orl $8, %eax +; SLOWLEA3-NEXT: addl $8, %eax ; SLOWLEA3-NEXT: retq %2 = icmp ult i32 %0, 10 %3 = select i1 %2, i32 8, i32 13