diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -4977,6 +4977,22 @@ return DAG.getSetCC(dl, VT, N0, N1, NewCond); } + // ~X > ~Y --> Y > X + // ~X < ~Y --> Y < X + // ~X < C --> X > ~C + // ~X > C --> X < ~C + if ((isSignedIntSetCC(Cond) || isUnsignedIntSetCC(Cond)) && N0.getValueType().isInteger() ) { + if (isBitwiseNot(N0)) { + if (isBitwiseNot(N1)) + return DAG.getSetCC(dl, VT, N1.getOperand(0), N0.getOperand(0), Cond); + + if (const auto *C = dyn_cast(N1)) { + SDValue Not = DAG.getNOT(dl, N1, OpVT); + return DAG.getSetCC(dl, VT, Not, N0.getOperand(0), Cond); + } + } + } + if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && N0.getValueType().isInteger()) { if (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::SUB || diff --git a/llvm/test/CodeGen/X86/cmov.ll b/llvm/test/CodeGen/X86/cmov.ll --- a/llvm/test/CodeGen/X86/cmov.ll +++ b/llvm/test/CodeGen/X86/cmov.ll @@ -213,10 +213,10 @@ define i32 @smin(i32 %x) { ; CHECK-LABEL: smin: ; CHECK: # %bb.0: -; CHECK-NEXT: notl %edi ; CHECK-NEXT: testl %edi, %edi +; CHECK-NEXT: notl %edi ; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: cmovsl %edi, %eax +; CHECK-NEXT: cmovnsl %edi, %eax ; CHECK-NEXT: retq %not_x = xor i32 %x, -1 %1 = icmp slt i32 %not_x, -1 diff --git a/llvm/test/CodeGen/X86/setcc-combine.ll b/llvm/test/CodeGen/X86/setcc-combine.ll --- a/llvm/test/CodeGen/X86/setcc-combine.ll +++ b/llvm/test/CodeGen/X86/setcc-combine.ll @@ -503,10 +503,8 @@ define i64 @cmp_sgt_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_sgt_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rsi, %rdi +; CHECK-NEXT: cmpq %rdi, %rsi ; CHECK-NEXT: setg %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq @@ -520,10 +518,9 @@ define i64 @cmp_sgt_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_sgt_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $43, %rdi -; CHECK-NEXT: setge %al +; CHECK-NEXT: cmpq $-43, %rdi +; CHECK-NEXT: setl %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -535,14 +532,14 @@ define <2 x i64> @cmp_sgt_not_with_vec(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: cmp_sgt_not_with_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [18446744071562067967,18446744071562067967] -; CHECK-NEXT: pxor %xmm2, %xmm1 +; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648] ; CHECK-NEXT: pxor %xmm2, %xmm0 -; CHECK-NEXT: movdqa %xmm0, %xmm2 -; CHECK-NEXT: pcmpgtd %xmm1, %xmm2 +; CHECK-NEXT: pxor %xmm2, %xmm1 +; CHECK-NEXT: movdqa %xmm1, %xmm2 +; CHECK-NEXT: pcmpgtd %xmm0, %xmm2 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] -; CHECK-NEXT: pcmpeqd %xmm1, %xmm0 -; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] +; CHECK-NEXT: pcmpeqd %xmm0, %xmm1 +; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] ; CHECK-NEXT: pand %xmm3, %xmm1 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] ; CHECK-NEXT: por %xmm1, %xmm0 @@ -572,10 +569,9 @@ define i64 @cmp_ugt_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_ugt_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $43, %rdi -; CHECK-NEXT: adcq $-1, %rax +; CHECK-NEXT: cmpq $-43, %rdi +; CHECK-NEXT: sbbq %rax, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 %c = icmp ugt i64 %na, 42 @@ -586,14 +582,14 @@ define <2 x i64> @cmp_ugt_not_with_vec(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: cmp_ugt_not_with_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159] -; CHECK-NEXT: pxor %xmm2, %xmm1 +; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] ; CHECK-NEXT: pxor %xmm2, %xmm0 -; CHECK-NEXT: movdqa %xmm0, %xmm2 -; CHECK-NEXT: pcmpgtd %xmm1, %xmm2 +; CHECK-NEXT: pxor %xmm2, %xmm1 +; CHECK-NEXT: movdqa %xmm1, %xmm2 +; CHECK-NEXT: pcmpgtd %xmm0, %xmm2 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] -; CHECK-NEXT: pcmpeqd %xmm1, %xmm0 -; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] +; CHECK-NEXT: pcmpeqd %xmm0, %xmm1 +; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] ; CHECK-NEXT: pand %xmm3, %xmm1 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] ; CHECK-NEXT: por %xmm1, %xmm0 @@ -608,10 +604,8 @@ define i64 @cmp_sge_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_sge_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rsi, %rdi +; CHECK-NEXT: cmpq %rdi, %rsi ; CHECK-NEXT: setge %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq @@ -625,10 +619,9 @@ define i64 @cmp_sge_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_sge_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $42, %rdi -; CHECK-NEXT: setge %al +; CHECK-NEXT: cmpq $-42, %rdi +; CHECK-NEXT: setl %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -640,14 +633,14 @@ define <2 x i64> @cmp_sge_not_with_vec(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: cmp_sge_not_with_vec: ; CHECK: # %bb.0: -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159] -; CHECK-NEXT: pxor %xmm2, %xmm0 +; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] ; CHECK-NEXT: pxor %xmm2, %xmm1 -; CHECK-NEXT: movdqa %xmm1, %xmm2 -; CHECK-NEXT: pcmpgtd %xmm0, %xmm2 +; CHECK-NEXT: pxor %xmm2, %xmm0 +; CHECK-NEXT: movdqa %xmm0, %xmm2 +; CHECK-NEXT: pcmpgtd %xmm1, %xmm2 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] -; CHECK-NEXT: pcmpeqd %xmm0, %xmm1 -; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] +; CHECK-NEXT: pcmpeqd %xmm1, %xmm0 +; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; CHECK-NEXT: pand %xmm3, %xmm0 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] ; CHECK-NEXT: por %xmm0, %xmm1 @@ -664,10 +657,8 @@ define i64 @cmp_uge_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_uge_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rsi, %rdi +; CHECK-NEXT: cmpq %rdi, %rsi ; CHECK-NEXT: adcq $-1, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -680,10 +671,9 @@ define i64 @cmp_uge_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_uge_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $42, %rdi -; CHECK-NEXT: adcq $-1, %rax +; CHECK-NEXT: cmpq $-42, %rdi +; CHECK-NEXT: sbbq %rax, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 %c = icmp uge i64 %na, 42 @@ -694,29 +684,27 @@ define <3 x i64> @cmp_uge_not_with_vec(<3 x i64> %a, <3 x i64> %b) { ; SSE2-LABEL: cmp_uge_not_with_vec: ; SSE2: # %bb.0: -; SSE2-NEXT: movq %r8, %xmm0 -; SSE2-NEXT: movq %rcx, %xmm1 -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movq %rsi, %xmm0 -; SSE2-NEXT: movq %rdi, %xmm2 +; SSE2-NEXT: movq %rdi, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE2-NEXT: movq %r8, %xmm0 +; SSE2-NEXT: movq %rcx, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE2-NEXT: movq %r9, %xmm0 -; SSE2-NEXT: movq %rdx, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE2-NEXT: movq %rdx, %xmm0 +; SSE2-NEXT: movq %r9, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: pxor %xmm4, %xmm2 ; SSE2-NEXT: pxor %xmm4, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE2-NEXT: pand %xmm6, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: por %xmm1, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE2-NEXT: pxor %xmm1, %xmm2 -; SSE2-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE2-NEXT: movq %rax, %xmm4 ; SSE2-NEXT: pxor %xmm4, %xmm3 ; SSE2-NEXT: pxor %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm4 @@ -736,29 +724,27 @@ ; ; SSE41-LABEL: cmp_uge_not_with_vec: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %r8, %xmm0 -; SSE41-NEXT: movq %rcx, %xmm1 -; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE41-NEXT: movq %rsi, %xmm0 -; SSE41-NEXT: movq %rdi, %xmm2 +; SSE41-NEXT: movq %rdi, %xmm1 +; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: movq %r8, %xmm0 +; SSE41-NEXT: movq %rcx, %xmm2 ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE41-NEXT: movq %r9, %xmm0 -; SSE41-NEXT: movq %rdx, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE41-NEXT: movq %rdx, %xmm0 +; SSE41-NEXT: movq %r9, %xmm3 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE41-NEXT: pxor %xmm4, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE41-NEXT: movdqa %xmm1, %xmm5 +; SSE41-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE41-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE41-NEXT: pand %xmm6, %xmm1 +; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE41-NEXT: por %xmm1, %xmm2 ; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE41-NEXT: pxor %xmm1, %xmm2 -; SSE41-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE41-NEXT: movq %rax, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm3 ; SSE41-NEXT: pxor %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm0, %xmm4 @@ -784,10 +770,8 @@ define i64 @cmp_sle_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_sle_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rsi, %rdi +; CHECK-NEXT: cmpq %rdi, %rsi ; CHECK-NEXT: setle %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq @@ -801,10 +785,9 @@ define i64 @cmp_sle_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_sle_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $43, %rdi -; CHECK-NEXT: setl %al +; CHECK-NEXT: cmpq $-43, %rdi +; CHECK-NEXT: setge %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -816,29 +799,27 @@ define <3 x i64> @cmp_sle_not_with_vec(<3 x i64> %a, <3 x i64> %b) { ; SSE2-LABEL: cmp_sle_not_with_vec: ; SSE2: # %bb.0: -; SSE2-NEXT: movq %rsi, %xmm0 -; SSE2-NEXT: movq %rdi, %xmm1 -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movq %r8, %xmm0 -; SSE2-NEXT: movq %rcx, %xmm2 +; SSE2-NEXT: movq %rcx, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE2-NEXT: movq %rsi, %xmm0 +; SSE2-NEXT: movq %rdi, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE2-NEXT: movq %rdx, %xmm0 -; SSE2-NEXT: movq %r9, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967] +; SSE2-NEXT: movq %r9, %xmm0 +; SSE2-NEXT: movq %rdx, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648] ; SSE2-NEXT: pxor %xmm4, %xmm2 ; SSE2-NEXT: pxor %xmm4, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE2-NEXT: pand %xmm6, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: por %xmm1, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE2-NEXT: pxor %xmm1, %xmm2 -; SSE2-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF -; SSE2-NEXT: movq %rax, %xmm4 ; SSE2-NEXT: pxor %xmm4, %xmm3 ; SSE2-NEXT: pxor %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm4 @@ -858,29 +839,27 @@ ; ; SSE41-LABEL: cmp_sle_not_with_vec: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %rsi, %xmm0 -; SSE41-NEXT: movq %rdi, %xmm1 -; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE41-NEXT: movq %r8, %xmm0 -; SSE41-NEXT: movq %rcx, %xmm2 +; SSE41-NEXT: movq %rcx, %xmm1 +; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: movq %rsi, %xmm0 +; SSE41-NEXT: movq %rdi, %xmm2 ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE41-NEXT: movq %rdx, %xmm0 -; SSE41-NEXT: movq %r9, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967] +; SSE41-NEXT: movq %r9, %xmm0 +; SSE41-NEXT: movq %rdx, %xmm3 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648] ; SSE41-NEXT: pxor %xmm4, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE41-NEXT: movdqa %xmm1, %xmm5 +; SSE41-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE41-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE41-NEXT: pand %xmm6, %xmm1 +; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE41-NEXT: por %xmm1, %xmm2 ; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE41-NEXT: pxor %xmm1, %xmm2 -; SSE41-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF -; SSE41-NEXT: movq %rax, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm3 ; SSE41-NEXT: pxor %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm0, %xmm4 @@ -906,10 +885,8 @@ define i64 @cmp_slt_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_slt_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rsi, %rdi +; CHECK-NEXT: cmpq %rdi, %rsi ; CHECK-NEXT: setl %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq @@ -923,10 +900,9 @@ define i64 @cmp_slt_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_slt_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $42, %rdi -; CHECK-NEXT: setl %al +; CHECK-NEXT: cmpq $-42, %rdi +; CHECK-NEXT: setge %al ; CHECK-NEXT: negq %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -938,29 +914,27 @@ define <3 x i64> @cmp_slt_not_with_vec(<3 x i64> %a, <3 x i64> %b) { ; SSE2-LABEL: cmp_slt_not_with_vec: ; SSE2: # %bb.0: -; SSE2-NEXT: movq %r8, %xmm0 -; SSE2-NEXT: movq %rcx, %xmm1 -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movq %rsi, %xmm0 -; SSE2-NEXT: movq %rdi, %xmm2 +; SSE2-NEXT: movq %rdi, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE2-NEXT: movq %r8, %xmm0 +; SSE2-NEXT: movq %rcx, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE2-NEXT: movq %r9, %xmm0 -; SSE2-NEXT: movq %rdx, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967] +; SSE2-NEXT: movq %rdx, %xmm0 +; SSE2-NEXT: movq %r9, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648] ; SSE2-NEXT: pxor %xmm4, %xmm2 ; SSE2-NEXT: pxor %xmm4, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE2-NEXT: pand %xmm6, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: por %xmm1, %xmm2 -; SSE2-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF -; SSE2-NEXT: movq %rax, %xmm1 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: pxor %xmm4, %xmm3 +; SSE2-NEXT: pxor %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2] @@ -977,29 +951,27 @@ ; ; SSE41-LABEL: cmp_slt_not_with_vec: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %r8, %xmm0 -; SSE41-NEXT: movq %rcx, %xmm1 -; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE41-NEXT: movq %rsi, %xmm0 -; SSE41-NEXT: movq %rdi, %xmm2 +; SSE41-NEXT: movq %rdi, %xmm1 +; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: movq %r8, %xmm0 +; SSE41-NEXT: movq %rcx, %xmm2 ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE41-NEXT: movq %r9, %xmm0 -; SSE41-NEXT: movq %rdx, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [18446744071562067967,18446744071562067967] +; SSE41-NEXT: movq %rdx, %xmm0 +; SSE41-NEXT: movq %r9, %xmm3 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,2147483648] ; SSE41-NEXT: pxor %xmm4, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE41-NEXT: movdqa %xmm1, %xmm5 +; SSE41-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE41-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE41-NEXT: pand %xmm6, %xmm1 +; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE41-NEXT: por %xmm1, %xmm2 -; SSE41-NEXT: movabsq $-2147483649, %rax # imm = 0xFFFFFFFF7FFFFFFF -; SSE41-NEXT: movq %rax, %xmm1 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: pxor %xmm4, %xmm3 +; SSE41-NEXT: pxor %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm0, %xmm1 ; SSE41-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2] @@ -1051,29 +1023,27 @@ define <3 x i64> @cmp_ult_not_with_vec(<3 x i64> %a, <3 x i64> %b) { ; SSE2-LABEL: cmp_ult_not_with_vec: ; SSE2: # %bb.0: -; SSE2-NEXT: movq %r8, %xmm0 -; SSE2-NEXT: movq %rcx, %xmm1 -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movq %rsi, %xmm0 -; SSE2-NEXT: movq %rdi, %xmm2 +; SSE2-NEXT: movq %rdi, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE2-NEXT: movq %r8, %xmm0 +; SSE2-NEXT: movq %rcx, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE2-NEXT: movq %r9, %xmm0 -; SSE2-NEXT: movq %rdx, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE2-NEXT: movq %rdx, %xmm0 +; SSE2-NEXT: movq %r9, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: pxor %xmm4, %xmm2 ; SSE2-NEXT: pxor %xmm4, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE2-NEXT: pand %xmm6, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: por %xmm1, %xmm2 -; SSE2-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE2-NEXT: movq %rax, %xmm1 -; SSE2-NEXT: pxor %xmm1, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm0 +; SSE2-NEXT: pxor %xmm4, %xmm3 +; SSE2-NEXT: pxor %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm1 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2] @@ -1090,29 +1060,27 @@ ; ; SSE41-LABEL: cmp_ult_not_with_vec: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %r8, %xmm0 -; SSE41-NEXT: movq %rcx, %xmm1 -; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE41-NEXT: movq %rsi, %xmm0 -; SSE41-NEXT: movq %rdi, %xmm2 +; SSE41-NEXT: movq %rdi, %xmm1 +; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: movq %r8, %xmm0 +; SSE41-NEXT: movq %rcx, %xmm2 ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE41-NEXT: movq %r9, %xmm0 -; SSE41-NEXT: movq %rdx, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE41-NEXT: movq %rdx, %xmm0 +; SSE41-NEXT: movq %r9, %xmm3 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE41-NEXT: pxor %xmm4, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE41-NEXT: movdqa %xmm1, %xmm5 +; SSE41-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE41-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE41-NEXT: pand %xmm6, %xmm1 +; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE41-NEXT: por %xmm1, %xmm2 -; SSE41-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE41-NEXT: movq %rax, %xmm1 -; SSE41-NEXT: pxor %xmm1, %xmm3 -; SSE41-NEXT: pxor %xmm1, %xmm0 +; SSE41-NEXT: pxor %xmm4, %xmm3 +; SSE41-NEXT: pxor %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm0, %xmm1 ; SSE41-NEXT: pcmpgtd %xmm3, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2] @@ -1135,10 +1103,8 @@ define i64 @cmp_ule_not(i64 %a, i64 %b) { ; CHECK-LABEL: cmp_ule_not: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi -; CHECK-NEXT: notq %rsi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rdi, %rsi +; CHECK-NEXT: cmpq %rsi, %rdi ; CHECK-NEXT: adcq $-1, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -1151,10 +1117,9 @@ define i64 @cmp_ule_not_with_constant(i64 %a) { ; CHECK-LABEL: cmp_ule_not_with_constant: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq $43, %rdi -; CHECK-NEXT: sbbq %rax, %rax +; CHECK-NEXT: cmpq $-43, %rdi +; CHECK-NEXT: adcq $-1, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 %c = icmp ule i64 %na, 42 @@ -1165,29 +1130,27 @@ define <3 x i64> @cmp_ule_not_with_vec(<3 x i64> %a, <3 x i64> %b) { ; SSE2-LABEL: cmp_ule_not_with_vec: ; SSE2: # %bb.0: -; SSE2-NEXT: movq %rsi, %xmm0 -; SSE2-NEXT: movq %rdi, %xmm1 -; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE2-NEXT: movq %r8, %xmm0 -; SSE2-NEXT: movq %rcx, %xmm2 +; SSE2-NEXT: movq %rcx, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE2-NEXT: movq %rsi, %xmm0 +; SSE2-NEXT: movq %rdi, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE2-NEXT: movq %rdx, %xmm0 -; SSE2-NEXT: movq %r9, %xmm3 -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE2-NEXT: movq %r9, %xmm0 +; SSE2-NEXT: movq %rdx, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: pxor %xmm4, %xmm2 ; SSE2-NEXT: pxor %xmm4, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm4 -; SSE2-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pand %xmm5, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE2-NEXT: pand %xmm6, %xmm1 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: por %xmm1, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE2-NEXT: pxor %xmm1, %xmm2 -; SSE2-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE2-NEXT: movq %rax, %xmm4 ; SSE2-NEXT: pxor %xmm4, %xmm3 ; SSE2-NEXT: pxor %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm0, %xmm4 @@ -1207,29 +1170,27 @@ ; ; SSE41-LABEL: cmp_ule_not_with_vec: ; SSE41: # %bb.0: -; SSE41-NEXT: movq %rsi, %xmm0 -; SSE41-NEXT: movq %rdi, %xmm1 -; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] ; SSE41-NEXT: movq %r8, %xmm0 -; SSE41-NEXT: movq %rcx, %xmm2 +; SSE41-NEXT: movq %rcx, %xmm1 +; SSE41-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] +; SSE41-NEXT: movq %rsi, %xmm0 +; SSE41-NEXT: movq %rdi, %xmm2 ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0] -; SSE41-NEXT: movq %rdx, %xmm0 -; SSE41-NEXT: movq %r9, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372034707292159,9223372034707292159] +; SSE41-NEXT: movq %r9, %xmm0 +; SSE41-NEXT: movq %rdx, %xmm3 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456] ; SSE41-NEXT: pxor %xmm4, %xmm2 ; SSE41-NEXT: pxor %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm4 -; SSE41-NEXT: pcmpgtd %xmm2, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] +; SSE41-NEXT: movdqa %xmm1, %xmm5 +; SSE41-NEXT: pcmpgtd %xmm2, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE41-NEXT: pcmpeqd %xmm2, %xmm1 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE41-NEXT: pand %xmm5, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3] +; SSE41-NEXT: pand %xmm6, %xmm1 +; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE41-NEXT: por %xmm1, %xmm2 ; SSE41-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE41-NEXT: pxor %xmm1, %xmm2 -; SSE41-NEXT: movabsq $9223372034707292159, %rax # imm = 0x7FFFFFFF7FFFFFFF -; SSE41-NEXT: movq %rax, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm3 ; SSE41-NEXT: pxor %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm0, %xmm4 @@ -1410,10 +1371,8 @@ define i64 @cmp_uge_not_commute(i64 %b, i64 %a) { ; CHECK-LABEL: cmp_uge_not_commute: ; CHECK: # %bb.0: -; CHECK-NEXT: notq %rsi -; CHECK-NEXT: notq %rdi ; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: cmpq %rdi, %rsi +; CHECK-NEXT: cmpq %rsi, %rdi ; CHECK-NEXT: adcq $-1, %rax ; CHECK-NEXT: retq %na = xor i64 %a, -1 @@ -1439,14 +1398,14 @@ define <2 x i64> @cmp_uge_not_with_vec2xi64(<2 x i64> %a, <2 x i64> %b) { ; CHECK-LABEL: cmp_uge_not_with_vec2xi64: ; CHECK: # %bb.0: -; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159] -; CHECK-NEXT: pxor %xmm2, %xmm0 +; CHECK-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456] ; CHECK-NEXT: pxor %xmm2, %xmm1 -; CHECK-NEXT: movdqa %xmm1, %xmm2 -; CHECK-NEXT: pcmpgtd %xmm0, %xmm2 +; CHECK-NEXT: pxor %xmm2, %xmm0 +; CHECK-NEXT: movdqa %xmm0, %xmm2 +; CHECK-NEXT: pcmpgtd %xmm1, %xmm2 ; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2] -; CHECK-NEXT: pcmpeqd %xmm0, %xmm1 -; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3] +; CHECK-NEXT: pcmpeqd %xmm1, %xmm0 +; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; CHECK-NEXT: pand %xmm3, %xmm0 ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] ; CHECK-NEXT: por %xmm0, %xmm1