diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h --- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h +++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h @@ -704,6 +704,7 @@ bool HasEHCatchret = false; bool HasEHScopes = false; bool HasEHFunclets = false; + bool IsOutlined = false; bool FailsVerification = false; bool TracksDebugUserValues = false; @@ -742,6 +743,7 @@ YamlIO.mapOptional("hasEHCatchret", MF.HasEHCatchret, false); YamlIO.mapOptional("hasEHScopes", MF.HasEHScopes, false); YamlIO.mapOptional("hasEHFunclets", MF.HasEHFunclets, false); + YamlIO.mapOptional("isOutlined", MF.IsOutlined, false); YamlIO.mapOptional("debugInstrRef", MF.UseDebugInstrRef, false); YamlIO.mapOptional("failsVerification", MF.FailsVerification, false); diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h --- a/llvm/include/llvm/CodeGen/MachineFunction.h +++ b/llvm/include/llvm/CodeGen/MachineFunction.h @@ -374,6 +374,7 @@ bool HasEHCatchret = false; bool HasEHScopes = false; bool HasEHFunclets = false; + bool IsOutlined = false; /// BBID to assign to the next basic block of this function. unsigned NextBBID = 0; @@ -1116,6 +1117,9 @@ bool hasEHFunclets() const { return HasEHFunclets; } void setHasEHFunclets(bool V) { HasEHFunclets = V; } + bool isOutlined() const { return IsOutlined; } + void setIsOutlined(bool V) { IsOutlined = V; } + /// Find or create an LandingPadInfo for the specified MachineBasicBlock. LandingPadInfo &getOrCreateLandingPadInfo(MachineBasicBlock *LandingPad); diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -468,6 +468,7 @@ MF.setHasEHCatchret(YamlMF.HasEHCatchret); MF.setHasEHScopes(YamlMF.HasEHScopes); MF.setHasEHFunclets(YamlMF.HasEHFunclets); + MF.setIsOutlined(YamlMF.IsOutlined); if (YamlMF.Legalized) MF.getProperties().set(MachineFunctionProperties::Property::Legalized); diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -200,6 +200,7 @@ YamlMF.HasEHCatchret = MF.hasEHCatchret(); YamlMF.HasEHScopes = MF.hasEHScopes(); YamlMF.HasEHFunclets = MF.hasEHFunclets(); + YamlMF.IsOutlined = MF.isOutlined(); YamlMF.UseDebugInstrRef = MF.useDebugInstrRef(); YamlMF.Legalized = MF.getProperties().hasProperty( diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp --- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp +++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp @@ -1388,6 +1388,9 @@ if (skipFunction(MF.getFunction())) return false; + if (MF.isOutlined()) + return false; + bool isSpillageCopyElimEnabled = false; switch (EnableSpillageCopyElimination) { case cl::BOU_UNSET: diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp --- a/llvm/lib/CodeGen/MachineOutliner.cpp +++ b/llvm/lib/CodeGen/MachineOutliner.cpp @@ -720,6 +720,7 @@ MachineModuleInfo &MMI = getAnalysis().getMMI(); MachineFunction &MF = MMI.getOrCreateMachineFunction(*F); + MF.setIsOutlined(true); MachineBasicBlock &MBB = *MF.CreateMachineBasicBlock(); // Insert the new function into the module. diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -337,19 +337,16 @@ void RISCVPassConfig::addPreEmitPass() { addPass(&BranchRelaxationPassID); addPass(createRISCVMakeCompressibleOptPass()); - - // TODO: It would potentially be better to schedule copy propagation after - // expanding pseudos (in addPreEmitPass2). However, performing copy - // propagation after the machine outliner (which runs after addPreEmitPass) - // currently leads to incorrect code-gen, where copies to registers within - // outlined functions are removed erroneously. - if (TM->getOptLevel() >= CodeGenOpt::Default && EnableRISCVCopyPropagation) - addPass(createMachineCopyPropagationPass(true)); } void RISCVPassConfig::addPreEmitPass2() { addPass(createRISCVExpandPseudoPass()); + // Do the copy propagation after expanding pseudos because we may produce some + // MVs when expanding. + if (TM->getOptLevel() >= CodeGenOpt::Default && EnableRISCVCopyPropagation) + addPass(createMachineCopyPropagationPass(true)); + // Schedule the expansion of AMOs at the last possible moment, avoiding the // possibility for other passes to break the requirements for forward // progress in the LR/SC block. diff --git a/llvm/test/CodeGen/RISCV/O3-pipeline.ll b/llvm/test/CodeGen/RISCV/O3-pipeline.ll --- a/llvm/test/CodeGen/RISCV/O3-pipeline.ll +++ b/llvm/test/CodeGen/RISCV/O3-pipeline.ll @@ -166,7 +166,6 @@ ; CHECK-NEXT: Implement the 'patchable-function' attribute ; CHECK-NEXT: Branch relaxation pass ; CHECK-NEXT: RISCV Make Compressible -; CHECK-NEXT: Machine Copy Propagation Pass ; CHECK-NEXT: Contiguously Lay Out Funclets ; CHECK-NEXT: StackMap Liveness Analysis ; CHECK-NEXT: Live DEBUG_VALUE analysis @@ -177,6 +176,7 @@ ; CHECK-NEXT: Machine Optimization Remark Emitter ; CHECK-NEXT: Stack Frame Layout Analysis ; CHECK-NEXT: RISCV pseudo instruction expansion pass +; CHECK-NEXT: Machine Copy Propagation Pass ; CHECK-NEXT: RISCV atomic pseudo instruction expansion pass ; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Machine Optimization Remark Emitter diff --git a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp --- a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp +++ b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp @@ -372,6 +372,7 @@ DstMF->setHasEHCatchret(SrcMF->hasEHCatchret()); DstMF->setHasEHScopes(SrcMF->hasEHScopes()); DstMF->setHasEHFunclets(SrcMF->hasEHFunclets()); + DstMF->setIsOutlined(SrcMF->isOutlined()); if (!SrcMF->getLandingPads().empty() || !SrcMF->getCodeViewAnnotations().empty() ||