diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -452,7 +452,7 @@ } // get default FPU features - unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch); + llvm::ARM::FPUKind FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch); llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures); // get default Extension features diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp b/clang/lib/Driver/ToolChains/Arch/ARM.cpp --- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp +++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp @@ -72,25 +72,25 @@ } // Handle -mfpu=. -static unsigned getARMFPUFeatures(const Driver &D, const Arg *A, - const ArgList &Args, StringRef FPU, - std::vector &Features) { - unsigned FPUID = llvm::ARM::parseFPU(FPU); - if (!llvm::ARM::getFPUFeatures(FPUID, Features)) +static llvm::ARM::FPUKind getARMFPUFeatures(const Driver &D, const Arg *A, + const ArgList &Args, StringRef FPU, + std::vector &Features) { + llvm::ARM::FPUKind FPUKind = llvm::ARM::parseFPU(FPU); + if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args); - return FPUID; + return FPUKind; } // Decode ARM features from string like +[no]featureA+[no]featureB+... static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU, llvm::ARM::ArchKind ArchKind, std::vector &Features, - unsigned &ArgFPUID) { + llvm::ARM::FPUKind &ArgFPUKind) { SmallVector Split; text.split(Split, StringRef("+"), -1, false); for (StringRef Feature : Split) { - if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUID)) + if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUKind)) return false; } return true; @@ -112,14 +112,16 @@ static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef ArchName, llvm::StringRef CPUName, std::vector &Features, - const llvm::Triple &Triple, unsigned &ArgFPUID) { + const llvm::Triple &Triple, + llvm::ARM::FPUKind &ArgFPUKind) { std::pair Split = ArchName.split("+"); std::string MArch = arm::getARMArch(ArchName, Triple); llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch); if (ArchKind == llvm::ARM::ArchKind::INVALID || - (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPUName, - ArchKind, Features, ArgFPUID))) + (Split.second.size() && + !DecodeARMFeatures(D, Split.second, CPUName, ArchKind, Features, + ArgFPUKind))) D.Diag(clang::diag::err_drv_unsupported_option_argument) << A->getSpelling() << A->getValue(); } @@ -128,15 +130,16 @@ static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, llvm::StringRef CPUName, llvm::StringRef ArchName, std::vector &Features, - const llvm::Triple &Triple, unsigned &ArgFPUID) { + const llvm::Triple &Triple, + llvm::ARM::FPUKind &ArgFPUKind) { std::pair Split = CPUName.split("+"); std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple); llvm::ARM::ArchKind ArchKind = arm::getLLVMArchKindForARM(CPU, ArchName, Triple); if (ArchKind == llvm::ARM::ArchKind::INVALID || - (Split.second.size() && - !DecodeARMFeatures(D, Split.second, CPU, ArchKind, Features, ArgFPUID))) + (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPU, ArchKind, + Features, ArgFPUKind))) D.Diag(clang::diag::err_drv_unsupported_option_argument) << A->getSpelling() << A->getValue(); } @@ -498,8 +501,8 @@ const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ); StringRef ArchName; StringRef CPUName; - unsigned ArchArgFPUID = llvm::ARM::FK_INVALID; - unsigned CPUArgFPUID = llvm::ARM::FK_INVALID; + llvm::ARM::FPUKind ArchArgFPUKind = llvm::ARM::FK_INVALID; + llvm::ARM::FPUKind CPUArgFPUKind = llvm::ARM::FK_INVALID; // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=. if (WaCPU) { @@ -519,13 +522,13 @@ ArchName = WaArch->second; // This will set any features after the base architecture. checkARMArchName(D, WaArch->first, Args, ArchName, CPUName, - ExtensionFeatures, Triple, ArchArgFPUID); + ExtensionFeatures, Triple, ArchArgFPUKind); // The base architecture was handled in ToolChain::ComputeLLVMTriple because // triple is read only by this point. } else if (ArchArg) { ArchName = ArchArg->getValue(); checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures, - Triple, ArchArgFPUID); + Triple, ArchArgFPUKind); } // Add CPU features for generic CPUs @@ -545,14 +548,14 @@ if (CPUArg) checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures, - Triple, CPUArgFPUID); + Triple, CPUArgFPUKind); // TODO Handle -mtune=. Suppress -Wunused-command-line-argument as a // longstanding behavior. (void)Args.getLastArg(options::OPT_mtune_EQ); // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=. - unsigned FPUID = llvm::ARM::FK_INVALID; + llvm::ARM::FPUKind FPUKind = llvm::ARM::FK_INVALID; const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ); if (WaFPU) { if (FPUArg) @@ -560,11 +563,11 @@ << FPUArg->getAsString(Args); (void)getARMFPUFeatures(D, WaFPU->first, Args, WaFPU->second, Features); } else if (FPUArg) { - FPUID = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features); + FPUKind = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features); } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) { const char *AndroidFPU = "neon"; - FPUID = llvm::ARM::parseFPU(AndroidFPU); - if (!llvm::ARM::getFPUFeatures(FPUID, Features)) + FPUKind = llvm::ARM::parseFPU(AndroidFPU); + if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) D.Diag(clang::diag::err_drv_clang_unsupported) << std::string("-mfpu=") + AndroidFPU; } else { @@ -572,8 +575,8 @@ std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple); llvm::ARM::ArchKind ArchKind = arm::getLLVMArchKindForARM(CPU, ArchName, Triple); - FPUID = llvm::ARM::getDefaultFPU(CPU, ArchKind); - (void)llvm::ARM::getFPUFeatures(FPUID, Features); + FPUKind = llvm::ARM::getDefaultFPU(CPU, ArchKind); + (void)llvm::ARM::getFPUFeatures(FPUKind, Features); } } @@ -631,9 +634,9 @@ // above call. Features.insert(Features.end(), {"-dotprod", "-fp16fml", "-bf16", "-mve", "-mve.fp", "-fpregs"}); - } else if (FPUID == llvm::ARM::FK_NONE || - ArchArgFPUID == llvm::ARM::FK_NONE || - CPUArgFPUID == llvm::ARM::FK_NONE) { + } else if (FPUKind == llvm::ARM::FK_NONE || + ArchArgFPUKind == llvm::ARM::FK_NONE || + CPUArgFPUKind == llvm::ARM::FK_NONE) { // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the // FPU, but not the FPU registers, thus MVE-I, which depends only on the diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h --- a/llvm/include/llvm/MC/MCStreamer.h +++ b/llvm/include/llvm/MC/MCStreamer.h @@ -157,7 +157,7 @@ virtual void emitTextAttribute(unsigned Attribute, StringRef String); virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue = ""); - virtual void emitFPU(unsigned FPU); + virtual void emitFPU(ARM::FPUKind FPU); virtual void emitArch(ARM::ArchKind Arch); virtual void emitArchExtension(uint64_t ArchExt); virtual void emitObjectArch(ARM::ArchKind Arch); diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.h b/llvm/include/llvm/TargetParser/ARMTargetParser.h --- a/llvm/include/llvm/TargetParser/ARMTargetParser.h +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.h @@ -181,7 +181,7 @@ StringRef Name; StringRef CPUAttr; // CPU class in build attributes. StringRef ArchFeature; - unsigned DefaultFPU; + FPUKind DefaultFPU; uint64_t ArchBaseExtensions; ArchKind ID; ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. @@ -213,12 +213,12 @@ } // Information by ID -StringRef getFPUName(unsigned FPUKind); -FPUVersion getFPUVersion(unsigned FPUKind); -NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind); -FPURestriction getFPURestriction(unsigned FPUKind); +StringRef getFPUName(FPUKind FPUKind); +FPUVersion getFPUVersion(FPUKind FPUKind); +NeonSupportLevel getFPUNeonSupportLevel(FPUKind FPUKind); +FPURestriction getFPURestriction(FPUKind FPUKind); -bool getFPUFeatures(unsigned FPUKind, std::vector &Features); +bool getFPUFeatures(FPUKind FPUKind, std::vector &Features); bool getHWDivFeatures(uint64_t HWDivKind, std::vector &Features); bool getExtensionFeatures(uint64_t Extensions, std::vector &Features); @@ -231,11 +231,11 @@ StringRef getArchExtFeature(StringRef ArchExt); bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector &Features, - unsigned &ArgFPUKind); + FPUKind &ArgFPUKind); ArchKind convertV9toV8(ArchKind AK); // Information by Name -unsigned getDefaultFPU(StringRef CPU, ArchKind AK); +FPUKind getDefaultFPU(StringRef CPU, ArchKind AK); uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK); StringRef getDefaultCPU(StringRef Arch); StringRef getCanonicalArchName(StringRef Arch); @@ -243,7 +243,7 @@ // Parser uint64_t parseHWDiv(StringRef HWDiv); -unsigned parseFPU(StringRef FPU); +FPUKind parseFPU(StringRef FPU); ArchKind parseArch(StringRef Arch); uint64_t parseArchExt(StringRef ArchExt); ArchKind parseCPUArch(StringRef CPU); diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -11766,7 +11766,7 @@ SMLoc FPUNameLoc = getTok().getLoc(); StringRef FPU = getParser().parseStringToEndOfStatement().trim(); - unsigned ID = ARM::parseFPU(FPU); + ARM::FPUKind ID = ARM::parseFPU(FPU); std::vector Features; if (!ARM::getFPUFeatures(ID, Features)) return Error(FPUNameLoc, "Unknown FPU name"); diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp @@ -93,7 +93,7 @@ void emitArch(ARM::ArchKind Arch) override; void emitArchExtension(uint64_t ArchExt) override; void emitObjectArch(ARM::ArchKind Arch) override; - void emitFPU(unsigned FPU) override; + void emitFPU(ARM::FPUKind FPU) override; void emitInst(uint32_t Inst, char Suffix = '\0') override; void finishAttributeSection() override; @@ -248,7 +248,7 @@ OS << "\t.object_arch\t" << ARM::getArchName(Arch) << '\n'; } -void ARMTargetAsmStreamer::emitFPU(unsigned FPU) { +void ARMTargetAsmStreamer::emitFPU(ARM::FPUKind FPU) { OS << "\t.fpu\t" << ARM::getFPUName(FPU) << "\n"; } @@ -382,7 +382,7 @@ class ARMTargetELFStreamer : public ARMTargetStreamer { private: StringRef CurrentVendor; - unsigned FPU = ARM::FK_INVALID; + ARM::FPUKind FPU = ARM::FK_INVALID; ARM::ArchKind Arch = ARM::ArchKind::INVALID; ARM::ArchKind EmittedArch = ARM::ArchKind::INVALID; @@ -414,7 +414,7 @@ StringRef StringValue) override; void emitArch(ARM::ArchKind Arch) override; void emitObjectArch(ARM::ArchKind Arch) override; - void emitFPU(unsigned FPU) override; + void emitFPU(ARM::FPUKind FPU) override; void emitInst(uint32_t Inst, char Suffix = '\0') override; void finishAttributeSection() override; void emitLabel(MCSymbol *Symbol) override; @@ -928,9 +928,7 @@ } } -void ARMTargetELFStreamer::emitFPU(unsigned Value) { - FPU = Value; -} +void ARMTargetELFStreamer::emitFPU(ARM::FPUKind Value) { FPU = Value; } void ARMTargetELFStreamer::emitFPUDefaultAttributes() { ARMELFStreamer &S = getStreamer(); diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp @@ -111,7 +111,7 @@ void ARMTargetStreamer::emitArch(ARM::ArchKind Arch) {} void ARMTargetStreamer::emitArchExtension(uint64_t ArchExt) {} void ARMTargetStreamer::emitObjectArch(ARM::ArchKind Arch) {} -void ARMTargetStreamer::emitFPU(unsigned FPU) {} +void ARMTargetStreamer::emitFPU(ARM::FPUKind FPU) {} void ARMTargetStreamer::finishAttributeSection() {} void ARMTargetStreamer::annotateTLSDescriptorSequence( const MCSymbolRefExpr *SRE) {} diff --git a/llvm/lib/TargetParser/ARMTargetParser.cpp b/llvm/lib/TargetParser/ARMTargetParser.cpp --- a/llvm/lib/TargetParser/ARMTargetParser.cpp +++ b/llvm/lib/TargetParser/ARMTargetParser.cpp @@ -147,7 +147,8 @@ return getProfileKind(parseArch(Arch)); } -bool ARM::getFPUFeatures(unsigned FPUKind, std::vector &Features) { +bool ARM::getFPUFeatures(ARM::FPUKind FPUKind, + std::vector &Features) { if (FPUKind >= FK_LAST || FPUKind == FK_INVALID) return false; @@ -211,7 +212,7 @@ return true; } -unsigned ARM::parseFPU(StringRef FPU) { +ARM::FPUKind ARM::parseFPU(StringRef FPU) { StringRef Syn = getFPUSynonym(FPU); for (const auto &F : FPUNames) { if (Syn == F.Name) @@ -220,7 +221,7 @@ return FK_INVALID; } -ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) { +ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind) { if (FPUKind >= FK_LAST) return NeonSupportLevel::None; return FPUNames[FPUKind].NeonSupport; @@ -243,33 +244,33 @@ .Default(FPU); } -StringRef ARM::getFPUName(unsigned FPUKind) { +StringRef ARM::getFPUName(ARM::FPUKind FPUKind) { if (FPUKind >= FK_LAST) return StringRef(); return FPUNames[FPUKind].Name; } -ARM::FPUVersion ARM::getFPUVersion(unsigned FPUKind) { +ARM::FPUVersion ARM::getFPUVersion(ARM::FPUKind FPUKind) { if (FPUKind >= FK_LAST) return FPUVersion::NONE; return FPUNames[FPUKind].FPUVer; } -ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) { +ARM::FPURestriction ARM::getFPURestriction(ARM::FPUKind FPUKind) { if (FPUKind >= FK_LAST) return FPURestriction::None; return FPUNames[FPUKind].Restriction; } -unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { +ARM::FPUKind ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) { if (CPU == "generic") return ARM::ARMArchNames[static_cast(AK)].DefaultFPU; - return StringSwitch(CPU) + return StringSwitch(CPU) #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ .Case(NAME, DEFAULT_FPU) #include "llvm/TargetParser/ARMTargetParser.def" - .Default(ARM::FK_INVALID); + .Default(ARM::FK_INVALID); } uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) { @@ -362,7 +363,7 @@ return StringRef(); } -static unsigned findDoublePrecisionFPU(unsigned InputFPUKind) { +static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind) { const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind]; // If the input FPU already supports double-precision, then there @@ -394,7 +395,7 @@ bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt, std::vector &Features, - unsigned &ArgFPUID) { + ARM::FPUKind &ArgFPUKind) { size_t StartingNumFeatures = Features.size(); const bool Negated = stripNegationPrefix(ArchExt); @@ -417,7 +418,7 @@ CPU = "generic"; if (ArchExt == "fp" || ArchExt == "fp.dp") { - unsigned FPUKind; + ARM::FPUKind FPUKind; if (ArchExt == "fp.dp") { if (Negated) { Features.push_back("-fp64"); @@ -429,7 +430,7 @@ } else { FPUKind = getDefaultFPU(CPU, AK); } - ArgFPUID = FPUKind; + ArgFPUKind = FPUKind; return ARM::getFPUFeatures(FPUKind, Features); } return StartingNumFeatures != Features.size(); diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -120,7 +120,7 @@ ARM::ArchKind AK = ARM::parseCPUArch(params.CPUName); EXPECT_EQ(params.ExpectedArch, ARM::getArchName(AK)); - unsigned FPUKind = ARM::getDefaultFPU(params.CPUName, AK); + ARM::FPUKind FPUKind = ARM::getDefaultFPU(params.CPUName, AK); EXPECT_EQ(params.ExpectedFPU, ARM::getFPUName(FPUKind)); uint64_t default_extensions = ARM::getDefaultExtensions(params.CPUName, AK); @@ -765,10 +765,10 @@ testArchExtDependency(const char *ArchExt, const std::initializer_list &Expected) { std::vector Features; - unsigned FPUID; + ARM::FPUKind FPUKind; if (!ARM::appendArchExtFeatures("", ARM::ArchKind::ARMV8_1MMainline, ArchExt, - Features, FPUID)) + Features, FPUKind)) return false; return llvm::all_of(Expected, [&](StringRef Ext) {