Index: llvm/include/llvm/Analysis/TargetTransformInfo.h =================================================================== --- llvm/include/llvm/Analysis/TargetTransformInfo.h +++ llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -192,6 +192,15 @@ DataAndControlFlowWithoutRuntimeCheck }; +struct TailFoldingInfo { + TargetLibraryInfo *TLI; + LoopVectorizationLegality *LVL; + InterleavedAccessInfo *IAI; + TailFoldingInfo(TargetLibraryInfo *TLI, LoopVectorizationLegality *LVL, + InterleavedAccessInfo *IAI) + : TLI(TLI), LVL(LVL), IAI(IAI) {} +}; + class TargetTransformInfo; typedef TargetTransformInfo TTI; @@ -583,11 +592,7 @@ /// Query the target whether it would be prefered to create a predicated /// vector loop, which can avoid the need to emit a scalar epilogue loop. - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) const; + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const; /// Query the target what the preferred style of tail folding is. /// \param IVUpdateMayOverflow Tells whether it is known if the IV update @@ -1700,11 +1705,7 @@ AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) = 0; - virtual bool - preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) = 0; + virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) = 0; virtual TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) = 0; virtual std::optional instCombineIntrinsic( @@ -2106,12 +2107,8 @@ HardwareLoopInfo &HWLoopInfo) override { return Impl.isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); } - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) override { - return Impl.preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LVL, IAI); + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) override { + return Impl.preferPredicateOverEpilogue(TFI); } TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) override { Index: llvm/include/llvm/Analysis/TargetTransformInfoImpl.h =================================================================== --- llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -163,13 +163,7 @@ return false; } - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) const { - return false; - } + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const { return false; } TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) const { Index: llvm/include/llvm/CodeGen/BasicTTIImpl.h =================================================================== --- llvm/include/llvm/CodeGen/BasicTTIImpl.h +++ llvm/include/llvm/CodeGen/BasicTTIImpl.h @@ -622,12 +622,8 @@ return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); } - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) { - return BaseT::preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LVL, IAI); + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) { + return BaseT::preferPredicateOverEpilogue(TFI); } TailFoldingStyle Index: llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h =================================================================== --- llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h +++ llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h @@ -388,6 +388,16 @@ return ConditionalAssumes; } + Loop *getLoop() const { return TheLoop; } + + LoopInfo *getLoopInfo() const { return LI; } + + AssumptionCache *getAssumptionCache() const { return AC; } + + ScalarEvolution *getScalarEvolution() const { return PSE.getSE(); } + + DominatorTree *getDominatorTree() const { return DT; } + private: /// Return true if the pre-header, exiting and latch blocks of \p Lp and all /// its nested loops are considered legal for vectorization. These legal Index: llvm/lib/Analysis/TargetTransformInfo.cpp =================================================================== --- llvm/lib/Analysis/TargetTransformInfo.cpp +++ llvm/lib/Analysis/TargetTransformInfo.cpp @@ -314,10 +314,8 @@ } bool TargetTransformInfo::preferPredicateOverEpilogue( - Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, - TargetLibraryInfo *TLI, DominatorTree *DT, LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) const { - return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LVL, IAI); + TailFoldingInfo *TFI) const { + return TTIImpl->preferPredicateOverEpilogue(TFI); } TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle( Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h =================================================================== --- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -356,11 +356,7 @@ return TailFoldingStyle::DataWithoutLaneMask; } - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI); + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI); bool supportsScalableVectors() const { return ST->hasSVE(); } Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp =================================================================== --- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -3383,23 +3383,20 @@ return BaseT::getShuffleCost(Kind, Tp, Mask, CostKind, Index, SubTp); } -bool AArch64TTIImpl::preferPredicateOverEpilogue( - Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, - TargetLibraryInfo *TLI, DominatorTree *DT, LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) { +bool AArch64TTIImpl::preferPredicateOverEpilogue(TailFoldingInfo *TFI) { if (!ST->hasSVE() || TailFoldingKindLoc == TailFoldingKind::TFDisabled) return false; // We don't currently support vectorisation with interleaving for SVE - with // such loops we're better off not using tail-folding. This gives us a chance // to fall back on fixed-width vectorisation using NEON's ld2/st2/etc. - if (IAI->hasGroups()) + if (TFI->IAI->hasGroups()) return false; TailFoldingKind Required; // Defaults to 0. - if (LVL->getReductionVars().size()) + if (TFI->LVL->getReductionVars().size()) Required.add(TailFoldingKind::TFReductions); - if (LVL->getFixedOrderRecurrences().size()) + if (TFI->LVL->getFixedOrderRecurrences().size()) Required.add(TailFoldingKind::TFRecurrences); if (!Required) Required.add(TailFoldingKind::TFSimple); Index: llvm/lib/Target/ARM/ARMTargetTransformInfo.h =================================================================== --- llvm/lib/Target/ARM/ARMTargetTransformInfo.h +++ llvm/lib/Target/ARM/ARMTargetTransformInfo.h @@ -303,11 +303,7 @@ AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo); - bool preferPredicateOverEpilogue(Loop *L, LoopInfo *LI, ScalarEvolution &SE, - AssumptionCache &AC, TargetLibraryInfo *TLI, - DominatorTree *DT, - LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI); + bool preferPredicateOverEpilogue(TailFoldingInfo *TFI); void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE); Index: llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp =================================================================== --- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -2238,10 +2238,7 @@ return true; } -bool ARMTTIImpl::preferPredicateOverEpilogue( - Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, - TargetLibraryInfo *TLI, DominatorTree *DT, LoopVectorizationLegality *LVL, - InterleavedAccessInfo *IAI) { +bool ARMTTIImpl::preferPredicateOverEpilogue(TailFoldingInfo *TFI) { if (!EnableTailPredication) { LLVM_DEBUG(dbgs() << "Tail-predication not enabled.\n"); return false; @@ -2253,6 +2250,9 @@ if (!ST->hasMVEIntegerOps()) return false; + LoopVectorizationLegality *LVL = TFI->LVL; + Loop *L = LVL->getLoop(); + // For now, restrict this to single block loops. if (L->getNumBlocks() > 1) { LLVM_DEBUG(dbgs() << "preferPredicateOverEpilogue: not a single block " @@ -2262,6 +2262,7 @@ assert(L->isInnermost() && "preferPredicateOverEpilogue: inner-loop expected"); + LoopInfo *LI = LVL->getLoopInfo(); HardwareLoopInfo HWLoopInfo(L); if (!HWLoopInfo.canAnalyze(*LI)) { LLVM_DEBUG(dbgs() << "preferPredicateOverEpilogue: hardware-loop is not " @@ -2269,21 +2270,25 @@ return false; } + AssumptionCache *AC = LVL->getAssumptionCache(); + ScalarEvolution *SE = LVL->getScalarEvolution(); + // This checks if we have the low-overhead branch architecture // extension, and if we will create a hardware-loop: - if (!isHardwareLoopProfitable(L, SE, AC, TLI, HWLoopInfo)) { + if (!isHardwareLoopProfitable(L, *SE, *AC, TFI->TLI, HWLoopInfo)) { LLVM_DEBUG(dbgs() << "preferPredicateOverEpilogue: hardware-loop is not " "profitable.\n"); return false; } - if (!HWLoopInfo.isHardwareLoopCandidate(SE, *LI, *DT)) { + DominatorTree *DT = LVL->getDominatorTree(); + if (!HWLoopInfo.isHardwareLoopCandidate(*SE, *LI, *DT)) { LLVM_DEBUG(dbgs() << "preferPredicateOverEpilogue: hardware-loop is not " "a candidate.\n"); return false; } - return canTailPredicateLoop(L, LI, SE, DL, LVL->getLAI()); + return canTailPredicateLoop(L, LI, *SE, DL, LVL->getLAI()); } TailFoldingStyle Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp =================================================================== --- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -9714,7 +9714,6 @@ static ScalarEpilogueLowering getScalarEpilogueLowering( Function *F, Loop *L, LoopVectorizeHints &Hints, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI, TargetTransformInfo *TTI, TargetLibraryInfo *TLI, - AssumptionCache *AC, LoopInfo *LI, ScalarEvolution *SE, DominatorTree *DT, LoopVectorizationLegality &LVL, InterleavedAccessInfo *IAI) { // 1) OptSize takes precedence over all other options, i.e. if this is set, // don't look at hints or options, and don't request a scalar epilogue. @@ -9750,7 +9749,8 @@ }; // 4) if the TTI hook indicates this is profitable, request predication. - if (TTI->preferPredicateOverEpilogue(L, LI, *SE, *AC, TLI, DT, &LVL, IAI)) + TailFoldingInfo TFI(TLI, &LVL, IAI); + if (TTI->preferPredicateOverEpilogue(&TFI)) return CM_ScalarEpilogueNotNeededUsePredicate; return CM_ScalarEpilogueAllowed; @@ -9843,8 +9843,8 @@ Function *F = L->getHeader()->getParent(); InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL->getLAI()); - ScalarEpilogueLowering SEL = getScalarEpilogueLowering( - F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, *LVL, &IAI); + ScalarEpilogueLowering SEL = + getScalarEpilogueLowering(F, L, Hints, PSI, BFI, TTI, TLI, *LVL, &IAI); LoopVectorizationCostModel CM(SEL, L, PSE, LI, LVL, *TTI, TLI, DB, AC, ORE, F, &Hints, IAI); @@ -10112,8 +10112,8 @@ // Check the function attributes and profiles to find out if this function // should be optimized for size. - ScalarEpilogueLowering SEL = getScalarEpilogueLowering( - F, L, Hints, PSI, BFI, TTI, TLI, AC, LI, PSE.getSE(), DT, LVL, &IAI); + ScalarEpilogueLowering SEL = + getScalarEpilogueLowering(F, L, Hints, PSI, BFI, TTI, TLI, LVL, &IAI); // Check the loop for a trip count threshold: vectorize loops with a tiny trip // count by optimizing for size, to minimize overheads.