Index: lib/Target/X86/AsmParser/X86AsmParser.cpp =================================================================== --- lib/Target/X86/AsmParser/X86AsmParser.cpp +++ lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -1700,12 +1700,14 @@ return ParseIntelOperator(IOK_TYPE); } + bool PtrInOperand = false; unsigned Size = getIntelMemOperandSize(Tok.getString()); if (Size) { Parser.Lex(); // Eat operand size (e.g., byte, word). if (Tok.getString() != "PTR" && Tok.getString() != "ptr") return ErrorOperand(Tok.getLoc(), "Expected 'PTR' or 'ptr' token!"); Parser.Lex(); // Eat ptr. + PtrInOperand = true; } Start = Tok.getLoc(); @@ -1761,9 +1763,16 @@ if (!ParseRegister(RegNo, Start, End)) { // If this is a segment register followed by a ':', then this is the start // of a segment override, otherwise this is a normal register reference. - if (getLexer().isNot(AsmToken::Colon)) + // In case it is a normal register and there is ptr in the operand this + // is an error + if (getLexer().isNot(AsmToken::Colon)){ + if (PtrInOperand){ + return ErrorOperand(Start, "ambiguous operand - could not " + "determine if register or register indirect addressing"); + } return X86Operand::CreateReg(RegNo, Start, End); - + } + return ParseIntelSegmentOverride(/*SegReg=*/RegNo, Start, Size); } Index: test/MC/X86/intel-syntax-ambiguous.s =================================================================== --- test/MC/X86/intel-syntax-ambiguous.s +++ test/MC/X86/intel-syntax-ambiguous.s @@ -45,3 +45,12 @@ fadd "?half@?0??bar@@YAXXZ@4NA" // CHECK: error: ambiguous operand size for instruction 'fadd' + +// Instruction line with PTR inside check that they don't accept register as memory. + +// CHECK: error: ambiguous operand - could not determine if register or register indirect addressing +// CHECK: andps xmm1, xmmword ptr xmm1 +andps xmm1, xmmword ptr xmm1 +// CHECK: error: ambiguous operand - could not determine if register or register indirect addressing +// CHECK: andps xmmword ptr xmm1, xmm1 +andps xmmword ptr xmm1, xmm1