diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -12795,7 +12795,7 @@ // When a floating-point value is passed on the stack, no bit-conversion is // needed. - if (ValVT.isFloatingPoint()) { + if (ValVT.isFloatingPoint() && !ValVT.isScalableVector()) { LocVT = ValVT; LocInfo = CCValAssign::Full; } diff --git a/llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll b/llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll --- a/llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll +++ b/llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll @@ -1,16 +1,27 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -treat-scalable-fixed-error-as-warning < %s 2>&1 | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s 2>&1 | FileCheck %s -; CHECK: warning: Invalid size request on a scalable vector +; CHECK-NOT: warning: Invalid size request on a scalable vector define void @bar() nounwind { ; CHECK-LABEL: bar: ; CHECK: # %bb.0: # %entry +; CHECK-NEXT: addi sp, sp, -96 +; CHECK-NEXT: sd ra, 88(sp) # 8-byte Folded Spill +; CHECK-NEXT: sd s0, 80(sp) # 8-byte Folded Spill +; CHECK-NEXT: sd s1, 72(sp) # 8-byte Folded Spill +; CHECK-NEXT: addi s0, sp, 96 +; CHECK-NEXT: csrr a0, vlenb +; CHECK-NEXT: slli a0, a0, 3 +; CHECK-NEXT: sub sp, sp, a0 +; CHECK-NEXT: andi sp, sp, -64 +; CHECK-NEXT: mv s1, sp ; CHECK-NEXT: addi sp, sp, -16 -; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill ; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma ; CHECK-NEXT: vmv.v.i v8, 0 -; CHECK-NEXT: vs8r.v v8, (sp) +; CHECK-NEXT: addi a0, s1, 64 +; CHECK-NEXT: vs8r.v v8, (a0) +; CHECK-NEXT: sd a0, 0(sp) ; CHECK-NEXT: li a0, 0 ; CHECK-NEXT: li a1, 0 ; CHECK-NEXT: li a2, 0 @@ -21,8 +32,12 @@ ; CHECK-NEXT: li a7, 0 ; CHECK-NEXT: vmv.v.i v16, 0 ; CHECK-NEXT: call foo@plt -; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload ; CHECK-NEXT: addi sp, sp, 16 +; CHECK-NEXT: addi sp, s0, -96 +; CHECK-NEXT: ld ra, 88(sp) # 8-byte Folded Reload +; CHECK-NEXT: ld s0, 80(sp) # 8-byte Folded Reload +; CHECK-NEXT: ld s1, 72(sp) # 8-byte Folded Reload +; CHECK-NEXT: addi sp, sp, 96 ; CHECK-NEXT: ret entry: tail call void @foo(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, zeroinitializer, zeroinitializer, zeroinitializer)