diff --git a/llvm/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll b/llvm/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
--- a/llvm/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
+++ b/llvm/test/CodeGen/PowerPC/2009-11-15-ProcImpDefsBug.ll
@@ -1,14 +1,14 @@
 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu
 
-define void @gcov_exit() nounwind {
+define void @gcov_exit(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14, i1 %c15, i1 %c16) nounwind {
 entry:
-  br i1 undef, label %return, label %bb.nph341
+  br i1 %c0, label %return, label %bb.nph341
 
 bb.nph341:                                        ; preds = %entry
   br label %bb25
 
 bb25:                                             ; preds = %read_fatal, %bb.nph341
-  br i1 undef, label %bb49.1, label %bb48
+  br i1 %c1, label %bb49.1, label %bb48
 
 bb48:                                             ; preds = %bb25
   br label %bb49.1
@@ -23,34 +23,34 @@
   br label %read_fatal
 
 bb59:                                             ; preds = %bb51
-  br i1 undef, label %bb60, label %bb3.i156
+  br i1 %c2, label %bb60, label %bb3.i156
 
 bb3.i156:                                         ; preds = %bb59
   br label %read_fatal
 
 bb60:                                             ; preds = %bb59
-  br i1 undef, label %bb78.preheader, label %rewrite
+  br i1 %c3, label %bb78.preheader, label %rewrite
 
 bb78.preheader:                                   ; preds = %bb60
-  br i1 undef, label %bb62, label %bb80
+  br i1 %c4, label %bb62, label %bb80
 
 bb62:                                             ; preds = %bb78.preheader
-  br i1 undef, label %bb64, label %read_mismatch
+  br i1 %c5, label %bb64, label %read_mismatch
 
 bb64:                                             ; preds = %bb62
-  br i1 undef, label %bb65, label %read_mismatch
+  br i1 %c6, label %bb65, label %read_mismatch
 
 bb65:                                             ; preds = %bb64
-  br i1 undef, label %bb75, label %read_mismatch
+  br i1 %c7, label %bb75, label %read_mismatch
 
 read_mismatch:                                    ; preds = %bb98, %bb119.preheader, %bb72, %bb71, %bb65, %bb64, %bb62
   br label %read_fatal
 
 bb71:                                             ; preds = %bb75
-  br i1 undef, label %bb72, label %read_mismatch
+  br i1 %c8, label %bb72, label %read_mismatch
 
 bb72:                                             ; preds = %bb71
-  br i1 undef, label %bb73, label %read_mismatch
+  br i1 %c9, label %bb73, label %read_mismatch
 
 bb73:                                             ; preds = %bb72
   unreachable
@@ -59,22 +59,22 @@
   br label %bb75
 
 bb75:                                             ; preds = %bb74, %bb65
-  br i1 undef, label %bb74, label %bb71
+  br i1 %c10, label %bb74, label %bb71
 
 bb80:                                             ; preds = %bb78.preheader
   unreachable
 
 read_fatal:                                       ; preds = %read_mismatch, %bb3.i156, %bb58
-  br i1 undef, label %return, label %bb25
+  br i1 %c11, label %return, label %bb25
 
 rewrite:                                          ; preds = %bb60, %bb51
-  br i1 undef, label %bb94, label %bb119.preheader
+  br i1 %c12, label %bb94, label %bb119.preheader
 
 bb94:                                             ; preds = %rewrite
   unreachable
 
 bb119.preheader:                                  ; preds = %rewrite
-  br i1 undef, label %read_mismatch, label %bb98
+  br i1 %c13, label %read_mismatch, label %bb98
 
 bb98:                                             ; preds = %bb119.preheader
   br label %read_mismatch
@@ -83,17 +83,17 @@
   ret void
 
 bb49.1:                                           ; preds = %bb48, %bb25
-  br i1 undef, label %bb49.2, label %bb48.2
+  br i1 %c14, label %bb49.2, label %bb48.2
 
 bb49.2:                                           ; preds = %bb48.2, %bb49.1
-  br i1 undef, label %bb49.3, label %bb48.3
+  br i1 %c15, label %bb49.3, label %bb48.3
 
 bb48.2:                                           ; preds = %bb49.1
   br label %bb49.2
 
 bb49.3:                                           ; preds = %bb48.3, %bb49.2
   %c_ix.0.3 = phi i32 [ undef, %bb48.3 ], [ undef, %bb49.2 ] ; <i32> [#uses=1]
-  br i1 undef, label %bb51, label %bb48.4
+  br i1 %c16, label %bb51, label %bb48.4
 
 bb48.3:                                           ; preds = %bb49.2
   store ptr undef, ptr undef, align 4
diff --git a/llvm/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll b/llvm/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll
--- a/llvm/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll
+++ b/llvm/test/CodeGen/PowerPC/2009-11-25-ImpDefBug.ll
@@ -3,15 +3,15 @@
 
 %struct..0EdgeT = type { i32, i32, float, float, i32, i32, i32, float, i32, i32 }
 
-define void @smooth_color_z_triangle(i32 %v0, i32 %v1, i32 %v2, i32 %pv) nounwind {
+define void @smooth_color_z_triangle(i32 %v0, i32 %v1, i32 %v2, i32 %pv, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) nounwind {
 entry:
-  br i1 undef, label %return, label %bb14
+  br i1 %c0, label %return, label %bb14
 
 bb14:                                             ; preds = %entry
-  br i1 undef, label %bb15, label %return
+  br i1 %c1, label %bb15, label %return
 
 bb15:                                             ; preds = %bb14
-  br i1 undef, label %bb16, label %bb17
+  br i1 %c2, label %bb16, label %bb17
 
 bb16:                                             ; preds = %bb15
   br label %bb17
@@ -22,19 +22,19 @@
   br label %bb69
 
 bb24:                                             ; preds = %bb69
-  br i1 undef, label %bb25, label %bb28
+  br i1 %c3, label %bb25, label %bb28
 
 bb25:                                             ; preds = %bb24
   br label %bb33
 
 bb28:                                             ; preds = %bb24
-  br i1 undef, label %return, label %bb32
+  br i1 %c4, label %return, label %bb32
 
 bb32:                                             ; preds = %bb28
   br i1 %0, label %bb38, label %bb33
 
 bb33:                                             ; preds = %bb32, %bb25
-  br i1 undef, label %bb34, label %bb38
+  br i1 %c5, label %bb34, label %bb38
 
 bb34:                                             ; preds = %bb33
   br label %bb38
@@ -49,7 +49,7 @@
 bb69:                                             ; preds = %bb38, %bb17
   %fdgOuter.1 = phi i32 [ undef, %bb17 ], [ %fdgOuter.0, %bb38 ] ; <i32> [#uses=2]
   %fz.2 = phi i32 [ undef, %bb17 ], [ %fz.3, %bb38 ] ; <i32> [#uses=2]
-  br i1 undef, label %bb24, label %return
+  br i1 %c6, label %bb24, label %return
 
 return:                                           ; preds = %bb69, %bb28, %bb14, %entry
   ret void
diff --git a/llvm/test/CodeGen/PowerPC/2010-04-01-MachineCSEBug.ll b/llvm/test/CodeGen/PowerPC/2010-04-01-MachineCSEBug.ll
--- a/llvm/test/CodeGen/PowerPC/2010-04-01-MachineCSEBug.ll
+++ b/llvm/test/CodeGen/PowerPC/2010-04-01-MachineCSEBug.ll
@@ -7,55 +7,55 @@
 %struct.InStream = type { %struct.Buffer, %0, %1, ptr, ptr }
 %struct.InStreamMethods = type { ptr, ptr, ptr, ptr }
 
-define i64 @t(ptr %is) nounwind optsize ssp {
+define i64 @t(ptr %is, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7) nounwind optsize ssp {
 entry:
-  br i1 undef, label %is_read_byte.exit, label %bb.i
+  br i1 %c0, label %is_read_byte.exit, label %bb.i
 
 bb.i:                                             ; preds = %entry
   br label %is_read_byte.exit
 
 is_read_byte.exit:                                ; preds = %bb.i, %entry
-  br i1 undef, label %is_read_byte.exit22, label %bb.i21
+  br i1 %c1, label %is_read_byte.exit22, label %bb.i21
 
 bb.i21:                                           ; preds = %is_read_byte.exit
   unreachable
 
 is_read_byte.exit22:                              ; preds = %is_read_byte.exit
-  br i1 undef, label %is_read_byte.exit19, label %bb.i18
+  br i1 %c2, label %is_read_byte.exit19, label %bb.i18
 
 bb.i18:                                           ; preds = %is_read_byte.exit22
   br label %is_read_byte.exit19
 
 is_read_byte.exit19:                              ; preds = %bb.i18, %is_read_byte.exit22
-  br i1 undef, label %is_read_byte.exit16, label %bb.i15
+  br i1 %c3, label %is_read_byte.exit16, label %bb.i15
 
 bb.i15:                                           ; preds = %is_read_byte.exit19
   unreachable
 
 is_read_byte.exit16:                              ; preds = %is_read_byte.exit19
   %0 = shl i64 undef, 32                          ; <i64> [#uses=1]
-  br i1 undef, label %is_read_byte.exit13, label %bb.i12
+  br i1 %c4, label %is_read_byte.exit13, label %bb.i12
 
 bb.i12:                                           ; preds = %is_read_byte.exit16
   unreachable
 
 is_read_byte.exit13:                              ; preds = %is_read_byte.exit16
   %1 = shl i64 undef, 24                          ; <i64> [#uses=1]
-  br i1 undef, label %is_read_byte.exit10, label %bb.i9
+  br i1 %c5, label %is_read_byte.exit10, label %bb.i9
 
 bb.i9:                                            ; preds = %is_read_byte.exit13
   unreachable
 
 is_read_byte.exit10:                              ; preds = %is_read_byte.exit13
   %2 = shl i64 undef, 16                          ; <i64> [#uses=1]
-  br i1 undef, label %is_read_byte.exit7, label %bb.i6
+  br i1 %c6, label %is_read_byte.exit7, label %bb.i6
 
 bb.i6:                                            ; preds = %is_read_byte.exit10
   br label %is_read_byte.exit7
 
 is_read_byte.exit7:                               ; preds = %bb.i6, %is_read_byte.exit10
   %3 = shl i64 undef, 8                           ; <i64> [#uses=1]
-  br i1 undef, label %is_read_byte.exit4, label %bb.i3
+  br i1 %c7, label %is_read_byte.exit4, label %bb.i3
 
 bb.i3:                                            ; preds = %is_read_byte.exit7
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/2016-01-07-BranchWeightCrash.ll b/llvm/test/CodeGen/PowerPC/2016-01-07-BranchWeightCrash.ll
--- a/llvm/test/CodeGen/PowerPC/2016-01-07-BranchWeightCrash.ll
+++ b/llvm/test/CodeGen/PowerPC/2016-01-07-BranchWeightCrash.ll
@@ -7,9 +7,9 @@
 declare i32 @__f1(ptr, ptr noalias)
 
 ; CHECK-LABEL: f1:
-define i32 @f1(ptr %__user_context, ptr noalias %f1.buffer) {
+define i32 @f1(ptr %__user_context, ptr noalias %f1.buffer, i1 %c0) {
 entry:
-  br i1 undef, label %"assert succeeded", label %"assert failed", !prof !1
+  br i1 %c0, label %"assert succeeded", label %"assert failed", !prof !1
 
 "assert failed":                                  ; preds = %entry
   br label %destructor_block
diff --git a/llvm/test/CodeGen/PowerPC/PR3488.ll b/llvm/test/CodeGen/PowerPC/PR3488.ll
--- a/llvm/test/CodeGen/PowerPC/PR3488.ll
+++ b/llvm/test/CodeGen/PowerPC/PR3488.ll
@@ -96,10 +96,10 @@
 @nr_cpu_ids = external local_unnamed_addr global i32, align 4
 
 ; Function Attrs: nounwind
-define void @__alloc_pages_nodemask() #0 {
+define void @__alloc_pages_nodemask(i1 %c0) #0 {
 entry:
   %0 = call i64 asm sideeffect "ld${1:U}${1:X} $0,$1", "=r,*m"(ptr elementtype(i64) undef)
-  br i1 undef, label %do.body.lr.ph.i.i.i, label %zone_page_state_snapshot.exit.i.i
+  br i1 %c0, label %do.body.lr.ph.i.i.i, label %zone_page_state_snapshot.exit.i.i
 ; CHECK: ld 3, 0(3)
 
 do.body.lr.ph.i.i.i:                              ; preds = %entry
diff --git a/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll b/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
--- a/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
+++ b/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
@@ -4,7 +4,7 @@
 target triple = "powerpc64le-grtev4-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @_ZN10SubProcess19ScrubbedForkAndExecEiPiS0_PNS_7ResultsE() #0 align 2 {
+define void @_ZN10SubProcess19ScrubbedForkAndExecEiPiS0_PNS_7ResultsE(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14, i1 %c15, i1 %c16, i1 %c17, i1 %c18, i1 %c19, i1 %c20, i1 %c21, i1 %c22, i1 %c23, i1 %c24, i1 %c25, i1 %c26, i1 %c27, i1 %c28, i1 %c29, i1 %c30, i1 %c31, i1 %c32, i1 %c33, i1 %c34, i1 %c35, i1 %c36, i1 %c37, i1 %c38, i1 %c39, i1 %c40, i1 %c41, i1 %c42, i1 %c43, i1 %c44, i1 %c45, i1 %c46, i1 %c47) #0 align 2 {
 ; CHECK: lis 3, 1234
 ; CHECK-NOT: li 3
 ; CHECK-NOT: ori 3
@@ -12,31 +12,31 @@
 ; CHECK-NOT: addis 3
 ; CHECK-NOT: lis 3
 ; CHECK: sc
-  br i1 undef, label %1, label %2
+  br i1 %c0, label %1, label %2
 
 ; <label>:1                                       ; preds = %0
   br label %60
 
 ; <label>:2                                       ; preds = %0
-  br i1 undef, label %3, label %4
+  br i1 %c1, label %3, label %4
 
 ; <label>:3                                       ; preds = %2
   unreachable
 
 ; <label>:4                                       ; preds = %2
-  br i1 undef, label %.lr.ph111, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
+  br i1 %c2, label %.lr.ph111, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
 
 .lr.ph111:                                        ; preds = %4
   br label %5
 
 _ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit: ; preds = %12, %4
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader, label %13
+  br i1 %c3, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader, label %13
 
 ; <label>:5                                       ; preds = %12, %.lr.ph111
-  br i1 undef, label %6, label %9
+  br i1 %c4, label %6, label %9
 
 ; <label>:6                                       ; preds = %5
-  br i1 undef, label %7, label %8
+  br i1 %c5, label %7, label %8
 
 ; <label>:7                                       ; preds = %6
   unreachable
@@ -45,7 +45,7 @@
   br label %12
 
 ; <label>:9                                       ; preds = %5
-  br i1 undef, label %10, label %11
+  br i1 %c6, label %10, label %11
 
 ; <label>:10                                      ; preds = %9
   br label %12
@@ -54,46 +54,46 @@
   br label %12
 
 ; <label>:12                                      ; preds = %11, %10, %8
-  br i1 undef, label %5, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
+  br i1 %c7, label %5, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
 
 ; <label>:13                                      ; preds = %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader, label %14
+  br i1 %c8, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader, label %14
 
 ; <label>:14                                      ; preds = %13
   br label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader
 
 _ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader: ; preds = %14, %13, %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge
+  br i1 %c9, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge
 
 _ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader: ; preds = %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19, %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader
   br label %_ZN10SubProcess12SafeSyscalls5closeEi.exit
 
 _ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge: ; preds = %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19, %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19.preheader
-  br i1 undef, label %15, label %19
+  br i1 %c10, label %15, label %19
 
 _ZN10SubProcess12SafeSyscalls5closeEi.exit:       ; preds = %_ZN10SubProcess12SafeSyscalls5closeEi.exit, %_ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19
+  br i1 %c11, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19
 
 _ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19: ; preds = %_ZN10SubProcess12SafeSyscalls5closeEi.exit
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader
+  br i1 %c12, label %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit.preheader
 
 ; <label>:15                                      ; preds = %_ZN10SubProcess12SafeSyscalls11sigprocmaskEiPKNS0_15kernel_sigset_tEPS1_.exit19._crit_edge
   br label %16
 
 ; <label>:16                                      ; preds = %17, %15
-  br i1 undef, label %17, label %.critedge.preheader
+  br i1 %c13, label %17, label %.critedge.preheader
 
 ; <label>:17                                      ; preds = %16
-  br i1 undef, label %16, label %.critedge.preheader
+  br i1 %c14, label %16, label %.critedge.preheader
 
 .critedge.preheader:                              ; preds = %17, %16
   br label %.critedge
 
 .critedge:                                        ; preds = %18, %.critedge.preheader
-  br i1 undef, label %18, label %.critedge8
+  br i1 %c15, label %18, label %.critedge8
 
 ; <label>:18                                      ; preds = %.critedge
-  br i1 undef, label %.critedge, label %.critedge8
+  br i1 %c16, label %.critedge, label %.critedge8
 
 .critedge8:                                       ; preds = %18, %.critedge
   br label %59
@@ -102,7 +102,7 @@
   br label %_ZN10SubProcess12SafeSyscalls5closeEi.exit22
 
 _ZN10SubProcess12SafeSyscalls5closeEi.exit22:     ; preds = %_ZN10SubProcess12SafeSyscalls5closeEi.exit22, %19
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit22, label %20
+  br i1 %c17, label %_ZN10SubProcess12SafeSyscalls5closeEi.exit22, label %20
 
 ; <label>:20                                      ; preds = %_ZN10SubProcess12SafeSyscalls5closeEi.exit22
   %21 = alloca i8, i64 undef, align 1
@@ -116,10 +116,10 @@
   store ptr %21, ptr undef, align 8
   store i32 1073741824, ptr undef, align 8
   %22 = call { i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "sc\0A\09mfcr $0", "=&{r0},=&{r3},=&{r4},=&{r5},=&{r6},=&{r7},=&{r8},{r0},{r3},{r4},{r5},~{cr0},~{ctr},~{memory},~{r11},~{r12}"(i64 342, i64 80871424, i64 undef, i64 0) #2, !srcloc !1
-  br i1 undef, label %.lr.ph, label %.critedge15.preheader
+  br i1 %c18, label %.lr.ph, label %.critedge15.preheader
 
 .critedge15.preheader:                            ; preds = %_ZN10SubProcess12SafeSyscalls7recvmsgEiPNS0_13kernel_msghdrEi.exit.backedge, %.thread
-  br i1 undef, label %.lr.ph93.preheader, label %.critedge15._crit_edge
+  br i1 %c19, label %.lr.ph93.preheader, label %.critedge15._crit_edge
 
 .lr.ph93.preheader:                               ; preds = %.critedge15.preheader
   br label %.lr.ph93
@@ -131,13 +131,13 @@
   ]
 
 _ZN10SubProcess12SafeSyscalls7recvmsgEiPNS0_13kernel_msghdrEi.exit.backedge: ; preds = %.lr.ph, %.lr.ph
-  br i1 undef, label %.lr.ph, label %.critedge15.preheader
+  br i1 %c20, label %.lr.ph, label %.critedge15.preheader
 
 .critedge9:                                       ; preds = %.lr.ph
   unreachable
 
 .critedge15._crit_edge:                           ; preds = %.critedge15, %.critedge15.preheader
-  br i1 undef, label %35, label %34
+  br i1 %c21, label %35, label %34
 
 .lr.ph93:                                         ; preds = %.critedge15, %.lr.ph93.preheader
   switch i32 undef, label %33 [
@@ -154,31 +154,31 @@
   ]
 
 ; <label>:23                                      ; preds = %.lr.ph93, %.lr.ph93, %.lr.ph93, %.lr.ph93, %.lr.ph93, %.lr.ph93, %.lr.ph93, %.lr.ph93
-  br i1 undef, label %24, label %.critedge15
+  br i1 %c22, label %24, label %.critedge15
 
 ; <label>:24                                      ; preds = %23
-  br i1 undef, label %.critedge15, label %25
+  br i1 %c23, label %.critedge15, label %25
 
 ; <label>:25                                      ; preds = %24
-  br i1 undef, label %.critedge15, label %26
+  br i1 %c24, label %.critedge15, label %26
 
 ; <label>:26                                      ; preds = %25
   unreachable
 
 ; <label>:27                                      ; preds = %.lr.ph93
-  br i1 undef, label %.critedge15, label %28
+  br i1 %c25, label %.critedge15, label %28
 
 ; <label>:28                                      ; preds = %27
-  br i1 undef, label %29, label %.critedge15
+  br i1 %c26, label %29, label %.critedge15
 
 ; <label>:29                                      ; preds = %28
   br label %.critedge15
 
 ; <label>:30                                      ; preds = %.lr.ph93
-  br i1 undef, label %.critedge15, label %31
+  br i1 %c27, label %.critedge15, label %31
 
 ; <label>:31                                      ; preds = %30
-  br i1 undef, label %32, label %.critedge15
+  br i1 %c28, label %32, label %.critedge15
 
 ; <label>:32                                      ; preds = %31
   br label %.critedge15
@@ -187,22 +187,22 @@
   unreachable
 
 .critedge15:                                      ; preds = %32, %31, %30, %29, %28, %27, %25, %24, %23
-  br i1 undef, label %.lr.ph93, label %.critedge15._crit_edge
+  br i1 %c29, label %.lr.ph93, label %.critedge15._crit_edge
 
 ; <label>:34                                      ; preds = %.critedge15._crit_edge
   unreachable
 
 ; <label>:35                                      ; preds = %.critedge15._crit_edge
-  br i1 undef, label %45, label %36
+  br i1 %c30, label %45, label %36
 
 ; <label>:36                                      ; preds = %35
-  br i1 undef, label %37, label %38
+  br i1 %c31, label %37, label %38
 
 ; <label>:37                                      ; preds = %36
-  br i1 undef, label %.preheader, label %38
+  br i1 %c32, label %.preheader, label %38
 
 .preheader:                                       ; preds = %37
-  br i1 undef, label %.lr.ph101, label %._crit_edge
+  br i1 %c33, label %.lr.ph101, label %._crit_edge
 
 .lr.ph101:                                        ; preds = %.preheader
   br label %39
@@ -211,49 +211,49 @@
   unreachable
 
 ; <label>:39                                      ; preds = %43, %.lr.ph101
-  br i1 undef, label %40, label %43
+  br i1 %c34, label %40, label %43
 
 ; <label>:40                                      ; preds = %39
-  br i1 undef, label %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit17, label %41
+  br i1 %c35, label %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit17, label %41
 
 ; <label>:41                                      ; preds = %40
   unreachable
 
 _ZN10SubProcess12SafeSyscalls5fcntlEiil.exit17:   ; preds = %40
-  br i1 undef, label %42, label %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit
+  br i1 %c36, label %42, label %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit
 
 ; <label>:42                                      ; preds = %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit17
   unreachable
 
 _ZN10SubProcess12SafeSyscalls5fcntlEiil.exit:     ; preds = %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit17
-  br i1 undef, label %.thread27, label %43
+  br i1 %c37, label %.thread27, label %43
 
 ; <label>:43                                      ; preds = %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit, %39
-  br i1 undef, label %39, label %._crit_edge
+  br i1 %c38, label %39, label %._crit_edge
 
 .thread27:                                        ; preds = %_ZN10SubProcess12SafeSyscalls5fcntlEiil.exit
   br label %58
 
 ._crit_edge:                                      ; preds = %43, %.preheader
-  br i1 undef, label %.thread.outer, label %44
+  br i1 %c39, label %.thread.outer, label %44
 
 ; <label>:44                                      ; preds = %._crit_edge
   unreachable
 
 ; <label>:45                                      ; preds = %35
-  br i1 undef, label %46, label %.thread
+  br i1 %c40, label %46, label %.thread
 
 ; <label>:46                                      ; preds = %45
-  br i1 undef, label %48, label %47
+  br i1 %c41, label %48, label %47
 
 ; <label>:47                                      ; preds = %46
   unreachable
 
 ; <label>:48                                      ; preds = %46
-  br i1 undef, label %55, label %49
+  br i1 %c42, label %55, label %49
 
 ; <label>:49                                      ; preds = %48
-  br i1 undef, label %50, label %51
+  br i1 %c43, label %50, label %51
 
 ; <label>:50                                      ; preds = %49
   br label %52
@@ -265,10 +265,10 @@
   br label %53
 
 ; <label>:53                                      ; preds = %54, %52
-  br i1 undef, label %54, label %.critedge13
+  br i1 %c44, label %54, label %.critedge13
 
 ; <label>:54                                      ; preds = %53
-  br i1 undef, label %53, label %.critedge13
+  br i1 %c45, label %53, label %.critedge13
 
 .critedge13:                                      ; preds = %54, %53
   br label %58
@@ -277,10 +277,10 @@
   br label %56
 
 ; <label>:56                                      ; preds = %57, %55
-  br i1 undef, label %57, label %.critedge14
+  br i1 %c46, label %57, label %.critedge14
 
 ; <label>:57                                      ; preds = %56
-  br i1 undef, label %56, label %.critedge14
+  br i1 %c47, label %56, label %.critedge14
 
 .critedge14:                                      ; preds = %57, %56
   br label %58
diff --git a/llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll b/llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
--- a/llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
@@ -6,7 +6,7 @@
 ; RUN:   -verify-machineinstrs -O2 -mattr=vsx < %s | \
 ; RUN:    FileCheck %s
 
-define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2) {
+define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2, i1 %c0) {
 ; CHECK-AIX-LABEL: test_aix_splatimm:
 ; CHECK-AIX:       # %bb.0: # %bb
 ; CHECK-AIX-NEXT:    bclr 12, 20, 0
@@ -53,7 +53,7 @@
 ; CHECK-NEXT:    vsplth 3, 3, 3
 ; CHECK-NEXT:    stxvd2x 35, 0, 3
 bb:
-  br i1 undef, label %bb22, label %bb3
+  br i1 %c0, label %bb22, label %bb3
 
 bb3:                                              ; preds = %bb
   %i = insertelement <8 x i16> undef, i16 0, i32 0
diff --git a/llvm/test/CodeGen/PowerPC/ashr-neg1.ll b/llvm/test/CodeGen/PowerPC/ashr-neg1.ll
--- a/llvm/test/CodeGen/PowerPC/ashr-neg1.ll
+++ b/llvm/test/CodeGen/PowerPC/ashr-neg1.ll
@@ -1,13 +1,13 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD30723(i32) {
+define void @autogen_SD30723(i32, i1 %c0) {
 BB:
   br label %CF80
 
 CF80:                                             ; preds = %CF80, %BB
   %B = ashr i32 %0, -1
-  br i1 undef, label %CF80, label %CF84
+  br i1 %c0, label %CF80, label %CF84
 
 CF84:                                             ; preds = %CF84, %CF80
   %Cmp62 = icmp sge i32 undef, %B
diff --git a/llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll b/llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll
--- a/llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll
+++ b/llvm/test/CodeGen/PowerPC/asym-regclass-copy.ll
@@ -12,9 +12,9 @@
 
 declare void @benchmark_heapsort(i32 signext, ptr nocapture) #0
 
-define signext i32 @main(i32 signext %argc, ptr nocapture %argv) #0 {
+define signext i32 @main(i32 signext %argc, ptr nocapture %argv, i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %cond.true, label %cond.end
+  br i1 %c0, label %cond.true, label %cond.end
 
 cond.true:                                        ; preds = %entry
   br label %cond.end
@@ -25,7 +25,7 @@
   %conv = sext i32 %add to i64
   %mul = shl nsw i64 %conv, 3
   %call1 = tail call noalias ptr @malloc(i64 %mul) #1
-  br i1 undef, label %for.end, label %for.body.lr.ph
+  br i1 %c1, label %for.end, label %for.body.lr.ph
 
 for.body.lr.ph:                                   ; preds = %cond.end
   br label %for.body
diff --git a/llvm/test/CodeGen/PowerPC/bdzlr.ll b/llvm/test/CodeGen/PowerPC/bdzlr.ll
--- a/llvm/test/CodeGen/PowerPC/bdzlr.ll
+++ b/llvm/test/CodeGen/PowerPC/bdzlr.ll
@@ -22,12 +22,12 @@
 %struct.lua_Debug.12.687 = type { i32, ptr, ptr, ptr, ptr, i32, i32, i32, i32, [60 x i8], i32 }
 %struct.lua_longjmp.13.688 = type opaque
 
-define void @lua_xmove(i32 signext %n) #0 {
+define void @lua_xmove(i32 signext %n, i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %for.end, label %if.end
+  br i1 %c0, label %for.end, label %if.end
 
 if.end:                                           ; preds = %entry
-  br i1 undef, label %for.body.lr.ph, label %for.end
+  br i1 %c1, label %for.body.lr.ph, label %for.end
 
 for.body.lr.ph:                                   ; preds = %if.end
   br label %for.body
diff --git a/llvm/test/CodeGen/PowerPC/bv-pres-v8i1.ll b/llvm/test/CodeGen/PowerPC/bv-pres-v8i1.ll
--- a/llvm/test/CodeGen/PowerPC/bv-pres-v8i1.ll
+++ b/llvm/test/CodeGen/PowerPC/bv-pres-v8i1.ll
@@ -1,12 +1,12 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD70() {
+define void @autogen_SD70(i1 %c0, i1 %c1, i1 %c2, i1 %c3) {
 BB:
   br label %CF78
 
 CF78:                                             ; preds = %CF87, %CF78, %BB
-  br i1 undef, label %CF78, label %CF87
+  br i1 %c0, label %CF78, label %CF87
 
 CF87:                                             ; preds = %CF78
   %Cmp19 = icmp sge <8 x i1> zeroinitializer, zeroinitializer
@@ -14,16 +14,16 @@
   br i1 %Cmp26, label %CF78, label %CF79
 
 CF79:                                             ; preds = %CF79, %CF87
-  br i1 undef, label %CF79, label %CF82
+  br i1 %c1, label %CF79, label %CF82
 
 CF82:                                             ; preds = %CF82, %CF79
-  br i1 undef, label %CF82, label %CF84
+  br i1 %c2, label %CF82, label %CF84
 
 CF84:                                             ; preds = %CF82
   br label %CF
 
 CF:                                               ; preds = %CF88, %CF, %CF84
-  br i1 undef, label %CF, label %CF85
+  br i1 %c3, label %CF, label %CF85
 
 CF85:                                             ; preds = %CF85, %CF
   %I52 = insertelement <8 x i1> %Cmp19, i1 %Cmp26, i32 6
diff --git a/llvm/test/CodeGen/PowerPC/bv-widen-undef.ll b/llvm/test/CodeGen/PowerPC/bv-widen-undef.ll
--- a/llvm/test/CodeGen/PowerPC/bv-widen-undef.ll
+++ b/llvm/test/CodeGen/PowerPC/bv-widen-undef.ll
@@ -1,16 +1,16 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD4357(i8) {
+define void @autogen_SD4357(i8, i1 %c0, i1 %c1) {
 BB:
   br label %CF
 
 CF:                                               ; preds = %CF, %BB
-  br i1 undef, label %CF, label %CF77
+  br i1 %c0, label %CF, label %CF77
 
 CF77:                                             ; preds = %CF81, %CF77, %CF
   %Shuff12 = shufflevector <2 x i8> <i8 -1, i8 -1>, <2 x i8> <i8 -1, i8 -1>, <2 x i32> <i32 0, i32 undef>
-  br i1 undef, label %CF77, label %CF80
+  br i1 %c1, label %CF77, label %CF80
 
 CF80:                                             ; preds = %CF80, %CF77
   %B21 = mul <2 x i8> %Shuff12, <i8 -1, i8 -1>
diff --git a/llvm/test/CodeGen/PowerPC/cr-spills.ll b/llvm/test/CodeGen/PowerPC/cr-spills.ll
--- a/llvm/test/CodeGen/PowerPC/cr-spills.ll
+++ b/llvm/test/CodeGen/PowerPC/cr-spills.ll
@@ -14,10 +14,10 @@
 @wp_luma_round = external global i32, align 4
 @luma_log_weight_denom = external global i32, align 4
 
-define void @SetupFastFullPelSearch() #0 {
+define void @SetupFastFullPelSearch(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14) #0 {
 entry:
   %mul10 = mul nsw i32 undef, undef
-  br i1 undef, label %land.end, label %land.lhs.true
+  br i1 %c0, label %land.end, label %land.lhs.true
 
 land.lhs.true:                                    ; preds = %entry
   switch i32 0, label %land.end [
@@ -32,7 +32,7 @@
 land.end:                                         ; preds = %land.rhs, %land.lhs.true, %entry
   %0 = phi i1 [ %tobool21, %land.rhs ], [ false, %land.lhs.true ], [ false, %entry ]
   %cond = load ptr, ptr undef, align 8
-  br i1 undef, label %if.then95, label %for.body.lr.ph
+  br i1 %c1, label %if.then95, label %for.body.lr.ph
 
 if.then95:                                        ; preds = %land.end
   %cmp.i4.i1427 = icmp slt i32 undef, undef
@@ -42,7 +42,7 @@
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %for.body.lr.ph
-  br i1 undef, label %for.body, label %for.body252
+  br i1 %c2, label %for.body, label %for.body252
 
 for.body252:                                      ; preds = %for.inc997, %for.body
   %shl263 = add i32 undef, 80
@@ -331,56 +331,56 @@
   store i32 %add402, ptr undef, align 4
   store i32 %add458, ptr undef, align 4
   store i32 %add514, ptr null, align 4
-  br i1 undef, label %for.end543, label %for.cond290.preheader
+  br i1 %c3, label %for.end543, label %for.cond290.preheader
 
 for.end543:                                       ; preds = %for.end520
-  br i1 undef, label %for.inc997, label %for.body549
+  br i1 %c4, label %for.inc997, label %for.body549
 
 for.body549:                                      ; preds = %for.inc701, %for.end543
   %call554 = call ptr null(ptr null, i32 signext undef, i32 signext %shl263) #1
   br label %for.cond559.preheader
 
 for.cond559.preheader:                            ; preds = %for.cond559.preheader, %for.body549
-  br i1 undef, label %for.inc701, label %for.cond559.preheader
+  br i1 %c5, label %for.inc701, label %for.cond559.preheader
 
 for.inc701:                                       ; preds = %for.cond559.preheader
-  br i1 undef, label %for.inc997, label %for.body549
+  br i1 %c6, label %for.inc997, label %for.body549
 
 for.cond713.preheader:                            ; preds = %for.end850, %for.body252
   br label %for.body716
 
 for.body716:                                      ; preds = %for.body716, %for.cond713.preheader
-  br i1 undef, label %for.end850, label %for.body716
+  br i1 %c7, label %for.end850, label %for.body716
 
 for.end850:                                       ; preds = %for.body716
-  br i1 undef, label %for.end873, label %for.cond713.preheader
+  br i1 %c8, label %for.end873, label %for.cond713.preheader
 
 for.end873:                                       ; preds = %for.end850
-  br i1 undef, label %for.inc997, label %for.body879
+  br i1 %c9, label %for.inc997, label %for.body879
 
 for.body879:                                      ; preds = %for.inc992, %for.end873
   br label %for.cond889.preheader
 
 for.cond889.preheader:                            ; preds = %for.end964, %for.body879
-  br i1 undef, label %for.cond894.preheader.lr.ph, label %for.end964
+  br i1 %c10, label %for.cond894.preheader.lr.ph, label %for.end964
 
 for.cond894.preheader.lr.ph:                      ; preds = %for.cond889.preheader
   br label %for.body898.lr.ph.us
 
 for.end957.us:                                    ; preds = %for.body946.us
-  br i1 undef, label %for.body898.lr.ph.us, label %for.end964
+  br i1 %c11, label %for.body898.lr.ph.us, label %for.end964
 
 for.body946.us:                                   ; preds = %for.body930.us, %for.body946.us
   br i1 false, label %for.body946.us, label %for.end957.us
 
 for.body930.us:                                   ; preds = %for.body914.us, %for.body930.us
-  br i1 undef, label %for.body930.us, label %for.body946.us
+  br i1 %c12, label %for.body930.us, label %for.body946.us
 
 for.body914.us:                                   ; preds = %for.body898.us, %for.body914.us
-  br i1 undef, label %for.body914.us, label %for.body930.us
+  br i1 %c13, label %for.body914.us, label %for.body930.us
 
 for.body898.us:                                   ; preds = %for.body898.lr.ph.us, %for.body898.us
-  br i1 undef, label %for.body898.us, label %for.body914.us
+  br i1 %c14, label %for.body898.us, label %for.body914.us
 
 for.body898.lr.ph.us:                             ; preds = %for.end957.us, %for.cond894.preheader.lr.ph
   br label %for.body898.us
diff --git a/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll b/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll
--- a/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll
+++ b/llvm/test/CodeGen/PowerPC/ctr-cleanup.ll
@@ -2,9 +2,9 @@
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @main() #0 {
+define void @main(i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll b/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll
--- a/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll
+++ b/llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll
@@ -2,9 +2,9 @@
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32"
 target triple = "powerpc-unknown-linux-gnu"
 
-define void @fn1() {
+define void @fn1(i1 %c0) {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %inc3 = phi i64 [ %inc, %for.body ], [ undef, %entry ]
diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-reg.ll b/llvm/test/CodeGen/PowerPC/ctrloop-reg.ll
--- a/llvm/test/CodeGen/PowerPC/ctrloop-reg.ll
+++ b/llvm/test/CodeGen/PowerPC/ctrloop-reg.ll
@@ -44,10 +44,10 @@
 
 declare void @interp_fix_op(ptr nocapture) nounwind
 
-define i32 @interpret(ptr %pref, i32 %user_errors) nounwind {
+define i32 @interpret(ptr %pref, i32 %user_errors, i1 %c0) nounwind {
 entry:
   %erref = alloca %struct.ref_s.1.49.91.115.121.139.145.151.157.163.169.175.181.211, align 8
-  br i1 undef, label %retry.us, label %retry
+  br i1 %c0, label %retry.us, label %retry
 
 retry.us:                                         ; preds = %if.end18, %retry, %retry, %retry, %retry, %entry
   ret i32 undef
diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll
--- a/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll
+++ b/llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll
@@ -3,9 +3,9 @@
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define hidden void @_mpd_shortdiv(i64 %n) #0 {
+define hidden void @_mpd_shortdiv(i64 %n, i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body.lr.ph
+  br i1 %c0, label %for.end, label %for.body.lr.ph
 
 for.body.lr.ph:                                   ; preds = %entry
   br label %for.body
diff --git a/llvm/test/CodeGen/PowerPC/early-ret2.ll b/llvm/test/CodeGen/PowerPC/early-ret2.ll
--- a/llvm/test/CodeGen/PowerPC/early-ret2.ll
+++ b/llvm/test/CodeGen/PowerPC/early-ret2.ll
@@ -3,12 +3,12 @@
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @_Z8example3iPiS_() #0 {
+define void @_Z8example3iPiS_(i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %while.end, label %while.body.lr.ph
+  br i1 %c0, label %while.end, label %while.body.lr.ph
 
 while.body.lr.ph:                                 ; preds = %entry
-  br i1 undef, label %while.end, label %while.body
+  br i1 %c1, label %while.end, label %while.body
 
 while.body:                                       ; preds = %while.body, %while.body.lr.ph
   br i1 false, label %while.end, label %while.body, !llvm.loop.vectorize.already_vectorized !0
diff --git a/llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll b/llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
--- a/llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
+++ b/llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
@@ -21,7 +21,7 @@
 %"struct.pov::ot_node_struct" = type { %"struct.pov::ot_id_struct", %"struct.pov::ot_block_struct"*, [8 x %"struct.pov::ot_node_struct"*] }
 %"struct.pov::ot_id_struct" = type { i32, i32, i32, i32 }
 
-define void @_ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE(%"struct.pov::ot_block_struct"* %new_block) {
+define void @_ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE(%"struct.pov::ot_block_struct"* %new_block, i1 %c0) {
 ; CHECK-GEN-ISEL-TRUE-LABEL: _ZN3pov6ot_insEPPNS_14ot_node_structEPNS_15ot_block_structEPNS_12ot_id_structE:
 ; CHECK-GEN-ISEL-TRUE:       # %bb.0: # %entry
 ; CHECK-GEN-ISEL-TRUE-NEXT:    mflr r0
@@ -129,7 +129,7 @@
   %call.i84 = tail call i8* @ZN3pov10pov_callocEmmPKciS1_pov()
   store i8* %call.i84, i8** undef, align 8
   %1 = bitcast i8* %call.i84 to %"struct.pov::ot_node_struct"*
-  br i1 undef, label %cond.true18.i153, label %cond.false21.i156
+  br i1 %c0, label %cond.true18.i153, label %cond.false21.i156
 
 cond.true18.i153:
   %shr2039.i152 = lshr i32 %temp_id.sroa.21.1, 1
diff --git a/llvm/test/CodeGen/PowerPC/ext-bool-trunc-repl.ll b/llvm/test/CodeGen/PowerPC/ext-bool-trunc-repl.ll
--- a/llvm/test/CodeGen/PowerPC/ext-bool-trunc-repl.ll
+++ b/llvm/test/CodeGen/PowerPC/ext-bool-trunc-repl.ll
@@ -6,19 +6,19 @@
 @d = external global [2 x i32], align 4
 
 ; Function Attrs: norecurse nounwind
-define void @fn2() #0 {
+define void @fn2(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 ; CHECK-LABEL: @fn2
 
-  br i1 undef, label %1, label %10
+  br i1 %c0, label %1, label %10
 
 ; <label>:1:                                      ; preds = %0
-  br i1 undef, label %3, label %2
+  br i1 %c1, label %3, label %2
 
 ; <label>:2:                                      ; preds = %2, %1
-  br i1 undef, label %3, label %2
+  br i1 %c2, label %3, label %2
 
 ; <label>:3:                                      ; preds = %2, %1
-  br i1 undef, label %8, label %4
+  br i1 %c3, label %8, label %4
 
 ; <label>:4:                                      ; preds = %4, %3
   %5 = phi i64 [ %6, %4 ], [ undef, %3 ]
diff --git a/llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll b/llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll
--- a/llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll
+++ b/llvm/test/CodeGen/PowerPC/extra-toc-reg-deps.ll
@@ -61,9 +61,9 @@
 @.str28 = external unnamed_addr constant [7 x i8], align 1
 @_ZN4Foam4PoutE = external global %"class.Foam::prefixOSstream.27", align 8
 
-define void @_ZN4Foam13checkTopologyERKNS_8polyMeshEbb(i1 zeroext %allTopology) #0 personality ptr @__gxx_personality_v0 {
+define void @_ZN4Foam13checkTopologyERKNS_8polyMeshEbb(i1 zeroext %allTopology, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14, i1 %c15, i1 %c16, i1 %c17, i1 %c18, i1 %c19, i1 %c20, i1 %c21, i1 %c22) #0 personality ptr @__gxx_personality_v0 {
 entry:
-  br i1 undef, label %for.body, label %for.cond.cleanup
+  br i1 %c0, label %for.body, label %for.cond.cleanup
 
 ; CHECK-LABEL: @_ZN4Foam13checkTopologyERKNS_8polyMeshEbb
 
@@ -82,10 +82,10 @@
 ; CHECK: ld 2, 40(1)
 
 for.cond.cleanup:                                 ; preds = %entry
-  br i1 undef, label %if.then.i, label %if.else.i
+  br i1 %c1, label %if.then.i, label %if.else.i
 
 if.then.i:                                        ; preds = %for.cond.cleanup
-  br i1 undef, label %if.then.i1435, label %if.else.i1436
+  br i1 %c2, label %if.then.i1435, label %if.else.i1436
 
 if.else.i:                                        ; preds = %for.cond.cleanup
   unreachable
@@ -97,7 +97,7 @@
   br label %_ZN4Foam12returnReduceIiNS_5sumOpIiEEEET_RKS3_RKT0_ii.exit
 
 _ZN4Foam12returnReduceIiNS_5sumOpIiEEEET_RKS3_RKT0_ii.exit: ; preds = %if.else.i1436, %if.then.i1435
-  br i1 undef, label %for.body.i, label %_ZNK4Foam8ZoneMeshINS_8cellZoneENS_8polyMeshEE15checkDefinitionEb.exit
+  br i1 %c3, label %for.body.i, label %_ZNK4Foam8ZoneMeshINS_8cellZoneENS_8polyMeshEE15checkDefinitionEb.exit
 
 for.body:                                         ; preds = %entry
   unreachable
@@ -106,13 +106,13 @@
   unreachable
 
 _ZNK4Foam8ZoneMeshINS_8cellZoneENS_8polyMeshEE15checkDefinitionEb.exit: ; preds = %_ZN4Foam12returnReduceIiNS_5sumOpIiEEEET_RKS3_RKT0_ii.exit
-  br i1 undef, label %for.body.i1480, label %_ZNK4Foam8ZoneMeshINS_8faceZoneENS_8polyMeshEE15checkDefinitionEb.exit
+  br i1 %c4, label %for.body.i1480, label %_ZNK4Foam8ZoneMeshINS_8faceZoneENS_8polyMeshEE15checkDefinitionEb.exit
 
 for.body.i1480:                                   ; preds = %_ZNK4Foam8ZoneMeshINS_8cellZoneENS_8polyMeshEE15checkDefinitionEb.exit
   unreachable
 
 _ZNK4Foam8ZoneMeshINS_8faceZoneENS_8polyMeshEE15checkDefinitionEb.exit: ; preds = %_ZNK4Foam8ZoneMeshINS_8cellZoneENS_8polyMeshEE15checkDefinitionEb.exit
-  br i1 undef, label %for.body.i1504, label %_ZNK4Foam8ZoneMeshINS_9pointZoneENS_8polyMeshEE15checkDefinitionEb.exit
+  br i1 %c5, label %for.body.i1504, label %_ZNK4Foam8ZoneMeshINS_9pointZoneENS_8polyMeshEE15checkDefinitionEb.exit
 
 for.body.i1504:                                   ; preds = %_ZNK4Foam8ZoneMeshINS_8faceZoneENS_8polyMeshEE15checkDefinitionEb.exit
   unreachable
@@ -131,7 +131,7 @@
           to label %invoke.cont59 unwind label %lpad
 
 invoke.cont59:                                    ; preds = %_ZN4Foam4wordC2EPKcb.exit
-  br i1 undef, label %_ZNSsD2Ev.exit, label %if.then.i.i, !prof !1
+  br i1 %c6, label %_ZNSsD2Ev.exit, label %if.then.i.i, !prof !1
 
 if.then.i.i:                                      ; preds = %invoke.cont59
   br i1 true, label %if.then.i.i.i1508, label %if.else.i.i.i
@@ -143,24 +143,24 @@
   br label %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i
 
 _ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i: ; preds = %if.else.i.i.i, %if.then.i.i.i1508
-  br i1 undef, label %if.then4.i.i, label %_ZNSsD2Ev.exit
+  br i1 %c7, label %if.then4.i.i, label %_ZNSsD2Ev.exit
 
 if.then4.i.i:                                     ; preds = %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i
   br label %_ZNSsD2Ev.exit
 
 _ZNSsD2Ev.exit:                                   ; preds = %if.then4.i.i, %_ZN9__gnu_cxxL27__exchange_and_add_dispatchEPii.exit.i.i, %invoke.cont59
-  br i1 undef, label %for.body70, label %for.cond.cleanup69
+  br i1 %c8, label %for.body70, label %for.cond.cleanup69
 
 for.cond.cleanup69:                               ; preds = %_ZNSsD2Ev.exit
-  br i1 undef, label %if.then121, label %if.else
+  br i1 %c9, label %if.then121, label %if.else
 
 lpad:                                             ; preds = %_ZN4Foam4wordC2EPKcb.exit
   %1 = landingpad { ptr, i32 }
           cleanup
-  br i1 undef, label %_ZNSsD2Ev.exit1578, label %if.then.i.i1570, !prof !1
+  br i1 %c10, label %_ZNSsD2Ev.exit1578, label %if.then.i.i1570, !prof !1
 
 if.then.i.i1570:                                  ; preds = %lpad
-  br i1 undef, label %if.then4.i.i1577, label %_ZNSsD2Ev.exit1578
+  br i1 %c11, label %if.then4.i.i1577, label %_ZNSsD2Ev.exit1578
 
 if.then4.i.i1577:                                 ; preds = %if.then.i.i1570
   unreachable
@@ -215,7 +215,7 @@
 lpad.i1765:                                       ; preds = %if.end213
   %5 = landingpad { ptr, i32 }
           cleanup
-  br i1 undef, label %eh.resume.i1776, label %if.then.i.i.i1767, !prof !1
+  br i1 %c12, label %eh.resume.i1776, label %if.then.i.i.i1767, !prof !1
 
 if.then.i.i.i1767:                                ; preds = %lpad.i1765
   unreachable
@@ -228,10 +228,10 @@
           to label %invoke.cont221 unwind label %lpad217
 
 invoke.cont221:                                   ; preds = %_ZN4Foam4wordC2EPKcb.exit1777
-  br i1 undef, label %_ZNSsD2Ev.exit1792, label %if.then.i.i1784, !prof !1
+  br i1 %c13, label %_ZNSsD2Ev.exit1792, label %if.then.i.i1784, !prof !1
 
 if.then.i.i1784:                                  ; preds = %invoke.cont221
-  br i1 undef, label %if.then4.i.i1791, label %_ZNSsD2Ev.exit1792
+  br i1 %c14, label %if.then4.i.i1791, label %_ZNSsD2Ev.exit1792
 
 if.then4.i.i1791:                                 ; preds = %if.then.i.i1784
   br label %_ZNSsD2Ev.exit1792
@@ -269,13 +269,13 @@
           to label %invoke.cont280 unwind label %lpad276
 
 invoke.cont280:                                   ; preds = %_ZN4Foam4wordC2EPKcb.exit1862
-  br i1 undef, label %_ZNSsD2Ev.exit1877, label %if.then.i.i1869, !prof !1
+  br i1 %c15, label %_ZNSsD2Ev.exit1877, label %if.then.i.i1869, !prof !1
 
 if.then.i.i1869:                                  ; preds = %invoke.cont280
   unreachable
 
 _ZNSsD2Ev.exit1877:                               ; preds = %invoke.cont280
-  br i1 undef, label %if.then292, label %if.end328
+  br i1 %c16, label %if.then292, label %if.end328
 
 if.then292:                                       ; preds = %_ZNSsD2Ev.exit1877
   unreachable
@@ -314,16 +314,16 @@
 lpad663:                                          ; preds = %invoke.cont670, %if.end660, %invoke.cont668, %invoke.cont674, %invoke.cont676
   %10 = landingpad { ptr, i32 }
           cleanup
-  br i1 undef, label %_ZN4Foam4ListIiED2Ev.exit.i3073, label %delete.notnull.i.i3071
+  br i1 %c17, label %_ZN4Foam4ListIiED2Ev.exit.i3073, label %delete.notnull.i.i3071
 
 if.end878:                                        ; preds = %invoke.cont676
-  br i1 undef, label %_ZN4Foam11regionSplitD2Ev.exit, label %delete.notnull.i.i3056
+  br i1 %c18, label %_ZN4Foam11regionSplitD2Ev.exit, label %delete.notnull.i.i3056
 
 delete.notnull.i.i3056:                           ; preds = %if.end878
   unreachable
 
 _ZN4Foam11regionSplitD2Ev.exit:                   ; preds = %if.end878
-  br i1 undef, label %if.then883, label %if.else888
+  br i1 %c19, label %if.then883, label %if.else888
 
 if.then883:                                       ; preds = %_ZN4Foam11regionSplitD2Ev.exit
   unreachable
@@ -349,10 +349,10 @@
           to label %invoke.cont902 unwind label %lpad898
 
 invoke.cont902:                                   ; preds = %_ZN4Foam4wordC2EPKcb.exit3098
-  br i1 undef, label %_ZNSsD2Ev.exit3113, label %if.then.i.i3105, !prof !1
+  br i1 %c20, label %_ZNSsD2Ev.exit3113, label %if.then.i.i3105, !prof !1
 
 if.then.i.i3105:                                  ; preds = %invoke.cont902
-  br i1 undef, label %if.then4.i.i3112, label %_ZNSsD2Ev.exit3113
+  br i1 %c21, label %if.then4.i.i3112, label %_ZNSsD2Ev.exit3113
 
 if.then4.i.i3112:                                 ; preds = %if.then.i.i3105
   unreachable
@@ -371,7 +371,7 @@
 lpad898:                                          ; preds = %_ZN4Foam4wordC2EPKcb.exit3098
   %12 = landingpad { ptr, i32 }
           cleanup
-  br i1 undef, label %_ZNSsD2Ev.exit3204, label %if.then.i.i3196, !prof !1
+  br i1 %c22, label %_ZNSsD2Ev.exit3204, label %if.then.i.i3196, !prof !1
 
 if.then.i.i3196:                                  ; preds = %lpad898
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-icmp-split.ll b/llvm/test/CodeGen/PowerPC/fast-isel-icmp-split.ll
--- a/llvm/test/CodeGen/PowerPC/fast-isel-icmp-split.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-icmp-split.ll
@@ -9,9 +9,9 @@
 %"class.boost::serialization::extended_type_info.129.150" = type { ptr, i32, ptr }
 
 ; Function Attrs: noinline
-define void @_ZN5boost13serialization18extended_type_info4findEPKc() #0 align 2 personality ptr @__gxx_personality_v0 {
+define void @_ZN5boost13serialization18extended_type_info4findEPKc(i1 %c0) #0 align 2 personality ptr @__gxx_personality_v0 {
 entry:
-  br i1 undef, label %cond.true, label %cond.false
+  br i1 %c0, label %cond.true, label %cond.false
 
 ; CHECK: @_ZN5boost13serialization18extended_type_info4findEPKc
 
diff --git a/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll b/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
--- a/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
+++ b/llvm/test/CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll
@@ -5,16 +5,16 @@
 target triple = "powerpc64le-unknown-linux-gnu"
 
 ; Function Attrs: nounwind uwtable
-define hidden void @_ZN11__sanitizer25MaybeStartBackgroudThreadEv() local_unnamed_addr #0 {
+define hidden void @_ZN11__sanitizer25MaybeStartBackgroudThreadEv(i1 %c0, i1 %c1) local_unnamed_addr #0 {
 entry:
-  br i1 undef, label %land.lhs.true, label %if.end
+  br i1 %c0, label %land.lhs.true, label %if.end
 
 ; CHECK: # %land.lhs.true
 ; Test updated due D63152 where any load/store prevents shrink-wrapping
 ; CHECK-NEXT: bc
 ; CHECK-NEXT: # %if.end4
 land.lhs.true:                                    ; preds = %entry
-  br i1 undef, label %return, label %if.end4
+  br i1 %c1, label %return, label %if.end4
 
 if.end:                                           ; preds = %entry
   br i1 icmp ne (ptr @_ZN11__sanitizer19real_pthread_createEPvS0_PFS0_S0_ES0_, ptr null), label %if.end4, label %return
diff --git a/llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll b/llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll
--- a/llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll
+++ b/llvm/test/CodeGen/PowerPC/isel-rc-nox0.ll
@@ -5,15 +5,15 @@
 @g_62 = external global [1 x [9 x i32]], align 4
 
 ; Function Attrs: nounwind
-define void @main() #0 {
+define void @main(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 entry:
-  br i1 undef, label %cond.true, label %for.cond1.preheader.i
+  br i1 %c0, label %cond.true, label %for.cond1.preheader.i
 
 cond.true:                                        ; preds = %entry
   br label %for.cond1.preheader.i
 
 for.cond1.preheader.i:                            ; preds = %for.cond1.preheader.i, %cond.true, %entry
-  br i1 undef, label %crc32_gentab.exit, label %for.cond1.preheader.i
+  br i1 %c1, label %crc32_gentab.exit, label %for.cond1.preheader.i
 
 crc32_gentab.exit:                                ; preds = %for.cond1.preheader.i
   %tobool.i19.i.i = icmp eq i32 undef, 0
@@ -30,10 +30,10 @@
   br i1 %tobool.i2967.i, label %safe_mod_func_int32_t_s_s.exit.i2974.i, label %for.inc44.i2977.i
 
 safe_mod_func_int32_t_s_s.exit.i2974.i:           ; preds = %for.body21.i2968.i
-  br i1 undef, label %for.body21.i2968.i, label %for.inc44.i2977.i
+  br i1 %c2, label %for.body21.i2968.i, label %for.inc44.i2977.i
 
 for.inc44.i2977.i:                                ; preds = %safe_mod_func_int32_t_s_s.exit.i2974.i, %for.body21.i2968.i
-  br i1 undef, label %func_80.exit2978.i, label %for.cond1.preheader.i2961.i
+  br i1 %c3, label %func_80.exit2978.i, label %for.cond1.preheader.i2961.i
 
 func_80.exit2978.i:                               ; preds = %for.inc44.i2977.i
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/lbzux.ll b/llvm/test/CodeGen/PowerPC/lbzux.ll
--- a/llvm/test/CodeGen/PowerPC/lbzux.ll
+++ b/llvm/test/CodeGen/PowerPC/lbzux.ll
@@ -2,16 +2,16 @@
 target triple = "powerpc64-unknown-linux-gnu"
 ; RUN: llc -verify-machineinstrs -disable-ppc-unaligned < %s | FileCheck %s
 
-define fastcc void @allocateSpace(i1 %cond1, i1 %cond2, i32 %offset) nounwind {
+define fastcc void @allocateSpace(i1 %cond1, i1 %cond2, i32 %offset, i1 %c0, i1 %c1, i1 %c2) nounwind {
 entry:
   %0 = load ptr, ptr undef, align 8
-  br i1 undef, label %return, label %lor.lhs.false
+  br i1 %c0, label %return, label %lor.lhs.false
 
 lor.lhs.false:                                    ; preds = %entry
-  br i1 undef, label %if.end7, label %return
+  br i1 %c1, label %if.end7, label %return
 
 if.end7:                                          ; preds = %lor.lhs.false
-  br i1 undef, label %if.then15, label %if.end71
+  br i1 %c2, label %if.then15, label %if.end71
 
 if.then15:                                        ; preds = %if.end7
   br label %while.cond
diff --git a/llvm/test/CodeGen/PowerPC/licm-remat.ll b/llvm/test/CodeGen/PowerPC/licm-remat.ll
--- a/llvm/test/CodeGen/PowerPC/licm-remat.ll
+++ b/llvm/test/CodeGen/PowerPC/licm-remat.ll
@@ -17,7 +17,7 @@
 ; Function Attrs: argmemonly nounwind
 declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #2
 
-define linkonce_odr void @ZN6snappyDecompressor_(ptr %this, ptr %writer) {
+define linkonce_odr void @ZN6snappyDecompressor_(ptr %this, ptr %writer, i1 %c0, i1 %c1, i1 %c2) {
 ; CHECK-LABEL: ZN6snappyDecompressor_:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK:       addis 3, 2, _ZN6snappy8internalL8wordmaskE@toc@ha
@@ -39,7 +39,7 @@
   %incdec.ptr = getelementptr inbounds i8, ptr %ip.0, i64 1
   %0 = load i8, ptr %ip.0, align 1
   %conv = zext i8 %0 to i32
-  br i1 undef, label %if.then7, label %if.else
+  br i1 %c0, label %if.then7, label %if.else
 
 if.then7:                                         ; preds = %for.cond
   %1 = lshr i32 %conv, 2
@@ -94,7 +94,7 @@
   br label %while.cond.preheader.i176
 
 while.cond.preheader.i176:                        ; preds = %while.end
-  br i1 undef, label %if.end49, label %while.body.lr.ph.i182
+  br i1 %c1, label %if.end49, label %while.body.lr.ph.i182
 
 while.body.lr.ph.i182:                            ; preds = %while.cond.preheader.i176
   %.pre.i181 = load i64, ptr %curr_iov_written_.i, align 8
@@ -105,7 +105,7 @@
   br label %cond.end.i190
 
 cond.end.i190:                                    ; preds = %while.body.lr.ph.i182
-  br i1 undef, label %if.end18.i207, label %if.then10.i193
+  br i1 %c2, label %if.end18.i207, label %if.then10.i193
 
 if.then10.i193:                                   ; preds = %cond.end.i190
   %add12.i191 = add i64 %11, 1
diff --git a/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll b/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll
--- a/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll
+++ b/llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll
@@ -5,9 +5,9 @@
 @_ZNSs4_Rep20_S_empty_rep_storageE = external global [0 x i64], align 8
 
 ; Function Attrs: nounwind
-define void @_ZN5clang7tooling15RefactoringTool10runAndSaveEPNS0_21FrontendActionFactoryE() #0 align 2 {
+define void @_ZN5clang7tooling15RefactoringTool10runAndSaveEPNS0_21FrontendActionFactoryE(i1 %c0) #0 align 2 {
 entry:
-  br i1 undef, label %_ZN4llvm18IntrusiveRefCntPtrIN5clang13DiagnosticIDsEEC2EPS2_.exit, label %return
+  br i1 %c0, label %_ZN4llvm18IntrusiveRefCntPtrIN5clang13DiagnosticIDsEEC2EPS2_.exit, label %return
 
 ; CHECK: @_ZN5clang7tooling15RefactoringTool10runAndSaveEPNS0_21FrontendActionFactoryE
 
diff --git a/llvm/test/CodeGen/PowerPC/misched.ll b/llvm/test/CodeGen/PowerPC/misched.ll
--- a/llvm/test/CodeGen/PowerPC/misched.ll
+++ b/llvm/test/CodeGen/PowerPC/misched.ll
@@ -4,38 +4,38 @@
 
 @b = external global [16000 x double], align 32
 
-define void @pr14302() nounwind {
+define void @pr14302(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) nounwind {
 entry:
   tail call void @putchar() nounwind
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
-  br i1 undef, label %for.body, label %for.body24.i
+  br i1 %c0, label %for.body, label %for.body24.i
 
 for.body24.i:                                     ; preds = %for.body24.i, %for.body
   store double 1.000000e+00, ptr undef, align 8
-  br i1 undef, label %for.body24.i58, label %for.body24.i
+  br i1 %c1, label %for.body24.i58, label %for.body24.i
 
 for.body24.i58:                                   ; preds = %for.body24.i58, %for.body24.i
   %arrayidx26.i55.1 = getelementptr inbounds [16000 x double], ptr @b, i64 0, i64 undef
   store double 1.000000e+00, ptr %arrayidx26.i55.1, align 8
-  br i1 undef, label %for.body24.i64, label %for.body24.i58
+  br i1 %c2, label %for.body24.i64, label %for.body24.i58
 
 for.body24.i64:                                   ; preds = %for.body24.i64, %for.body24.i58
   %exitcond.2489 = icmp eq i32 0, 16000
   br i1 %exitcond.2489, label %for.body24.i70, label %for.body24.i64
 
 for.body24.i70:                                   ; preds = %for.body24.i70, %for.body24.i64
-  br i1 undef, label %for.body24.i76, label %for.body24.i70
+  br i1 %c3, label %for.body24.i76, label %for.body24.i70
 
 for.body24.i76:                                   ; preds = %for.body24.i76, %for.body24.i70
-  br i1 undef, label %set1d.exit77, label %for.body24.i76
+  br i1 %c4, label %set1d.exit77, label %for.body24.i76
 
 set1d.exit77:                                     ; preds = %for.body24.i76
   br label %for.body29
 
 for.body29:                                       ; preds = %for.body29, %set1d.exit77
-  br i1 undef, label %for.end35, label %for.body29
+  br i1 %c5, label %for.end35, label %for.body29
 
 for.end35:                                        ; preds = %for.body29
   ret void
diff --git a/llvm/test/CodeGen/PowerPC/mma-phi-accs.ll b/llvm/test/CodeGen/PowerPC/mma-phi-accs.ll
--- a/llvm/test/CodeGen/PowerPC/mma-phi-accs.ll
+++ b/llvm/test/CodeGen/PowerPC/mma-phi-accs.ll
@@ -204,10 +204,9 @@
 }
 
 ; This test uses an unprimed accumulator PHI node with two operands: an
-; implicitely defined unprimed accumulator and the unprimed result of the call
 ; to xvf64gerpp. The compiler should replace this PHI node by a primed
 ; accumulator PHI node.
-define void @testImplicitDef(ptr %ptr) {
+define void @testImplicitDef(ptr %ptr, i1 %c0) {
 ; CHECK-LABEL: testImplicitDef:
 ; CHECK:       # %bb.0: # %label1
 ; CHECK-NEXT:    # implicit-def: $acc0
@@ -230,7 +229,7 @@
 ; CHECK-BE-NEXT:    stxv vs3, 0(r3)
 ; CHECK-BE-NEXT:    blr
 label1:
-  br i1 undef, label %label3, label %label2
+  br i1 %c0, label %label3, label %label2
 
 label2:
   %0 = call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> undef, <256 x i1> undef, <16 x i8> undef)
diff --git a/llvm/test/CodeGen/PowerPC/negctr.ll b/llvm/test/CodeGen/PowerPC/negctr.ll
--- a/llvm/test/CodeGen/PowerPC/negctr.ll
+++ b/llvm/test/CodeGen/PowerPC/negctr.ll
@@ -3,9 +3,9 @@
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @main() #0 {
+define void @main(i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
@@ -24,9 +24,9 @@
   ret void
 }
 
-define void @main1() #0 {
+define void @main1(i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
@@ -43,9 +43,9 @@
   ret void
 }
 
-define void @main2() #0 {
+define void @main2(i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
@@ -63,9 +63,9 @@
   ret void
 }
 
-define void @main3() #0 {
+define void @main3(i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 127984, %entry ]
diff --git a/llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll b/llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
--- a/llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
+++ b/llvm/test/CodeGen/PowerPC/no-dup-of-bdnz.ll
@@ -4,7 +4,7 @@
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
-define void @test(i64 %arg.ssa, i64 %arg.nb) local_unnamed_addr {
+define void @test(i64 %arg.ssa, i64 %arg.nb, i1 %c0, i1 %c1) local_unnamed_addr {
 ; Ensure that loop rotation doesn't duplicate the call to
 ; llvm.loop.decrement
 ; CHECK-LABEL: test
@@ -41,7 +41,7 @@
 BB_5:                                         ; preds = %BB_7, %BB_5
   %lsr.iv20.i116 = phi i64 [ %2, %BB_7 ], [ %lsr.iv.next21.i126, %BB_5 ]
   %lsr.iv.next21.i126 = add i64 %lsr.iv20.i116, 1
-  br i1 undef, label %BB_5, label %BB_6
+  br i1 %c0, label %BB_5, label %BB_6
 
 BB_6:                                         ; preds = %BB_5
   ret void
@@ -59,7 +59,7 @@
   br label %BB_11
 
 BB_11:                                         ; preds = %BB_11, %BB_10
-  br i1 undef, label %BB_11, label %BB_12
+  br i1 %c1, label %BB_11, label %BB_12
 
 BB_12:                                         ; preds = %BB_11
   call void @llvm.set.loop.iterations.i64(i64 %arg.nb)
diff --git a/llvm/test/CodeGen/PowerPC/optimize-andiso.ll b/llvm/test/CodeGen/PowerPC/optimize-andiso.ll
--- a/llvm/test/CodeGen/PowerPC/optimize-andiso.ll
+++ b/llvm/test/CodeGen/PowerPC/optimize-andiso.ll
@@ -3,7 +3,7 @@
 ; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
 ; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s
-define float @floatundisf(i64 %a) {
+define float @floatundisf(i64 %a, i1 %c0) {
 ; CHECK-LABEL: floatundisf:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xxlxor f1, f1, f1
@@ -21,7 +21,7 @@
 ; CHECK-NEXT:    xscvspdpn f1, vs0
 ; CHECK-NEXT:    blr
 entry:
-  br i1 undef, label %return, label %sw.epilog
+  br i1 %c0, label %return, label %sw.epilog
 
 sw.epilog:                                        ; preds = %entry
   %or14 = or i64 0, %a
diff --git a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
--- a/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
+++ b/llvm/test/CodeGen/PowerPC/p10-spill-crun.ll
@@ -33,7 +33,7 @@
 declare i32 @call_5(ptr) local_unnamed_addr
 declare i8 @call_6(ptr, i32) local_unnamed_addr
 
-define dso_local void @P10_Spill_CR_UN(ptr %arg, ptr %arg1, i32 %arg2) local_unnamed_addr {
+define dso_local void @P10_Spill_CR_UN(ptr %arg, ptr %arg1, i32 %arg2, i1 %c0) local_unnamed_addr {
 ; CHECK-LABEL: P10_Spill_CR_UN:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    mfcr r12
@@ -348,7 +348,7 @@
   br label %bb8
 
 bb8:                                              ; preds = %bb
-  br i1 undef, label %bb9, label %bb11
+  br i1 %c0, label %bb9, label %bb11
 
 bb9:                                              ; preds = %bb8
   %tmp10 = call signext i32 @call_3(ptr %arg, ptr %arg1)
diff --git a/llvm/test/CodeGen/PowerPC/post-ra-ec.ll b/llvm/test/CodeGen/PowerPC/post-ra-ec.ll
--- a/llvm/test/CodeGen/PowerPC/post-ra-ec.ll
+++ b/llvm/test/CodeGen/PowerPC/post-ra-ec.ll
@@ -10,10 +10,10 @@
 %struct.pid.5.17.125 = type { ptr }
 
 ; Function Attrs: nounwind
-define signext i32 @proc_task_getattr(ptr nocapture readonly %inode, ptr nocapture %stat) #0 {
+define signext i32 @proc_task_getattr(ptr nocapture readonly %inode, ptr nocapture %stat, i1 %c0) #0 {
 entry:
   %call1.i = tail call ptr @get_pid_task(ptr undef, i32 zeroext 0) #0
-  br i1 undef, label %if.end, label %if.then
+  br i1 %c0, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   %0 = load i64, ptr undef, align 8
diff --git a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
--- a/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll
@@ -598,9 +598,9 @@
 ;
 ; CHECK-LABEL: {{.*}}infiniteloop
 ; CHECK: blr
-define void @infiniteloop() {
+define void @infiniteloop(i1 %c0) {
 entry:
-  br i1 undef, label %if.then, label %if.end
+  br i1 %c0, label %if.then, label %if.end
 
 if.then:
   %ptr = alloca i32, i32 4
@@ -620,9 +620,9 @@
 ; Another infinite loop test this time with a body bigger than just one block.
 ; CHECK-LABEL: {{.*}}infiniteloop2
 ; CHECK: blr
-define void @infiniteloop2() {
+define void @infiniteloop2(i1 %c0, i1 %c1) {
 entry:
-  br i1 undef, label %if.then, label %if.end
+  br i1 %c0, label %if.then, label %if.end
 
 if.then:
   %ptr = alloca i32, i32 4
@@ -633,7 +633,7 @@
   %call = tail call i32 asm "mftb $0, 268", "=r,~{r14}"()
   %add = add nsw i32 %call, %sum.03
   store i32 %add, ptr %ptr
-  br i1 undef, label %body1, label %body2
+  br i1 %c1, label %body1, label %body2
 
 body1:
   tail call void asm sideeffect "nop", "~{r14}"()
@@ -650,12 +650,12 @@
 ; Another infinite loop test this time with two nested infinite loop.
 ; CHECK-LABEL: {{.*}}infiniteloop3
 ; CHECK: bclr
-define void @infiniteloop3() {
+define void @infiniteloop3(i1 %c0, i1 %c1) {
 entry:
-  br i1 undef, label %loop2a, label %body
+  br i1 %c0, label %loop2a, label %body
 
 body:                                             ; preds = %entry
-  br i1 undef, label %loop2a, label %end
+  br i1 %c1, label %loop2a, label %end
 
 loop1:                                            ; preds = %loop2a, %loop2b
   %var.phi = phi ptr [ %next.phi, %loop2b ], [ %var, %loop2a ]
diff --git a/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll b/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll
--- a/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll
@@ -4,9 +4,9 @@
 
 %struct.__va_list_tag.0.9.18.23.32.41.48.55.62.67.72.77.82.87.90.93.96.101.105 = type { i8, i8, i16, ptr, ptr }
 
-define fastcc void @test1(ptr %args) {
+define fastcc void @test1(ptr %args, i1 %c0) {
 entry:
-  br i1 undef, label %repeat, label %maxlen_reached
+  br i1 %c0, label %repeat, label %maxlen_reached
 
 repeat:                                           ; preds = %entry
   switch i32 undef, label %sw.bb323 [
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll b/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll
--- a/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll
@@ -9,7 +9,7 @@
 %0 = type <{ double }>
 %1 = type <{ double }>
 
-define void @acc_regalloc(ptr %arg, ptr %arg1, ptr %arg2) local_unnamed_addr {
+define void @acc_regalloc(ptr %arg, ptr %arg1, ptr %arg2, i1 %c0) local_unnamed_addr {
 ; CHECK-LABEL: acc_regalloc:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    lwz r3, 0(r3)
@@ -285,7 +285,7 @@
   %i92 = tail call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> %i88, <256 x i1> undef, <16 x i8> undef)
   %i93 = tail call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> %i89, <256 x i1> undef, <16 x i8> undef)
   %i94 = tail call <512 x i1> @llvm.ppc.mma.xvf64gerpp(<512 x i1> %i90, <256 x i1> undef, <16 x i8> undef)
-  br i1 undef, label %bb95, label %bb82
+  br i1 %c0, label %bb95, label %bb82
 
 bb95:                                             ; preds = %bb82
   %i96 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %i91)
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-xxsplti32dx-pattern-check.ll b/llvm/test/CodeGen/PowerPC/ppc64-xxsplti32dx-pattern-check.ll
--- a/llvm/test/CodeGen/PowerPC/ppc64-xxsplti32dx-pattern-check.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-xxsplti32dx-pattern-check.ll
@@ -12,14 +12,14 @@
 
 declare dso_local void @callee() local_unnamed_addr
 
-define dso_local void @test_xxsplti32dx() local_unnamed_addr {
+define dso_local void @test_xxsplti32dx(i1 %c0) local_unnamed_addr {
 entry:
   %i1 = load double, ptr undef, align 8
   br label %for.body124
 
 for.body124:
   %E0 = phi double [ 0.000000e+00, %entry ], [ %E1, %for.end1072 ]
-  br i1 undef, label %for.body919.preheader, label %for.end1072
+  br i1 %c0, label %for.body919.preheader, label %for.end1072
 
 for.body919.preheader:
   %i4 = load double, ptr null, align 8
diff --git a/llvm/test/CodeGen/PowerPC/pr16556.ll b/llvm/test/CodeGen/PowerPC/pr16556.ll
--- a/llvm/test/CodeGen/PowerPC/pr16556.ll
+++ b/llvm/test/CodeGen/PowerPC/pr16556.ll
@@ -7,9 +7,9 @@
 
 %core.time.TickDuration.37.125 = type { i64 }
 
-define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(ptr %.this_arg) {
+define weak_odr fastcc i64 @_D4core4time12TickDuration30__T2toVAyaa7_7365636f6e6473TlZ2toMxFNaNbNfZl(ptr %.this_arg, i1 %c0) {
 entry:
-  br i1 undef, label %noassert, label %assert
+  br i1 %c0, label %noassert, label %assert
 
 assert:                                           ; preds = %entry
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/pr17168.ll b/llvm/test/CodeGen/PowerPC/pr17168.ll
--- a/llvm/test/CodeGen/PowerPC/pr17168.ll
+++ b/llvm/test/CodeGen/PowerPC/pr17168.ll
@@ -10,15 +10,15 @@
 @grid_points = external global [3 x i32], align 4, !dbg !0
 
 ; Function Attrs: nounwind
-define fastcc void @compute_rhs() #0 !dbg !263 {
+define fastcc void @compute_rhs(i1 %c0, i1 %c1, i1 %c2) #0 !dbg !263 {
 entry:
-  br i1 undef, label %for.cond871.preheader.for.inc960_crit_edge, label %for.end1042, !dbg !281
+  br i1 %c0, label %for.cond871.preheader.for.inc960_crit_edge, label %for.end1042, !dbg !281
 
 for.cond871.preheader.for.inc960_crit_edge:       ; preds = %for.cond871.preheader.for.inc960_crit_edge, %entry
   br i1 false, label %for.cond871.preheader.for.inc960_crit_edge, label %for.cond964.preheader, !dbg !281
 
 for.cond964.preheader:                            ; preds = %for.cond871.preheader.for.inc960_crit_edge
-  br i1 undef, label %for.cond968.preheader, label %for.end1042, !dbg !283
+  br i1 %c1, label %for.cond968.preheader, label %for.end1042, !dbg !283
 
 for.cond968.preheader:                            ; preds = %for.cond968.preheader, %for.cond964.preheader
   br i1 false, label %for.cond968.preheader, label %for.end1042, !dbg !283
@@ -42,7 +42,7 @@
   br label %for.body1123, !dbg !298
 
 for.inc1658:                                      ; preds = %for.cond1116.preheader
-  br i1 undef, label %for.cond1116.preheader, label %for.cond1816.preheader.for.inc1898_crit_edge, !dbg !293
+  br i1 %c2, label %for.cond1116.preheader, label %for.cond1816.preheader.for.inc1898_crit_edge, !dbg !293
 
 for.cond1816.preheader.for.inc1898_crit_edge:     ; preds = %for.cond1816.preheader.for.inc1898_crit_edge, %for.inc1658, %for.end1042
   br label %for.cond1816.preheader.for.inc1898_crit_edge, !dbg !301
diff --git a/llvm/test/CodeGen/PowerPC/pr18663-2.ll b/llvm/test/CodeGen/PowerPC/pr18663-2.ll
--- a/llvm/test/CodeGen/PowerPC/pr18663-2.ll
+++ b/llvm/test/CodeGen/PowerPC/pr18663-2.ll
@@ -46,13 +46,13 @@
 ; Function Attrs: inlinehint
 declare void @_ZN4Foam8fileName12stripInvalidEv() #2 align 2
 
-define void @_ZN4Foam3CSVINS_6VectorIdEEE4readEv() #0 align 2 personality ptr @__gxx_personality_v0 {
+define void @_ZN4Foam3CSVINS_6VectorIdEEE4readEv(i1 %c0, i1 %c1, i1 %c2) #0 align 2 personality ptr @__gxx_personality_v0 {
 entry:
   invoke void @_ZN4Foam6string6expandEb()
           to label %invoke.cont unwind label %lpad
 
 invoke.cont:                                      ; preds = %entry
-  br i1 undef, label %if.then.i.i.i.i176, label %_ZN4Foam6stringC2ERKS0_.exit.i
+  br i1 %c0, label %if.then.i.i.i.i176, label %_ZN4Foam6stringC2ERKS0_.exit.i
 
 if.then.i.i.i.i176:                               ; preds = %invoke.cont
   invoke void @_ZNKSt3__121__basic_string_commonILb1EE20__throw_length_errorEv()
@@ -75,7 +75,7 @@
           to label %invoke.cont4 unwind label %lpad3
 
 invoke.cont4:                                     ; preds = %invoke.cont2
-  br i1 undef, label %for.body, label %if.then
+  br i1 %c1, label %for.body, label %if.then
 
 if.then:                                          ; preds = %invoke.cont4
   invoke void @_ZN4Foam7IOerrorclEPKcS2_iRKNS_8IOstreamE()
@@ -105,7 +105,7 @@
   br label %ehcleanup142
 
 if.end:                                           ; preds = %memptr.end.i
-  br i1 undef, label %for.body, label %vector.body
+  br i1 %c2, label %for.body, label %vector.body
 
 for.body:                                         ; preds = %if.end, %invoke.cont4
   invoke void @_ZNKSt3__18ios_base6getlocEv()
diff --git a/llvm/test/CodeGen/PowerPC/pr24546.ll b/llvm/test/CodeGen/PowerPC/pr24546.ll
--- a/llvm/test/CodeGen/PowerPC/pr24546.ll
+++ b/llvm/test/CodeGen/PowerPC/pr24546.ll
@@ -6,13 +6,13 @@
 @php_intpow10.powers = external unnamed_addr constant [23 x double], align 8, !dbg !24
 
 ; Function Attrs: nounwind
-define double @_php_math_round(double %value, i32 signext %places, i32 signext %mode) #0 !dbg !6 {
+define double @_php_math_round(double %value, i32 signext %places, i32 signext %mode, i1 %c0, i1 %c1) #0 !dbg !6 {
 entry:
-  br i1 undef, label %if.then, label %if.else, !dbg !32
+  br i1 %c0, label %if.then, label %if.else, !dbg !32
 
 if.then:                                          ; preds = %entry
   %conv = sitofp i32 undef to double, !dbg !34
-  br i1 undef, label %if.then.i, label %if.end.i, !dbg !36
+  br i1 %c1, label %if.then.i, label %if.end.i, !dbg !36
 
 if.then.i:                                        ; preds = %if.then
   %call.i = tail call double @pow(double 1.000000e+01, double undef) #3, !dbg !39
diff --git a/llvm/test/CodeGen/PowerPC/pr24636.ll b/llvm/test/CodeGen/PowerPC/pr24636.ll
--- a/llvm/test/CodeGen/PowerPC/pr24636.ll
+++ b/llvm/test/CodeGen/PowerPC/pr24636.ll
@@ -6,8 +6,8 @@
 @b = external global [1 x i32], align 4
 
 ; Function Attrs: nounwind
-define void @fn2() #0 align 4 {
-  br i1 undef, label %.lr.ph, label %4
+define void @fn2(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 align 4 {
+  br i1 %c0, label %.lr.ph, label %4
 
 ; We used to crash because a bad DAGCombine was creating i32-typed SETCC nodes,
 ; even when crbits are enabled.
@@ -15,13 +15,13 @@
 ; CHECK: blr
 
 .lr.ph:                                           ; preds = %0
-  br i1 undef, label %.lr.ph.split, label %.preheader
+  br i1 %c1, label %.lr.ph.split, label %.preheader
 
 .preheader:                                       ; preds = %.preheader, %.lr.ph
-  br i1 undef, label %.lr.ph.split, label %.preheader
+  br i1 %c2, label %.lr.ph.split, label %.preheader
 
 .lr.ph.split:                                     ; preds = %.preheader, %.lr.ph
-  br i1 undef, label %._crit_edge, label %.lr.ph.split.split
+  br i1 %c3, label %._crit_edge, label %.lr.ph.split.split
 
 .lr.ph.split.split:                               ; preds = %.lr.ph.split.split, %.lr.ph.split
   %1 = phi i32 [ %2, %.lr.ph.split.split ], [ undef, %.lr.ph.split ]
diff --git a/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll b/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
--- a/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
+++ b/llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
@@ -11,21 +11,21 @@
 @.BSS38 = external global %struct.BSS38.51.4488.9911.14348.16813.20264.24701.28152.31603.35054.39491.44914.45407.46393.46886.47872.49351.49844.50830.51323.52309.53295.53788.54281.55267.55760.59211.61625, align 32
 @_main1_2_ = external global %struct_main1_2_.491.4928.10351.14788.17253.20704.25141.28592.32043.35494.39931.45354.45847.46833.47326.48312.49791.50284.51270.51763.52749.53735.54228.54721.55707.56200.59651.61626, section ".comm", align 16
 
-define void @aercalc_() {
+define void @aercalc_(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) {
 L.entry:
-  br i1 undef, label %L.LB38_2426, label %L.LB38_2911
+  br i1 %c0, label %L.LB38_2426, label %L.LB38_2911
 
 L.LB38_2911:
-  br i1 undef, label %L.LB38_2140, label %L.LB38_2640
+  br i1 %c1, label %L.LB38_2140, label %L.LB38_2640
 
 L.LB38_2640:
   unreachable
 
 L.LB38_2426:
-  br i1 undef, label %L.LB38_2438, label %L.LB38_2920
+  br i1 %c2, label %L.LB38_2438, label %L.LB38_2920
 
 L.LB38_2920:
-  br i1 undef, label %L.LB38_2438, label %L.LB38_2921
+  br i1 %c3, label %L.LB38_2438, label %L.LB38_2921
 
 L.LB38_2921:
   br label %L.LB38_2140
@@ -34,16 +34,16 @@
   ret void
 
 L.LB38_2438:
-  br i1 undef, label %L.LB38_2451, label %L.LB38_2935
+  br i1 %c4, label %L.LB38_2451, label %L.LB38_2935
 
 L.LB38_2935:
-  br i1 undef, label %L.LB38_2451, label %L.LB38_2936
+  br i1 %c5, label %L.LB38_2451, label %L.LB38_2936
 
 L.LB38_2936:
   unreachable
 
 L.LB38_2451:
-  br i1 undef, label %L.LB38_2452, label %L.LB38_2937
+  br i1 %c6, label %L.LB38_2452, label %L.LB38_2937
 
 L.LB38_2937:
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/pr25157.ll b/llvm/test/CodeGen/PowerPC/pr25157.ll
--- a/llvm/test/CodeGen/PowerPC/pr25157.ll
+++ b/llvm/test/CodeGen/PowerPC/pr25157.ll
@@ -11,21 +11,21 @@
 @.BSS38 = external global %struct.BSS38.51.4488.9911.14348.16813.20264.24701.28152.31603.35054.39491.44914.45407.46393.46886.47872.49351.49844.50830.51323.52309.53295.53788.54281.55267.55760.59211.61625, align 32
 @_main1_2_ = external global %struct_main1_2_.491.4928.10351.14788.17253.20704.25141.28592.32043.35494.39931.45354.45847.46833.47326.48312.49791.50284.51270.51763.52749.53735.54228.54721.55707.56200.59651.61626, section ".comm", align 16
 
-define void @aercalc_() {
+define void @aercalc_(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) {
 L.entry:
-  br i1 undef, label %L.LB38_2426, label %L.LB38_2911
+  br i1 %c0, label %L.LB38_2426, label %L.LB38_2911
 
 L.LB38_2911:
-  br i1 undef, label %L.LB38_2140, label %L.LB38_2640
+  br i1 %c1, label %L.LB38_2140, label %L.LB38_2640
 
 L.LB38_2640:
   unreachable
 
 L.LB38_2426:
-  br i1 undef, label %L.LB38_2438, label %L.LB38_2920
+  br i1 %c2, label %L.LB38_2438, label %L.LB38_2920
 
 L.LB38_2920:
-  br i1 undef, label %L.LB38_2438, label %L.LB38_2921
+  br i1 %c3, label %L.LB38_2438, label %L.LB38_2921
 
 L.LB38_2921:
   br label %L.LB38_2140
@@ -34,16 +34,16 @@
   ret void
 
 L.LB38_2438:
-  br i1 undef, label %L.LB38_2451, label %L.LB38_2935
+  br i1 %c4, label %L.LB38_2451, label %L.LB38_2935
 
 L.LB38_2935:
-  br i1 undef, label %L.LB38_2451, label %L.LB38_2936
+  br i1 %c5, label %L.LB38_2451, label %L.LB38_2936
 
 L.LB38_2936:
   unreachable
 
 L.LB38_2451:
-  br i1 undef, label %L.LB38_2452, label %L.LB38_2937
+  br i1 %c6, label %L.LB38_2452, label %L.LB38_2937
 
 L.LB38_2937:
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/pr43527.ll b/llvm/test/CodeGen/PowerPC/pr43527.ll
--- a/llvm/test/CodeGen/PowerPC/pr43527.ll
+++ b/llvm/test/CodeGen/PowerPC/pr43527.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
 ; RUN:   -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
 ; We don't want to produce a CTR loop due to the call to lrint in the body.
-define dso_local void @test(i64 %arg, i64 %arg1) {
+define dso_local void @test(i64 %arg, i64 %arg1, i1 %c0, i1 %c1) {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    bc 4, 4*cr5+lt, .LBB0_5
@@ -40,14 +40,14 @@
 ; CHECK-NEXT:  .LBB0_5: # %bb2
 ; CHECK-NEXT:  .LBB0_6: # %bb14
 bb:
-  br i1 undef, label %bb3, label %bb2
+  br i1 %c0, label %bb3, label %bb2
 
 bb2:                                              ; preds = %bb
   unreachable
 
 bb3:                                              ; preds = %bb
   %tmp = sub i64 %arg1, %arg
-  br i1 undef, label %bb4, label %bb14
+  br i1 %c1, label %bb4, label %bb14
 
 bb4:                                              ; preds = %bb3
   br label %bb5
diff --git a/llvm/test/CodeGen/PowerPC/pr45709.ll b/llvm/test/CodeGen/PowerPC/pr45709.ll
--- a/llvm/test/CodeGen/PowerPC/pr45709.ll
+++ b/llvm/test/CodeGen/PowerPC/pr45709.ll
@@ -7,7 +7,7 @@
 ; On PPC, we had SELECT_CC legalized using Promote for all vector types
 ; (including the type that they are all promoted to - which caused an infinite
 ; loop in legalization). This test just ensures that we terminate on such input.
-define dso_local void @_ZN1a1bEv(<4 x float> %in) local_unnamed_addr #0 align 2 {
+define dso_local void @_ZN1a1bEv(<4 x float> %in, i1 %c0, i1 %c1) local_unnamed_addr #0 align 2 {
 ; CHECK-LABEL: _ZN1a1bEv:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    bc 12, 4*cr5+lt, .LBB0_6
@@ -43,10 +43,10 @@
 ; CHECK-NEXT:    lfs f0, -16(r1)
 ; CHECK-NEXT:  .LBB0_6:
 ; CHECK-NEXT:    blr
-  br i1 undef, label %7, label %1
+  br i1 %c0, label %7, label %1
 
 1:                                                ; preds = %1, %0
-  br i1 undef, label %2, label %1
+  br i1 %c1, label %2, label %1
 
 2:                                                ; preds = %1
   %3 = shufflevector <4 x float> %in, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
diff --git a/llvm/test/CodeGen/PowerPC/pr46923.ll b/llvm/test/CodeGen/PowerPC/pr46923.ll
--- a/llvm/test/CodeGen/PowerPC/pr46923.ll
+++ b/llvm/test/CodeGen/PowerPC/pr46923.ll
@@ -4,7 +4,7 @@
 
 @bar = external constant i64, align 8
 
-define i1 @foo() {
+define i1 @foo(i1 %c0) {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    li r3, 0
@@ -13,7 +13,7 @@
   br label %next
 
 next:
-  br i1 undef, label %true, label %false
+  br i1 %c0, label %true, label %false
 
 true:
   br label %end
diff --git a/llvm/test/CodeGen/PowerPC/pr48519.ll b/llvm/test/CodeGen/PowerPC/pr48519.ll
--- a/llvm/test/CodeGen/PowerPC/pr48519.ll
+++ b/llvm/test/CodeGen/PowerPC/pr48519.ll
@@ -143,7 +143,7 @@
   ret void
 }
 
-define void @func_48786() #0 {
+define void @func_48786(i1 %c0) #0 {
 ; CHECK-LABEL: func_48786:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    mfocrf r12, 32
@@ -221,7 +221,7 @@
 
 bb2:                                              ; preds = %bb12, %bb
   %i3 = phi i64 [ undef, %bb ], [ %i13, %bb12 ]
-  br i1 undef, label %bb10, label %bb4
+  br i1 %c0, label %bb10, label %bb4
 
 bb4:                                              ; preds = %bb2
   switch i32 undef, label %bb9 [
diff --git a/llvm/test/CodeGen/PowerPC/pr49509.ll b/llvm/test/CodeGen/PowerPC/pr49509.ll
--- a/llvm/test/CodeGen/PowerPC/pr49509.ll
+++ b/llvm/test/CodeGen/PowerPC/pr49509.ll
@@ -3,7 +3,7 @@
 
 target datalayout = "E-m:e-p:32:32-i64:64-n32"
 
-define void @test() {
+define void @test(i1 %c0, i1 %c1) {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    bc 12, 20, .LBB0_2
@@ -52,7 +52,7 @@
 ; CHECK-NEXT:    stw 3, 0(3)
 ; CHECK-NEXT:    blr
 bb:
-  br i1 undef, label %bb2, label %bb1
+  br i1 %c0, label %bb2, label %bb1
 
 bb2:                                              ; preds = %bb
   %i = select i1 undef, i64 0, i64 72057594037927936
@@ -63,7 +63,7 @@
   %i50 = load i8, ptr undef, align 8
   %i52 = load i128, ptr null, align 8
   %i62 = icmp eq i8 %i50, 0
-  br i1 undef, label %bb66, label %bb64
+  br i1 %c1, label %bb66, label %bb64
 
 bb64:                                             ; preds = %bb63
   ret void
diff --git a/llvm/test/CodeGen/PowerPC/preinc-ld-sel-crash.ll b/llvm/test/CodeGen/PowerPC/preinc-ld-sel-crash.ll
--- a/llvm/test/CodeGen/PowerPC/preinc-ld-sel-crash.ll
+++ b/llvm/test/CodeGen/PowerPC/preinc-ld-sel-crash.ll
@@ -8,7 +8,7 @@
 
 @_ZN4Foam10SLListBase13endConstIter_E = external global %t1
 
-define void @_ZN4FoamrsIbEERNS_7IstreamES2_RNS_4ListIT_EE() #0 {
+define void @_ZN4FoamrsIbEERNS_7IstreamES2_RNS_4ListIT_EE(i1 %c0, i1 %c1, i1 %c2) #0 {
 entry:
   switch i32 undef, label %if.else82 [
     i32 9, label %if.then
@@ -23,13 +23,13 @@
   unreachable
 
 invoke.cont61:                                    ; preds = %entry
-  br i1 undef, label %if.end75, label %if.then64
+  br i1 %c0, label %if.end75, label %if.then64
 
 if.then64:                                        ; preds = %invoke.cont61
   unreachable
 
 if.end75:                                         ; preds = %invoke.cont61
-  br i1 undef, label %if.then17.i, label %if.then.i181
+  br i1 %c1, label %if.then17.i, label %if.then.i181
 
 if.then.i181:                                     ; preds = %if.end75
   unreachable
@@ -50,7 +50,7 @@
   br label %for.body.i
 
 for.body.i:                                       ; preds = %for.body.i, %for.body.lr.ph.i
-  br i1 undef, label %invoke.cont79, label %for.body.i
+  br i1 %c2, label %invoke.cont79, label %for.body.i
 
 invoke.cont79:                                    ; preds = %for.body.i, %if.then17.i
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/preincprep-nontrans-crash.ll b/llvm/test/CodeGen/PowerPC/preincprep-nontrans-crash.ll
--- a/llvm/test/CodeGen/PowerPC/preincprep-nontrans-crash.ll
+++ b/llvm/test/CodeGen/PowerPC/preincprep-nontrans-crash.ll
@@ -7,7 +7,7 @@
 @.BSS1 = external unnamed_addr global %struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144, align 32
 
 ; Function Attrs: noinline nounwind
-define void @ety2_() #0 {
+define void @ety2_(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #0 {
 
 ; This test case used to crash because the preinc prep pass would assume that
 ; if X-Y could be simplified to a constant, than so could Y-X. While not
@@ -23,7 +23,7 @@
 
 L.LB1_425:                                        ; preds = %L.LB1_427, %L.entry
   %4 = phi i64 [ %21, %L.LB1_427 ], [ undef, %L.entry ]
-  br i1 undef, label %L.LB1_427, label %L.LB1_816
+  br i1 %c0, label %L.LB1_427, label %L.LB1_816
 
 L.LB1_816:                                        ; preds = %L.LB1_425
   switch i32 undef, label %L.LB1_432 [
@@ -38,7 +38,7 @@
 L.LB1_432:                                        ; preds = %L.LB1_816
   %.in.31 = lshr i64 %4, 32
   %5 = trunc i64 %.in.31 to i32
-  br i1 undef, label %L.LB1_769, label %L.LB1_455
+  br i1 %c1, label %L.LB1_769, label %L.LB1_455
 
 L.LB1_455:                                        ; preds = %L.LB1_432
   unreachable
@@ -55,11 +55,11 @@
   %14 = add i64 %7, %13
   %15 = shl i64 %14, 3
   %16 = getelementptr i8, i8* undef, i64 %15
-  br i1 undef, label %L.LB1_662, label %L.LB1_662.prol
+  br i1 %c2, label %L.LB1_662, label %L.LB1_662.prol
 
 L.LB1_662.prol:                                   ; preds = %L.LB1_662.prol, %L.LB1_769
   %indvars.iv.next20.prol = add nuw nsw i64 undef, 1
-  br i1 undef, label %L.LB1_662, label %L.LB1_662.prol
+  br i1 %c3, label %L.LB1_662, label %L.LB1_662.prol
 
 L.LB1_662:                                        ; preds = %L.LB1_437.2, %L.LB1_662.prol, %L.LB1_769
   %indvars.iv19 = phi i64 [ %indvars.iv.next20.3, %L.LB1_437.2 ], [ 0, %L.LB1_769 ], [ %indvars.iv.next20.prol, %L.LB1_662.prol ]
@@ -70,7 +70,7 @@
   store double 0.000000e+00, double* %19, align 8
   %indvars.iv.next20.1 = add nsw i64 %indvars.iv19, 2
   %20 = mul i64 %indvars.iv.next20.1, %3
-  br i1 undef, label %L.LB1_437.2, label %L.LB1_824.2
+  br i1 %c4, label %L.LB1_437.2, label %L.LB1_824.2
 
 L.LB1_427:                                        ; preds = %L.LB1_425
   %21 = load i64, i64* bitcast (i8* getelementptr inbounds (%struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144, %struct.BSS1.0.9.28.39.43.46.47.54.56.57.64.65.69.71.144* @.BSS1, i64 0, i32 0, i64 8) to i64*), align 8
diff --git a/llvm/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll b/llvm/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
--- a/llvm/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
+++ b/llvm/test/CodeGen/PowerPC/redundant-copy-after-tail-dup.ll
@@ -14,7 +14,7 @@
 %"struct.A" = type { %"struct.B" }
 %"struct.B" = type { ptr, ptr, ptr }
 
-define dso_local i1 @t(ptr %this, i32 %color, i32 %vertex) local_unnamed_addr {
+define dso_local i1 @t(ptr %this, i32 %color, i32 %vertex, i1 %c0, i1 %c1) local_unnamed_addr {
 ; CHECK-P9-LABEL: t:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    li r5, 1
@@ -36,10 +36,10 @@
 ; CHECK-P9-NEXT:    blr
 ; CHECK-P9-NEXT:  .LBB0_6: # %lor.lhs.false.1
 entry:
-  br i1 undef, label %land.lhs.true, label %lor.lhs.false
+  br i1 %c0, label %land.lhs.true, label %lor.lhs.false
 
 land.lhs.true:                                    ; preds = %entry
-  br i1 undef, label %cleanup16, label %for.inc
+  br i1 %c1, label %cleanup16, label %for.inc
 
 lor.lhs.false:                                    ; preds = %entry
   %cmp11 = icmp ne i16 0, 2
diff --git a/llvm/test/CodeGen/PowerPC/remap-crash.ll b/llvm/test/CodeGen/PowerPC/remap-crash.ll
--- a/llvm/test/CodeGen/PowerPC/remap-crash.ll
+++ b/llvm/test/CodeGen/PowerPC/remap-crash.ll
@@ -1,51 +1,51 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD13() {
+define void @autogen_SD13(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7) {
 BB:
   br label %CF78
 
 CF78:                                             ; preds = %CF87, %CF86, %CF78, %BB
   %Cmp = icmp ule <16 x i64> zeroinitializer, zeroinitializer
-  br i1 undef, label %CF78, label %CF86
+  br i1 %c0, label %CF78, label %CF86
 
 CF86:                                             ; preds = %CF78
-  br i1 undef, label %CF78, label %CF84
+  br i1 %c1, label %CF78, label %CF84
 
 CF84:                                             ; preds = %CF84, %CF86
-  br i1 undef, label %CF84, label %CF87
+  br i1 %c2, label %CF84, label %CF87
 
 CF87:                                             ; preds = %CF84
-  br i1 undef, label %CF78, label %CF82
+  br i1 %c3, label %CF78, label %CF82
 
 CF82:                                             ; preds = %CF82, %CF87
-  br i1 undef, label %CF82, label %CF83
+  br i1 %c4, label %CF82, label %CF83
 
 CF83:                                             ; preds = %CF82
   br label %CF
 
 CF:                                               ; preds = %CF80, %CF81, %CF, %CF83
-  br i1 undef, label %CF, label %CF81
+  br i1 %c5, label %CF, label %CF81
 
 CF81:                                             ; preds = %CF
   %Se = sext <16 x i1> %Cmp to <16 x i16>
-  br i1 undef, label %CF, label %CF80
+  br i1 %c6, label %CF, label %CF80
 
 CF80:                                             ; preds = %CF81
-  br i1 undef, label %CF, label %CF76
+  br i1 %c7, label %CF, label %CF76
 
 CF76:                                             ; preds = %CF76, %CF80
   %Sl58 = select i1 undef, <16 x i16> %Se, <16 x i16> %Se
   br label %CF76
 }
 
-define void @autogen_SD1067() {
+define void @autogen_SD1067(i1 %c0) {
 BB:
   %FC = sitofp <4 x i32> zeroinitializer to <4 x ppc_fp128>
   br label %CF77
 
 CF77:                                             ; preds = %CF77, %BB
-  %brmerge = or i1 false, undef
+  %brmerge = or i1 false, %c0
   br i1 %brmerge, label %CF77, label %CF85
 
 CF85:                                             ; preds = %CF77
diff --git a/llvm/test/CodeGen/PowerPC/rlwimi-and.ll b/llvm/test/CodeGen/PowerPC/rlwimi-and.ll
--- a/llvm/test/CodeGen/PowerPC/rlwimi-and.ll
+++ b/llvm/test/CodeGen/PowerPC/rlwimi-and.ll
@@ -1,14 +1,14 @@
 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-crbits -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
 
-define void @test() align 2 {
+define void @test(i1 %c0, i1 %c1, i1 %c2) align 2 {
 entry:
-  br i1 undef, label %codeRepl1, label %codeRepl31
+  br i1 %c0, label %codeRepl1, label %codeRepl31
 
 codeRepl1:                                        ; preds = %entry
-  br i1 undef, label %codeRepl4, label %codeRepl29
+  br i1 %c1, label %codeRepl4, label %codeRepl29
 
 codeRepl4:                                        ; preds = %codeRepl1
-  br i1 undef, label %codeRepl12, label %codeRepl17
+  br i1 %c2, label %codeRepl12, label %codeRepl17
 
 codeRepl12:                                       ; preds = %codeRepl4
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/rs-undef-use.ll b/llvm/test/CodeGen/PowerPC/rs-undef-use.ll
--- a/llvm/test/CodeGen/PowerPC/rs-undef-use.ll
+++ b/llvm/test/CodeGen/PowerPC/rs-undef-use.ll
@@ -1,14 +1,14 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD156869(ptr, ptr) {
+define void @autogen_SD156869(ptr, ptr, i1 %c0, i1 %c1, i1 %c2) {
 BB:
   %A3 = alloca <2 x i1>
   %A2 = alloca <8 x i32>
   br label %CF
 
 CF:                                               ; preds = %CF85, %CF, %BB
-  br i1 undef, label %CF, label %CF82.critedge
+  br i1 %c0, label %CF, label %CF82.critedge
 
 CF82.critedge:                                    ; preds = %CF
   store i8 -59, ptr %0
@@ -17,7 +17,7 @@
 CF82:                                             ; preds = %CF82, %CF82.critedge
   %L17 = load i8, ptr %0
   %E18 = extractelement <2 x i64> undef, i32 0
-  br i1 undef, label %CF82, label %CF84.critedge
+  br i1 %c1, label %CF82, label %CF84.critedge
 
 CF84.critedge:                                    ; preds = %CF82
   store i64 455385, ptr %A3
@@ -37,7 +37,7 @@
   br i1 %Cmp61, label %CF, label %CF77
 
 CF77:                                             ; preds = %CF77, %CF85
-  br i1 undef, label %CF77, label %CF81
+  br i1 %c2, label %CF77, label %CF81
 
 CF81:                                             ; preds = %CF77
   store i8 %L17, ptr %1
diff --git a/llvm/test/CodeGen/PowerPC/sdag-ppcf128.ll b/llvm/test/CodeGen/PowerPC/sdag-ppcf128.ll
--- a/llvm/test/CodeGen/PowerPC/sdag-ppcf128.ll
+++ b/llvm/test/CodeGen/PowerPC/sdag-ppcf128.ll
@@ -2,9 +2,9 @@
 ;
 ; PR14751: Unsupported type in SelectionDAG::getConstantFP()
 
-define fastcc void @_D3std4math4sqrtFNaNbNfcZc() {
+define fastcc void @_D3std4math4sqrtFNaNbNfcZc(i1 %c0) {
 entry:
-  br i1 undef, label %if, label %else
+  br i1 %c0, label %if, label %else
 ; CHECK: cmplwi 3, 0
 if:                                               ; preds = %entry
   store { ppc_fp128, ppc_fp128 } zeroinitializer, ptr undef
diff --git a/llvm/test/CodeGen/PowerPC/set0-v8i16.ll b/llvm/test/CodeGen/PowerPC/set0-v8i16.ll
--- a/llvm/test/CodeGen/PowerPC/set0-v8i16.ll
+++ b/llvm/test/CodeGen/PowerPC/set0-v8i16.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD367951() {
+define void @autogen_SD367951(i1 %c0) {
 BB:
   %Shuff = shufflevector <16 x i16> zeroinitializer, <16 x i16> zeroinitializer, <16 x i32> <i32 26, i32 28, i32 30, i32 undef, i32 2, i32 4, i32 undef, i32 undef, i32 10, i32 undef, i32 14, i32 16, i32 undef, i32 20, i32 undef, i32 24>
   %Shuff7 = shufflevector <16 x i16> zeroinitializer, <16 x i16> %Shuff, <16 x i32> <i32 20, i32 undef, i32 24, i32 26, i32 28, i32 undef, i32 0, i32 undef, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18>
@@ -10,7 +10,7 @@
   br label %CF76
 
 CF76:                                             ; preds = %CF80, %CF76, %BB
-  br i1 undef, label %CF76, label %CF80
+  br i1 %c0, label %CF76, label %CF80
 
 CF80:                                             ; preds = %CF76
   %Sl37 = select i1 %E27, <16 x i16> undef, <16 x i16> %Shuff
diff --git a/llvm/test/CodeGen/PowerPC/sink-side-effect.ll b/llvm/test/CodeGen/PowerPC/sink-side-effect.ll
--- a/llvm/test/CodeGen/PowerPC/sink-side-effect.ll
+++ b/llvm/test/CodeGen/PowerPC/sink-side-effect.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=powerpc64le -mcpu=pwr9 -verify-machineinstrs < %s | FileCheck %s
 
-define double @zot(ptr %arg, ptr %arg1, ptr %arg2) {
+define double @zot(ptr %arg, ptr %arg1, ptr %arg2, i1 %c0) {
 ; CHECK-LABEL: zot:
 ; CHECK:       # %bb.0: # %bb
 ; CHECK-NEXT:    bc 12, 20, .LBB0_2
@@ -27,7 +27,7 @@
 ; CHECK-NEXT:    b .LBB0_3
 bb:
   %tmp = load i32, ptr %arg, align 8
-  br i1 undef, label %bb9, label %bb3
+  br i1 %c0, label %bb9, label %bb3
 
 bb3:
   %tmp4 = load i16, ptr %arg2, align 4
diff --git a/llvm/test/CodeGen/PowerPC/sj-ctr-loop.ll b/llvm/test/CodeGen/PowerPC/sj-ctr-loop.ll
--- a/llvm/test/CodeGen/PowerPC/sj-ctr-loop.ll
+++ b/llvm/test/CodeGen/PowerPC/sj-ctr-loop.ll
@@ -11,12 +11,12 @@
 ; CHECK-NOT: mtctr
 
 ; Function Attrs: nounwind
-define void @main() #0 {
+define void @main(i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %return, label %if.end
+  br i1 %c0, label %return, label %if.end
 
 if.end:                                           ; preds = %entry
-  br i1 undef, label %for.body.lr.ph, label %for.end.thread
+  br i1 %c1, label %for.body.lr.ph, label %for.end.thread
 
 for.end.thread:                                   ; preds = %if.end
   br label %return
diff --git a/llvm/test/CodeGen/PowerPC/sms-iterator.ll b/llvm/test/CodeGen/PowerPC/sms-iterator.ll
--- a/llvm/test/CodeGen/PowerPC/sms-iterator.ll
+++ b/llvm/test/CodeGen/PowerPC/sms-iterator.ll
@@ -7,14 +7,14 @@
 
 ; CHECK: MII = 3 MAX_II = 13 (rec=3, res=2)
 
-define dso_local fastcc double @_ZN3povL9polysolveEiPdS0_() unnamed_addr #0 {
+define dso_local fastcc double @_ZN3povL9polysolveEiPdS0_(i1 %c0, i1 %c1) unnamed_addr #0 {
   br label %1
 
 1:                                                ; preds = %1, %0
-  br i1 undef, label %2, label %1
+  br i1 %c0, label %2, label %1
 
 2:                                                ; preds = %1
-  br i1 undef, label %14, label %3
+  br i1 %c1, label %14, label %3
 
 3:                                                ; preds = %3, %2
   %4 = phi i64 [ %7, %3 ], [ undef, %2 ]
diff --git a/llvm/test/CodeGen/PowerPC/spill-nor0.ll b/llvm/test/CodeGen/PowerPC/spill-nor0.ll
--- a/llvm/test/CodeGen/PowerPC/spill-nor0.ll
+++ b/llvm/test/CodeGen/PowerPC/spill-nor0.ll
@@ -3,16 +3,16 @@
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @_ZN4llvm3sys17RunningOnValgrindEv() #0 {
+define void @_ZN4llvm3sys17RunningOnValgrindEv(i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %if.then, label %if.end
+  br i1 %c0, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
   ret void
 
 if.end:                                           ; preds = %entry
   %0 = call i64 asm sideeffect "mr 3,$1\0A\09mr 4,$2\0A\09rotldi 0,0,3  ; rotldi 0,0,13\0A\09rotldi 0,0,61 ; rotldi 0,0,51\0A\09or 1,1,1\0A\09mr $0,3", "=b,b,b,~{cc},~{memory},~{r3},~{r4}"(i32 0, ptr undef) #0
-  br i1 undef, label %end0, label %end1 ; need successor blocks to force spill
+  br i1 %c1, label %end0, label %end1 ; need successor blocks to force spill
 
 end0:
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/spill_p9_setb.ll b/llvm/test/CodeGen/PowerPC/spill_p9_setb.ll
--- a/llvm/test/CodeGen/PowerPC/spill_p9_setb.ll
+++ b/llvm/test/CodeGen/PowerPC/spill_p9_setb.ll
@@ -14,7 +14,7 @@
 ; RUN:     -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s \
 ; RUN:     | FileCheck %s --check-prefix=CHECK-P8
 
-define void @p9_setb_spill() {
+define void @p9_setb_spill(i1 %c0) {
 ; CHECK-P9-LABEL: p9_setb_spill:
 ; CHECK-P9:       # %bb.1: # %if.then
 ; CHECK-P9-DAG:    crnot 4*cr[[CREG:.*]]+lt, eq
@@ -32,7 +32,7 @@
 ; CHECK-P8:        blr
 ; CHECK-P8:        .LBB0_4: # %if.then1
 entry:
-  br i1 undef, label %if.end, label %if.then
+  br i1 %c0, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   %call = tail call signext i32 @fn_call()
diff --git a/llvm/test/CodeGen/PowerPC/split-index-tc.ll b/llvm/test/CodeGen/PowerPC/split-index-tc.ll
--- a/llvm/test/CodeGen/PowerPC/split-index-tc.ll
+++ b/llvm/test/CodeGen/PowerPC/split-index-tc.ll
@@ -5,7 +5,7 @@
 %"class.llvm::MachineOperand" = type { i8, [3 x i8], i64, ptr, i64 }
 
 ; Function Attrs: nounwind
-define void @_ZN4llvm17ScheduleDAGInstrs14addPhysRegDepsEPNS_5SUnitEj() #0 align 2 {
+define void @_ZN4llvm17ScheduleDAGInstrs14addPhysRegDepsEPNS_5SUnitEj(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8) #0 align 2 {
 
 ; If we were able to split out the indexing, the load with update should be
 ; removed (resulting in a nearly-empty output).
@@ -14,7 +14,7 @@
 
 entry:
   %0 = load ptr, ptr undef, align 8
-  br i1 undef, label %_ZNK4llvm14MachineOperand6getRegEv.exit, label %cond.false.i123
+  br i1 %c0, label %_ZNK4llvm14MachineOperand6getRegEv.exit, label %cond.false.i123
 
 cond.false.i123:                                  ; preds = %_ZN4llvm12MachineInstr10getOperandEj.exit
   unreachable
@@ -23,20 +23,20 @@
   %IsDef.i = getelementptr inbounds %"class.llvm::MachineOperand", ptr %0, i64 undef, i32 1
   %bf.load.i = load i24, ptr %IsDef.i, align 1
   %1 = and i24 %bf.load.i, 128
-  br i1 undef, label %for.cond.cleanup, label %for.body.lr.ph
+  br i1 %c1, label %for.cond.cleanup, label %for.body.lr.ph
 
 for.body.lr.ph:                                   ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit
   %2 = zext i24 %1 to i32
-  br i1 undef, label %cond.false.i134, label %_ZNK4llvm18MCRegAliasIteratordeEv.exit
+  br i1 %c2, label %cond.false.i134, label %_ZNK4llvm18MCRegAliasIteratordeEv.exit
 
 for.cond.cleanup:                                 ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit
-  br i1 undef, label %_ZNK4llvm14MachineOperand5isDefEv.exit, label %cond.false.i129
+  br i1 %c3, label %_ZNK4llvm14MachineOperand5isDefEv.exit, label %cond.false.i129
 
 cond.false.i129:                                  ; preds = %for.cond.cleanup
   unreachable
 
 _ZNK4llvm14MachineOperand5isDefEv.exit:           ; preds = %for.cond.cleanup
-  br i1 undef, label %_ZNK4llvm14MachineOperand6getRegEv.exit247, label %cond.false.i244
+  br i1 %c4, label %_ZNK4llvm14MachineOperand6getRegEv.exit247, label %cond.false.i244
 
 cond.false.i134:                                  ; preds = %for.body.lr.ph
   unreachable
@@ -48,26 +48,26 @@
   unreachable
 
 _ZNK4llvm14MachineOperand6getRegEv.exit247:       ; preds = %_ZNK4llvm14MachineOperand5isDefEv.exit
-  br i1 undef, label %if.then53, label %if.end55
+  br i1 %c5, label %if.then53, label %if.end55
 
 if.then53:                                        ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit247
   unreachable
 
 if.end55:                                         ; preds = %_ZNK4llvm14MachineOperand6getRegEv.exit247
-  br i1 undef, label %_ZNK4llvm14MachineOperand6isDeadEv.exit262, label %cond.false.i257
+  br i1 %c6, label %_ZNK4llvm14MachineOperand6isDeadEv.exit262, label %cond.false.i257
 
 cond.false.i257:                                  ; preds = %if.end55
   unreachable
 
 _ZNK4llvm14MachineOperand6isDeadEv.exit262:       ; preds = %if.end55
   %bf.load.i259 = load i24, ptr %IsDef.i, align 1
-  br i1 undef, label %if.then57, label %if.else59
+  br i1 %c7, label %if.then57, label %if.else59
 
 if.then57:                                        ; preds = %_ZNK4llvm14MachineOperand6isDeadEv.exit262
   unreachable
 
 if.else59:                                        ; preds = %_ZNK4llvm14MachineOperand6isDeadEv.exit262
-  br i1 undef, label %if.end89, label %if.then62
+  br i1 %c8, label %if.end89, label %if.then62
 
 if.then62:                                        ; preds = %if.else59
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/std-unal-fi.ll b/llvm/test/CodeGen/PowerPC/std-unal-fi.ll
--- a/llvm/test/CodeGen/PowerPC/std-unal-fi.ll
+++ b/llvm/test/CodeGen/PowerPC/std-unal-fi.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD4932(i8) {
+define void @autogen_SD4932(i8, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) {
 BB:
   %A4 = alloca i8
   %A = alloca <1 x ppc_fp128>
@@ -12,31 +12,31 @@
   %L5 = load i64, ptr undef
   store i8 %0, ptr %A4
   %Shuff7 = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 undef, i32 20, i32 22, i32 24, i32 26>
-  br i1 undef, label %CF, label %CF77
+  br i1 %c0, label %CF, label %CF77
 
 CF77:                                             ; preds = %CF81, %CF83, %CF77, %CF
-  br i1 undef, label %CF77, label %CF82
+  br i1 %c1, label %CF77, label %CF82
 
 CF82:                                             ; preds = %CF82, %CF77
   %L19 = load i64, ptr undef
   store <1 x ppc_fp128> zeroinitializer, ptr %A
   store i8 -65, ptr %A4
-  br i1 undef, label %CF82, label %CF83
+  br i1 %c2, label %CF82, label %CF83
 
 CF83:                                             ; preds = %CF82
   %L34 = load i64, ptr undef
-  br i1 undef, label %CF77, label %CF81
+  br i1 %c3, label %CF77, label %CF81
 
 CF81:                                             ; preds = %CF83
   %Shuff43 = shufflevector <16 x i32> %Shuff7, <16 x i32> undef, <16 x i32> <i32 15, i32 17, i32 19, i32 21, i32 23, i32 undef, i32 undef, i32 29, i32 31, i32 undef, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13>
   store ppc_fp128 0xM00000000000000000000000000000000, ptr %A4
-  br i1 undef, label %CF77, label %CF78
+  br i1 %c4, label %CF77, label %CF78
 
 CF78:                                             ; preds = %CF78, %CF81
-  br i1 undef, label %CF78, label %CF79
+  br i1 %c5, label %CF78, label %CF79
 
 CF79:                                             ; preds = %CF79, %CF78
-  br i1 undef, label %CF79, label %CF80
+  br i1 %c6, label %CF79, label %CF80
 
 CF80:                                             ; preds = %CF79
   store i64 %L19, ptr undef
@@ -49,7 +49,7 @@
   ret void
 }
 
-define void @autogen_SD88042(ptr, ptr, i8) {
+define void @autogen_SD88042(ptr, ptr, i8, i1 %c0, i1 %c1) {
 BB:
   %A4 = alloca <2 x i1>
   %A = alloca <16 x float>
@@ -59,13 +59,13 @@
   br label %CF
 
 CF:                                               ; preds = %CF78, %CF, %BB
-  br i1 undef, label %CF, label %CF77
+  br i1 %c0, label %CF, label %CF77
 
 CF77:                                             ; preds = %CF80, %CF77, %CF
   store <16 x float> zeroinitializer, ptr %Sl
   %L58 = load i32, ptr %1
   store i8 0, ptr %0
-  br i1 undef, label %CF77, label %CF80
+  br i1 %c1, label %CF77, label %CF80
 
 CF80:                                             ; preds = %CF77
   store i64 0, ptr %A4
@@ -82,7 +82,7 @@
   ret void
 }
 
-define void @autogen_SD37497(ptr, ptr, ptr) {
+define void @autogen_SD37497(ptr, ptr, ptr, i1 %c0) {
 BB:
   %A1 = alloca i1
   %I8 = insertelement <1 x i32> <i32 -1>, i32 454855, i32 0
@@ -95,7 +95,7 @@
   store double 0xB47BB29A53790718, ptr undef
   %E18 = extractelement <1 x i32> <i32 -1>, i32 0
   %FC22 = sitofp <1 x i32> %I8 to <1 x float>
-  br i1 undef, label %CF72, label %CF74
+  br i1 %c0, label %CF72, label %CF74
 
 CF74:                                             ; preds = %CF72
   store i8 0, ptr %0
diff --git a/llvm/test/CodeGen/PowerPC/stwu-sched.ll b/llvm/test/CodeGen/PowerPC/stwu-sched.ll
--- a/llvm/test/CodeGen/PowerPC/stwu-sched.ll
+++ b/llvm/test/CodeGen/PowerPC/stwu-sched.ll
@@ -9,7 +9,7 @@
 %0 = type { i32, i32 }
 
 ; Function Attrs: norecurse nounwind writeonly
-define void @initCombList(ptr nocapture, i32 signext) local_unnamed_addr #0 {
+define void @initCombList(ptr nocapture, i32 signext, i1 %c0, i1 %c1) local_unnamed_addr #0 {
 ; CHECK-LABEL: initCombList:
 ; CHECK: addi 4, 4, -8
 ; CHECK: stwu [[REG:[0-9]+]], 64(3)
@@ -20,7 +20,7 @@
 
 
   %3 = zext i32 %1 to i64
-  br i1 undef, label %6, label %4
+  br i1 %c0, label %6, label %4
 
 ; <label>:4:                                      ; preds = %2
   store i32 0, ptr undef, align 4, !tbaa !1
@@ -29,7 +29,7 @@
 
 ; <label>:6:                                      ; preds = %4, %2
   %7 = phi i64 [ 0, %2 ], [ %5, %4 ]
-  br i1 undef, label %23, label %8
+  br i1 %c1, label %23, label %8
 
 ; <label>:8:                                      ; preds = %8, %6
   %9 = phi i64 [ %21, %8 ], [ %7, %6 ]
diff --git a/llvm/test/CodeGen/PowerPC/stwux.ll b/llvm/test/CodeGen/PowerPC/stwux.ll
--- a/llvm/test/CodeGen/PowerPC/stwux.ll
+++ b/llvm/test/CodeGen/PowerPC/stwux.ll
@@ -4,16 +4,16 @@
 
 @multvec_i = external unnamed_addr global [100 x i32], align 4
 
-define fastcc void @subs_STMultiExceptIntern(i32 %input) nounwind {
+define fastcc void @subs_STMultiExceptIntern(i32 %input, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) nounwind {
 entry:
-  br i1 undef, label %while.body.lr.ph, label %return
+  br i1 %c0, label %while.body.lr.ph, label %return
 
 while.body.lr.ph:                                 ; preds = %entry
   br label %while.body
 
 while.body:                                       ; preds = %if.end12, %while.body.lr.ph
   %i.0240 = phi i32 [ -1, %while.body.lr.ph ], [ %i.1, %if.end12 ]
-  br i1 undef, label %if.end12, label %if.then
+  br i1 %c1, label %if.end12, label %if.then
 
 if.then:                                          ; preds = %while.body
   %0 = add i32 %input, 1
@@ -21,16 +21,16 @@
 
 if.end12:                                         ; preds = %if.then, %while.body
   %i.1 = phi i32 [ %i.0240, %while.body ], [ %0, %if.then ]
-  br i1 undef, label %while.body, label %while.end
+  br i1 %c2, label %while.body, label %while.end
 
 while.end:                                        ; preds = %if.end12
-  br i1 undef, label %return, label %if.end15
+  br i1 %c3, label %return, label %if.end15
 
 if.end15:                                         ; preds = %while.end
   %idxprom.i.i230 = sext i32 %i.1 to i64
   %arrayidx18 = getelementptr inbounds [100 x i32], ptr @multvec_i, i64 0, i64 %idxprom.i.i230
   store i32 0, ptr %arrayidx18, align 4
-  br i1 undef, label %while.body21, label %while.end90
+  br i1 %c4, label %while.body21, label %while.end90
 
 while.body21:                                     ; preds = %if.end15
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/sub-bv-types.ll b/llvm/test/CodeGen/PowerPC/sub-bv-types.ll
--- a/llvm/test/CodeGen/PowerPC/sub-bv-types.ll
+++ b/llvm/test/CodeGen/PowerPC/sub-bv-types.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @autogen_SD10521() {
+define void @autogen_SD10521(i1 %c0) {
 BB:
   %Shuff7 = shufflevector <16 x i16> zeroinitializer, <16 x i16> zeroinitializer, <16 x i32> <i32 undef, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 undef, i32 22, i32 undef, i32 26, i32 undef, i32 30>
   br label %CF
@@ -9,7 +9,7 @@
 CF:                                               ; preds = %CF78, %CF, %BB
   %I27 = insertelement <16 x i16> %Shuff7, i16 1360, i32 8
   %B28 = sub <16 x i16> %I27, %Shuff7
-  br i1 undef, label %CF, label %CF78
+  br i1 %c0, label %CF, label %CF78
 
 CF78:                                             ; preds = %CF
   %B42 = xor <16 x i16> %B28, %Shuff7
diff --git a/llvm/test/CodeGen/PowerPC/subreg-postra.ll b/llvm/test/CodeGen/PowerPC/subreg-postra.ll
--- a/llvm/test/CodeGen/PowerPC/subreg-postra.ll
+++ b/llvm/test/CodeGen/PowerPC/subreg-postra.ll
@@ -9,22 +9,22 @@
                                              ptr %inp5, i1 %inp6,
                                              i1 %inp7, i1 %inp8) #0 {
 entry:
-  br i1 undef, label %do.body, label %if.then5
+  br i1 %c0, label %do.body, label %if.then5
 
 if.then5:                                         ; preds = %entry
   unreachable
 
 do.body:                                          ; preds = %entry
-  br i1 undef, label %do.body.i, label %trace_jbd2_start_commit.exit
+  br i1 %c1, label %do.body.i, label %trace_jbd2_start_commit.exit
 
 do.body.i:                                        ; preds = %do.body
   unreachable
 
 trace_jbd2_start_commit.exit:                     ; preds = %do.body
-  br i1 undef, label %do.body.i1116, label %trace_jbd2_commit_locking.exit
+  br i1 %c2, label %do.body.i1116, label %trace_jbd2_commit_locking.exit
 
 do.body.i1116:                                    ; preds = %trace_jbd2_start_commit.exit
-  br i1 undef, label %if.end.i1123, label %do.body5.i1122
+  br i1 %c3, label %if.end.i1123, label %do.body5.i1122
 
 do.body5.i1122:                                   ; preds = %do.body.i1116
   unreachable
@@ -33,28 +33,28 @@
   br label %trace_jbd2_commit_locking.exit
 
 trace_jbd2_commit_locking.exit:                   ; preds = %if.end.i1123, %trace_jbd2_start_commit.exit
-  br i1 undef, label %spin_unlock.exit1146, label %if.then.i.i.i.i1144
+  br i1 %c4, label %spin_unlock.exit1146, label %if.then.i.i.i.i1144
 
 if.then.i.i.i.i1144:                              ; preds = %trace_jbd2_commit_locking.exit
   unreachable
 
 spin_unlock.exit1146:                             ; preds = %trace_jbd2_commit_locking.exit
-  br i1 undef, label %spin_unlock.exit1154, label %if.then.i.i.i.i1152
+  br i1 %c5, label %spin_unlock.exit1154, label %if.then.i.i.i.i1152
 
 if.then.i.i.i.i1152:                              ; preds = %spin_unlock.exit1146
   br label %spin_unlock.exit1154
 
 spin_unlock.exit1154:                             ; preds = %if.then.i.i.i.i1152, %spin_unlock.exit1146
-  br i1 undef, label %do.body.i1159, label %trace_jbd2_commit_flushing.exit
+  br i1 %c6, label %do.body.i1159, label %trace_jbd2_commit_flushing.exit
 
 do.body.i1159:                                    ; preds = %spin_unlock.exit1154
   unreachable
 
 trace_jbd2_commit_flushing.exit:                  ; preds = %spin_unlock.exit1154
-  br i1 undef, label %for.end.i, label %for.body.lr.ph.i
+  br i1 %c7, label %for.end.i, label %for.body.lr.ph.i
 
 for.body.lr.ph.i:                                 ; preds = %trace_jbd2_commit_flushing.exit
-  br i1 undef, label %spin_unlock.exit.i, label %if.then.i.i.i.i.i
+  br i1 %c8, label %spin_unlock.exit.i, label %if.then.i.i.i.i.i
 
 if.then.i.i.i.i.i:                                ; preds = %for.body.lr.ph.i
   unreachable
@@ -63,43 +63,43 @@
   unreachable
 
 for.end.i:                                        ; preds = %trace_jbd2_commit_flushing.exit
-  br i1 undef, label %journal_submit_data_buffers.exit, label %if.then.i.i.i.i31.i
+  br i1 %c9, label %journal_submit_data_buffers.exit, label %if.then.i.i.i.i31.i
 
 if.then.i.i.i.i31.i:                              ; preds = %for.end.i
   unreachable
 
 journal_submit_data_buffers.exit:                 ; preds = %for.end.i
-  br i1 undef, label %if.end103, label %if.then102
+  br i1 %c10, label %if.end103, label %if.then102
 
 if.then102:                                       ; preds = %journal_submit_data_buffers.exit
   unreachable
 
 if.end103:                                        ; preds = %journal_submit_data_buffers.exit
-  br i1 undef, label %do.body.i1182, label %trace_jbd2_commit_logging.exit
+  br i1 %c11, label %do.body.i1182, label %trace_jbd2_commit_logging.exit
 
 do.body.i1182:                                    ; preds = %if.end103
   unreachable
 
 trace_jbd2_commit_logging.exit:                   ; preds = %if.end103
-  br i1 undef, label %for.end.i1287, label %for.body.i1277
+  br i1 %c12, label %for.end.i1287, label %for.body.i1277
 
 for.body.i1277:                                   ; preds = %trace_jbd2_commit_logging.exit
   unreachable
 
 for.end.i1287:                                    ; preds = %trace_jbd2_commit_logging.exit
-  br i1 undef, label %journal_finish_inode_data_buffers.exit, label %if.then.i.i.i.i84.i
+  br i1 %c13, label %journal_finish_inode_data_buffers.exit, label %if.then.i.i.i.i84.i
 
 if.then.i.i.i.i84.i:                              ; preds = %for.end.i1287
   unreachable
 
 journal_finish_inode_data_buffers.exit:           ; preds = %for.end.i1287
-  br i1 undef, label %if.end256, label %if.then249
+  br i1 %c14, label %if.end256, label %if.then249
 
 if.then249:                                       ; preds = %journal_finish_inode_data_buffers.exit
   unreachable
 
 if.end256:                                        ; preds = %journal_finish_inode_data_buffers.exit
-  br i1 undef, label %do.body277, label %if.then260
+  br i1 %c15, label %do.body277, label %if.then260
 
 if.then260:                                       ; preds = %if.end256
   br label %do.body277
diff --git a/llvm/test/CodeGen/PowerPC/test-and-cmp-folding.ll b/llvm/test/CodeGen/PowerPC/test-and-cmp-folding.ll
--- a/llvm/test/CodeGen/PowerPC/test-and-cmp-folding.ll
+++ b/llvm/test/CodeGen/PowerPC/test-and-cmp-folding.ll
@@ -2,7 +2,7 @@
 ; RUN:   -verify-machineinstrs | FileCheck %s
 declare void @free()
 
-define dso_local fastcc void @test2() {
+define dso_local fastcc void @test2(i1 %c0, i1 %c1) {
 ; CHECK-LABEL: test2
 entry:
   switch i16 undef, label %sw.default [
@@ -15,12 +15,12 @@
 
 
 sw.bb52:                                          ; preds = %entry, %entry, %entry, %entry, %entry, %entry
-  br i1 undef, label %if.then14.i, label %sw.epilog.i642
+  br i1 %c0, label %if.then14.i, label %sw.epilog.i642
 
 if.then14.i:                                      ; preds = %sw.bb52
   %call39.i = call i64 @test() #3
   %and.i126.i = and i64 %call39.i, 1
-  br i1 undef, label %dummy.exit.i, label %if.then.i.i.i636
+  br i1 %c1, label %dummy.exit.i, label %if.then.i.i.i636
 
 if.then.i.i.i636:                                 ; preds = %if.then14.i
   %0 = load ptr, ptr undef, align 8
diff --git a/llvm/test/CodeGen/PowerPC/vsel-prom.ll b/llvm/test/CodeGen/PowerPC/vsel-prom.ll
--- a/llvm/test/CodeGen/PowerPC/vsel-prom.ll
+++ b/llvm/test/CodeGen/PowerPC/vsel-prom.ll
@@ -3,9 +3,9 @@
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @Compute_Lateral() #0 {
+define void @Compute_Lateral(i1 %c0) #0 {
 entry:
-  br i1 undef, label %if.then, label %if.end
+  br i1 %c0, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll
--- a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll
@@ -2,9 +2,9 @@
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define void @LSH_recall_init(float %d_min, float %W) #0 {
+define void @LSH_recall_init(float %d_min, float %W, i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.body.lr.ph, label %for.end
+  br i1 %c0, label %for.body.lr.ph, label %for.end
 
 ; CHECK-LABEL: @LSH_recall_init
 ; CHECK: xsmaddadp
diff --git a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
--- a/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll
@@ -3,9 +3,9 @@
 target triple = "powerpc64le-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @acosh_float8(<4 x i32> %v1, <4 x i32> %v2, <4 x float> %x) #0 {
+define void @acosh_float8(<4 x i32> %v1, <4 x i32> %v2, <4 x float> %x, i1 %c0) #0 {
 entry:
-  br i1 undef, label %if.then, label %if.end
+  br i1 %c0, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
   %0 = tail call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %x, <4 x float> <float 0x3FE62E4200000000, float 0x3FE62E4200000000, float 0x3FE62E4200000000, float 0x3FE62E4200000000>, <4 x float> %x) #0
diff --git a/llvm/test/CodeGen/PowerPC/vsx-infl-copy2.ll b/llvm/test/CodeGen/PowerPC/vsx-infl-copy2.ll
--- a/llvm/test/CodeGen/PowerPC/vsx-infl-copy2.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-infl-copy2.ll
@@ -3,17 +3,17 @@
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @_Z28test_goto_loop_unroll_factorILi22EiEvPKT0_iPKc(i32* nocapture readonly %first) #0 {
+define void @_Z28test_goto_loop_unroll_factorILi22EiEvPKT0_iPKc(i32* nocapture readonly %first, i1 %c0, i1 %c1) #0 {
 entry:
   br i1 false, label %loop2_start, label %if.end5
 
 ; CHECK-LABEL: @_Z28test_goto_loop_unroll_factorILi22EiEvPKT0_iPKc
 
 loop2_start:                                      ; preds = %loop2_start, %entry
-  br i1 undef, label %loop2_start, label %if.then.i31
+  br i1 %c0, label %loop2_start, label %if.then.i31
 
 if.end5:                                          ; preds = %entry
-  br i1 undef, label %loop_start.preheader, label %if.then.i31
+  br i1 %c1, label %loop_start.preheader, label %if.then.i31
 
 loop_start.preheader:                             ; preds = %if.end5
   br i1 false, label %middle.block, label %vector.body
diff --git a/llvm/test/CodeGen/PowerPC/vsx-self-copy.ll b/llvm/test/CodeGen/PowerPC/vsx-self-copy.ll
--- a/llvm/test/CodeGen/PowerPC/vsx-self-copy.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-self-copy.ll
@@ -3,9 +3,9 @@
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define double @takFP(double %x, double %y, double %z) #0 {
+define double @takFP(double %x, double %y, double %z, i1 %c0) #0 {
 entry:
-  br i1 undef, label %if.then, label %return
+  br i1 %c0, label %if.then, label %return
 
 if.then:                                          ; preds = %if.then, %entry
   %x.tr16 = phi double [ %call, %if.then ], [ %x, %entry ]
diff --git a/llvm/test/CodeGen/PowerPC/vsx-spill-norwstore.ll b/llvm/test/CodeGen/PowerPC/vsx-spill-norwstore.ll
--- a/llvm/test/CodeGen/PowerPC/vsx-spill-norwstore.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx-spill-norwstore.ll
@@ -7,7 +7,7 @@
 @.v2f64 = external unnamed_addr constant <2 x double>, align 16
 
 ; Function Attrs: nounwind
-define void @main() #0 {
+define void @main(i1 %c0) #0 {
 ; CHECK-LABEL: @main
 ; Make sure that the stxvd2x passes -verify-machineinstrs
 ; CHECK: stxvd2x
@@ -22,7 +22,7 @@
   unreachable
 
 check.exit69.i:                                   ; preds = %entry
-  br i1 undef, label %if.then.i63.i, label %check.exit64.i
+  br i1 %c0, label %if.then.i63.i, label %check.exit64.i
 
 if.then.i63.i:                                    ; preds = %check.exit69.i
   tail call void (ptr, ...) @printf(ptr @.str10, ptr @.str1, <2 x double> %val) #0
diff --git a/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll b/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
--- a/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
+++ b/llvm/test/CodeGen/PowerPC/xray-ret-is-terminator.ll
@@ -1,12 +1,12 @@
 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 
-define void @ILLBeBack() #0 {
+define void @ILLBeBack(i1 %c0, i1 %c1) #0 {
 ; CHECK-LABEL: @ILLBeBack
 ; CHECK: bne {{[0-9]+}}, [[LABEL:\.[a-zA-Z0-9_]+]]
 ; CHECK: [[LABEL]]:
 ; CHECK: bl __xray_FunctionExit
 bb:
-  br i1 undef, label %bb1, label %bb8
+  br i1 %c0, label %bb1, label %bb8
 
 bb1:
   %tmp = tail call i64 asm sideeffect "", "=&r,=*m,b,r,*m,~{cc}"(ptr elementtype(i64) nonnull undef, ptr nonnull undef, i64 1, ptr elementtype(i64) nonnull undef)
@@ -19,7 +19,7 @@
   br i1 %tmp5, label %bb6, label %bb3
 
 bb6:
-  br i1 undef, label %bb7, label %bb8
+  br i1 %c1, label %bb7, label %bb8
 
 bb7:
   tail call void () undef()
diff --git a/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll b/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
--- a/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
+++ b/llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
@@ -7,7 +7,7 @@
                                     <3 x i1> %input3, <3 x i64> %input4,
                                     <3 x i64> %input5,  ptr %input6) #0 {
 entry:
-  br i1 undef, label %if.then.i, label %fmax_double3.exit
+  br i1 %c0, label %if.then.i, label %fmax_double3.exit
 
 if.then.i:                                        ; preds = %entry
   %cmp24.i.i = fcmp ord <3 x double> %input1, zeroinitializer
@@ -27,7 +27,7 @@
 ; CHECK: xvcmpeqdp
 
 fmax_double3.exit:                                ; preds = %if.then.i, %entry
-  br i1 undef, label %if.then, label %do.end
+  br i1 %c1, label %if.then, label %do.end
 
 if.then:                                          ; preds = %fmax_double3.exit
   unreachable
diff --git a/llvm/test/CodeGen/PowerPC/zero-not-run.ll b/llvm/test/CodeGen/PowerPC/zero-not-run.ll
--- a/llvm/test/CodeGen/PowerPC/zero-not-run.ll
+++ b/llvm/test/CodeGen/PowerPC/zero-not-run.ll
@@ -3,9 +3,9 @@
 target triple = "powerpc64-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define internal ptr @func_65(ptr %p_66) #0 {
+define internal ptr @func_65(ptr %p_66, i1 %c0) #0 {
 entry:
-  br i1 undef, label %for.body, label %for.end731
+  br i1 %c0, label %for.body, label %for.end731
 
 for.body:                                         ; preds = %entry
   %0 = load i32, ptr undef, align 4