diff --git a/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc1.ll b/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc1.ll
--- a/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc1.ll
+++ b/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc1.ll
@@ -4,9 +4,9 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b4, !prof !3
+  br i1 %c0, label %b1, label %b4, !prof !3
 
 b1:                                               ; preds = %b3, %b0
   br label %b2
@@ -20,7 +20,7 @@
   %v5 = bitcast <128 x i16> %v4 to <64 x i32>
   %v6 = tail call <64 x i32> @llvm.hexagon.V6.vaddh.dv.128B(<64 x i32> undef, <64 x i32> %v5)
   %v7 = tail call <64 x i32> @llvm.hexagon.V6.vaddh.dv.128B(<64 x i32> %v6, <64 x i32> undef)
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b3:                                               ; preds = %b2
   %v8 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %v7)
diff --git a/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc2.ll b/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc2.ll
--- a/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc2.ll
+++ b/llvm/test/CodeGen/Hexagon/Halide_vec_cast_trunc2.ll
@@ -4,12 +4,12 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
-  br i1 undef, label %b1, label %b6, !prof !3
+  br i1 %c0, label %b1, label %b6, !prof !3
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b3, !prof !3
+  br i1 %c1, label %b2, label %b3, !prof !3
 
 b2:                                               ; preds = %b1
   unreachable
@@ -27,7 +27,7 @@
   %v6 = tail call <64 x i32> @llvm.hexagon.V6.vaddh.dv.128B(<64 x i32> undef, <64 x i32> %v5)
   %v7 = bitcast <64 x i32> %v6 to <128 x i16>
   %v8 = shufflevector <128 x i16> %v7, <128 x i16> undef, <64 x i32> <i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
-  br i1 undef, label %b5, label %b4
+  br i1 %c2, label %b5, label %b4
 
 b5:                                               ; preds = %b4
   store <64 x i16> %v8, ptr undef, align 1024, !tbaa !7
diff --git a/llvm/test/CodeGen/Hexagon/NVJumpCmp.ll b/llvm/test/CodeGen/Hexagon/NVJumpCmp.ll
--- a/llvm/test/CodeGen/Hexagon/NVJumpCmp.ll
+++ b/llvm/test/CodeGen/Hexagon/NVJumpCmp.ll
@@ -8,19 +8,19 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @_ZN6Halide7Runtime8Internal13default_traceEPvPK18halide_trace_event() #0 {
+define void @_ZN6Halide7Runtime8Internal13default_traceEPvPK18halide_trace_event(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10) #0 {
 entry:
-  br i1 undef, label %if.then, label %if.else
+  br i1 %c0, label %if.then, label %if.else
 
 if.then:                                          ; preds = %entry
   br label %while.cond
 
 while.cond:                                       ; preds = %while.cond, %if.then
-  br i1 undef, label %while.cond, label %while.end
+  br i1 %c1, label %while.cond, label %while.end
 
 while.end:                                        ; preds = %while.cond
   %add = add i32 undef, 48
-  br i1 undef, label %if.end, label %if.then17
+  br i1 %c2, label %if.end, label %if.then17
 
 if.then17:                                        ; preds = %while.end
   unreachable
@@ -28,25 +28,25 @@
 if.end:                                           ; preds = %while.end
   %arrayidx21 = getelementptr inbounds [4096 x i8], ptr undef, i32 0, i32 8
   store i8 undef, ptr %arrayidx21, align 4, !tbaa !1
-  br i1 undef, label %for.body42.preheader6, label %min.iters.checked
+  br i1 %c3, label %for.body42.preheader6, label %min.iters.checked
 
 for.body42.preheader6:                            ; preds = %vector.body.preheader, %min.iters.checked, %if.end
   unreachable
 
 min.iters.checked:                                ; preds = %if.end
-  br i1 undef, label %for.body42.preheader6, label %vector.body.preheader
+  br i1 %c4, label %for.body42.preheader6, label %vector.body.preheader
 
 vector.body.preheader:                            ; preds = %min.iters.checked
-  br i1 undef, label %for.cond48.preheader, label %for.body42.preheader6
+  br i1 %c5, label %for.cond48.preheader, label %for.body42.preheader6
 
 for.cond48.preheader:                             ; preds = %vector.body.preheader
-  br i1 undef, label %while.cond.i, label %for.body61.lr.ph
+  br i1 %c6, label %while.cond.i, label %for.body61.lr.ph
 
 for.body61.lr.ph:                                 ; preds = %for.cond48.preheader
-  br i1 undef, label %for.body61, label %min.iters.checked595
+  br i1 %c7, label %for.body61, label %min.iters.checked595
 
 min.iters.checked595:                             ; preds = %for.body61.lr.ph
-  br i1 undef, label %for.body61, label %vector.memcheck608
+  br i1 %c8, label %for.body61, label %vector.memcheck608
 
 vector.memcheck608:                               ; preds = %min.iters.checked595
   %scevgep600 = getelementptr [4096 x i8], ptr undef, i32 0, i32 %add
@@ -55,14 +55,14 @@
   br i1 %memcheck.conflict607, label %for.body61, label %vector.body590
 
 vector.body590:                                   ; preds = %vector.body590, %vector.memcheck608
-  br i1 undef, label %middle.block591, label %vector.body590, !llvm.loop !4
+  br i1 %c9, label %middle.block591, label %vector.body590, !llvm.loop !4
 
 middle.block591:                                  ; preds = %vector.body590
   %cmp.n613 = icmp eq i32 undef, 0
   br i1 %cmp.n613, label %while.cond.i, label %for.body61
 
 while.cond.i:                                     ; preds = %for.body61, %while.cond.i, %middle.block591, %for.cond48.preheader
-  br i1 undef, label %_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit, label %while.cond.i
+  br i1 %c10, label %_ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit, label %while.cond.i
 
 _ZN6Halide7Runtime8Internal14ScopedSpinLockC2EPVi.exit: ; preds = %while.cond.i
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/addrmode-keepdeadphis.ll b/llvm/test/CodeGen/Hexagon/addrmode-keepdeadphis.ll
--- a/llvm/test/CodeGen/Hexagon/addrmode-keepdeadphis.ll
+++ b/llvm/test/CodeGen/Hexagon/addrmode-keepdeadphis.ll
@@ -19,7 +19,7 @@
 %s.2 = type { i8, i8, i64, %s.3 }
 %s.3 = type { i8 }
 
-define void @f0.1() local_unnamed_addr #0 align 2 {
+define void @f0.1(i1 %c0) local_unnamed_addr #0 align 2 {
 b0:
   %v0 = alloca %s.0, align 8
   %v1 = getelementptr inbounds %s.0, ptr %v0, i32 0, i32 1
@@ -28,7 +28,7 @@
   %v3 = getelementptr inbounds %s.0, ptr %v0, i32 0, i32 2, i32 0, i32 0
   %v4 = getelementptr inbounds %s.0, ptr %v0, i32 0, i32 2, i32 0, i32 3, i32 0
   store i8 -1, ptr %v4, align 8
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   %v5 = call dereferenceable(12) ptr @f2.3(ptr nonnull undef, ptr nonnull dereferenceable(80) undef) #0
diff --git a/llvm/test/CodeGen/Hexagon/always-ext.ll b/llvm/test/CodeGen/Hexagon/always-ext.ll
--- a/llvm/test/CodeGen/Hexagon/always-ext.ll
+++ b/llvm/test/CodeGen/Hexagon/always-ext.ll
@@ -18,9 +18,9 @@
 
 declare void @_Assert()
 
-define void @CuSuiteAddSuite() nounwind {
+define void @CuSuiteAddSuite(i1 %c0) nounwind {
 entry:
-  br i1 undef, label %for.body.us, label %for.end
+  br i1 %c0, label %for.body.us, label %for.end
 
 for.body.us:                                      ; preds = %entry
   %0 = load ptr, ptr null, align 4
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-bitcast-vsplat.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-bitcast-vsplat.ll
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-bitcast-vsplat.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-bitcast-vsplat.ll
@@ -17,9 +17,9 @@
 %s.2 = type { i8, i8, [16 x i8], i8, [16 x i8] }
 
 ; Function Attrs: nounwind
-define dso_local zeroext i8 @f0(i8 zeroext %a0, ptr nocapture readonly %a1, i8 signext %a2) local_unnamed_addr #0 {
+define dso_local zeroext i8 @f0(i8 zeroext %a0, ptr nocapture readonly %a1, i8 signext %a2, i1 %c0) local_unnamed_addr #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v0 = load <64 x i8>, ptr undef, align 1
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-imm.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-imm.ll
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-imm.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-const-splat-imm.ll
@@ -10,9 +10,9 @@
 @g0 = external dllexport local_unnamed_addr global ptr, align 4
 
 ; Function Attrs: noinline
-define dso_local fastcc void @f0(ptr %a0, i32 %a1) unnamed_addr #0 {
+define dso_local fastcc void @f0(ptr %a0, i32 %a1, i1 %c0) unnamed_addr #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v0 = add nsw <8 x i32> zeroinitializer, <i32 -22, i32 -22, i32 -22, i32 -22, i32 -22, i32 -22, i32 -22, i32 -22>
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-rescale-nonint.ll b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-rescale-nonint.ll
--- a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-rescale-nonint.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-rescale-nonint.ll
@@ -6,7 +6,7 @@
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
-define dllexport void @f0(ptr %a0, <32 x float> %a1, <32 x float> %a2) local_unnamed_addr #0 {
+define dllexport void @f0(ptr %a0, <32 x float> %a1, <32 x float> %a2, i1 %c0) local_unnamed_addr #0 {
 b0:
   %v0 = add nuw nsw i32 0, 64
   %v1 = getelementptr inbounds float, ptr %a0, i32 %v0
@@ -15,7 +15,7 @@
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   store <32 x float> %a1, ptr %v1, align 4
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll
--- a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll
@@ -6,7 +6,7 @@
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
-define dllexport void @f0(ptr %a0, i32 %a1, i32 %a2, <32 x i32> %a3) local_unnamed_addr #0 {
+define dllexport void @f0(ptr %a0, i32 %a1, i32 %a2, <32 x i32> %a3, i1 %c0) local_unnamed_addr #0 {
 b0:
   %v0 = add nuw nsw i32 0, 96
   %v1 = getelementptr inbounds i32, ptr %a0, i32 %v0
@@ -17,7 +17,7 @@
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   store <32 x i32> %a3, ptr %v1, align 4
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll
--- a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll
@@ -14,7 +14,7 @@
 ; CHECK: [[QREG:q[0-3]+]] = vand([[VREG2]],r{{[0-9]+}})
 ; CHECK: if ([[QREG]]) vmem({{.*}}) = v{{[0-9]+}}
 
-define dllexport void @f0(ptr %a0) local_unnamed_addr #0 {
+define dllexport void @f0(ptr %a0, i1 %c0) local_unnamed_addr #0 {
 b0:
   br label %b1
 
@@ -25,7 +25,7 @@
   %v3 = or i32 0, 48
   %v4 = getelementptr inbounds i32, ptr %a0, i32 %v3
   store <8 x i32> undef, ptr %v4, align 64
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/avoid-predspill-calleesaved.ll b/llvm/test/CodeGen/Hexagon/avoid-predspill-calleesaved.ll
--- a/llvm/test/CodeGen/Hexagon/avoid-predspill-calleesaved.ll
+++ b/llvm/test/CodeGen/Hexagon/avoid-predspill-calleesaved.ll
@@ -12,21 +12,21 @@
 ; CHECK-NOT: = memw(r29
 ;
 
-define void @PredSpill() {
+define void @PredSpill(i1 %c0, i1 %c1, i1 %c2, i1 %c3) {
 entry:
-  br i1 undef, label %if.then, label %if.else.14
+  br i1 %c0, label %if.then, label %if.else.14
 
 if.then:                                          ; preds = %entry
-  br i1 undef, label %if.end.57, label %if.else
+  br i1 %c1, label %if.end.57, label %if.else
 
 if.else:                                          ; preds = %if.then
   unreachable
 
 if.else.14:                                       ; preds = %entry
-  br i1 undef, label %if.then.17, label %if.end.57
+  br i1 %c2, label %if.then.17, label %if.end.57
 
 if.then.17:                                       ; preds = %if.else.14
-  br i1 undef, label %if.end.57, label %if.then.20
+  br i1 %c3, label %if.end.57, label %if.then.20
 
 if.then.20:                                       ; preds = %if.then.17
   %call21 = tail call i32 @myfun()
diff --git a/llvm/test/CodeGen/Hexagon/base-offset-stv4.ll b/llvm/test/CodeGen/Hexagon/base-offset-stv4.ll
--- a/llvm/test/CodeGen/Hexagon/base-offset-stv4.ll
+++ b/llvm/test/CodeGen/Hexagon/base-offset-stv4.ll
@@ -2,9 +2,9 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b4
+  br i1 %c0, label %b1, label %b4
 
 b1:                                               ; preds = %b0
   %v0 = load ptr, ptr undef, align 4
@@ -22,7 +22,7 @@
   br i1 %v6, label %b3, label %b2
 
 b3:                                               ; preds = %b3, %b2
-  br i1 undef, label %b4, label %b3
+  br i1 %c1, label %b4, label %b3
 
 b4:                                               ; preds = %b3, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/bit-bitsplit-regclass.ll b/llvm/test/CodeGen/Hexagon/bit-bitsplit-regclass.ll
--- a/llvm/test/CodeGen/Hexagon/bit-bitsplit-regclass.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-bitsplit-regclass.ll
@@ -11,13 +11,13 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @f0() #0 align 2 {
+define void @f0(i1 %c0) #0 align 2 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b3, %b0
   %v0 = phi i64 [ 0, %b0 ], [ %v6, %b3 ]
-  br i1 undef, label %b2, label %b3
+  br i1 %c0, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   br label %b3
diff --git a/llvm/test/CodeGen/Hexagon/bit-has.ll b/llvm/test/CodeGen/Hexagon/bit-has.ll
--- a/llvm/test/CodeGen/Hexagon/bit-has.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-has.ll
@@ -6,7 +6,7 @@
 
 target triple = "hexagon"
 
-define void @fred() local_unnamed_addr #0 {
+define void @fred(i1 %c0) local_unnamed_addr #0 {
 b0:
   %v1 = load i32, ptr undef, align 4
   %v2 = tail call i32 @llvm.hexagon.A2.sath(i32 undef)
@@ -38,7 +38,7 @@
   br label %b19
 
 b19:                                              ; preds = %b6
-  br i1 undef, label %b20, label %b21
+  br i1 %c0, label %b20, label %b21
 
 b20:                                              ; preds = %b19
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll b/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll
--- a/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-loop-rc-mismatch.ll
@@ -4,11 +4,11 @@
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
-define weak_odr hidden i32 @fred(ptr %this, ptr nocapture readonly dereferenceable(4) %__k) #0 align 2 {
+define weak_odr hidden i32 @fred(ptr %this, ptr nocapture readonly dereferenceable(4) %__k, i1 %c0) #0 align 2 {
 entry:
   %call = tail call i64 @danny(ptr %this, ptr nonnull dereferenceable(4) %__k) #2
   %__p.sroa.0.0.extract.trunc = trunc i64 %call to i32
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %__p.sroa.0.018 = phi i32 [ %call8, %for.body ], [ %__p.sroa.0.0.extract.trunc, %entry ]
diff --git a/llvm/test/CodeGen/Hexagon/bit-phi.ll b/llvm/test/CodeGen/Hexagon/bit-phi.ll
--- a/llvm/test/CodeGen/Hexagon/bit-phi.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-phi.ll
@@ -10,23 +10,23 @@
 declare ptr @foo(ptr, ptr, i32) #1
 
 ; Function Attrs: nounwind
-define i32 @bar(ptr %ptr, ptr %buf, i32 %c, ptr %d, i32 %e) #1 {
+define i32 @bar(ptr %ptr, ptr %buf, i32 %c, ptr %d, i32 %e, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #1 {
 entry:
-  br i1 undef, label %return, label %if.end
+  br i1 %c0, label %return, label %if.end
 
 if.end:                                           ; preds = %entry
-  br i1 undef, label %while.cond13.preheader, label %if.end3
+  br i1 %c1, label %while.cond13.preheader, label %if.end3
 
 if.end3:                                          ; preds = %if.end
   br label %while.cond13.preheader
 
 while.cond13.preheader:                           ; preds = %if.end3, %if.end
-  br i1 undef, label %while.body20, label %return
+  br i1 %c2, label %while.body20, label %return
 
 while.body20:                                     ; preds = %if.end38, %while.cond13.preheader
   %addr.0100 = phi i32 [ undef, %if.end38 ], [ %c, %while.cond13.preheader ]
   %cond = select i1 undef, i32 %addr.0100, i32 undef
-  br i1 undef, label %while.body20.if.end38_crit_edge, label %if.then32
+  br i1 %c3, label %while.body20.if.end38_crit_edge, label %if.then32
 
 while.body20.if.end38_crit_edge:                  ; preds = %while.body20
   %conv39.pre = and i32 %cond, 65535
@@ -42,7 +42,7 @@
   %0 = phi ptr [ undef, %while.body20.if.end38_crit_edge ], [ %.pre, %if.then32 ]
   %add = add i32 %conv39.pre-phi, 0
   %call52 = tail call ptr @foo(ptr %0, ptr %d, i32 %e) #1
-  br i1 undef, label %while.body20, label %return
+  br i1 %c4, label %while.body20, label %return
 
 return:                                           ; preds = %if.end38, %while.cond13.preheader, %entry
   %retval.0 = phi i32 [ 0, %entry ], [ 0, %while.cond13.preheader ], [ %add, %if.end38 ]
diff --git a/llvm/test/CodeGen/Hexagon/bit-visit-flowq.ll b/llvm/test/CodeGen/Hexagon/bit-visit-flowq.ll
--- a/llvm/test/CodeGen/Hexagon/bit-visit-flowq.ll
+++ b/llvm/test/CodeGen/Hexagon/bit-visit-flowq.ll
@@ -9,12 +9,12 @@
 @debug = external hidden unnamed_addr global i1, align 4
 
 ; Function Attrs: nounwind
-define void @foo(i1 %cond) local_unnamed_addr #0 {
+define void @foo(i1 %cond, i1 %c0) local_unnamed_addr #0 {
 entry:
   br label %if.end5
 
 if.end5:                                          ; preds = %entry
-  br i1 undef, label %if.then12, label %if.end13
+  br i1 %c0, label %if.then12, label %if.end13
 
 if.then12:                                        ; preds = %if.end5
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/block-ranges-nodef.ll b/llvm/test/CodeGen/Hexagon/block-ranges-nodef.ll
--- a/llvm/test/CodeGen/Hexagon/block-ranges-nodef.ll
+++ b/llvm/test/CodeGen/Hexagon/block-ranges-nodef.ll
@@ -5,22 +5,22 @@
 
 declare void @foo() #0
 
-define hidden fastcc void @fred(i32 %a, i64 %b, i64 %c) unnamed_addr #1 {
+define hidden fastcc void @fred(i32 %a, i64 %b, i64 %c, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) unnamed_addr #1 {
 entry:
   %cmp17 = icmp ne i64 %c, 0
   %conv19 = zext i1 %cmp17 to i64
   %or = or i64 %conv19, %b
   store i64 %or, ptr undef, align 8
-  br i1 undef, label %if.then44, label %if.end96
+  br i1 %c0, label %if.then44, label %if.end96
 
 if.then44:                                        ; preds = %entry
-  br i1 undef, label %overflow, label %lor.lhs.false
+  br i1 %c1, label %overflow, label %lor.lhs.false
 
 lor.lhs.false:                                    ; preds = %if.then44
-  br i1 undef, label %overflow, label %if.end52
+  br i1 %c2, label %overflow, label %if.end52
 
 if.end52:                                         ; preds = %lor.lhs.false
-  br i1 undef, label %if.then55, label %if.end96
+  br i1 %c3, label %if.then55, label %if.end96
 
 if.then55:                                        ; preds = %if.end52
   %cmp60 = icmp slt i32 %a, 0
@@ -38,7 +38,7 @@
   unreachable
 
 if.end96:                                         ; preds = %if.end52, %entry
-  br i1 undef, label %if.end102, label %if.then98
+  br i1 %c4, label %if.end102, label %if.then98
 
 if.then98:                                        ; preds = %if.end96
   br label %if.end102
diff --git a/llvm/test/CodeGen/Hexagon/branchfolder-keep-impdef.ll b/llvm/test/CodeGen/Hexagon/branchfolder-keep-impdef.ll
--- a/llvm/test/CodeGen/Hexagon/branchfolder-keep-impdef.ll
+++ b/llvm/test/CodeGen/Hexagon/branchfolder-keep-impdef.ll
@@ -7,9 +7,9 @@
 
 target triple = "hexagon"
 
-define void @fred(i32 %p0) local_unnamed_addr align 2 {
+define void @fred(i32 %p0, i1 %c0) local_unnamed_addr align 2 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   %t0 = load ptr, ptr undef, align 4
diff --git a/llvm/test/CodeGen/Hexagon/bug17386.ll b/llvm/test/CodeGen/Hexagon/bug17386.ll
--- a/llvm/test/CodeGen/Hexagon/bug17386.ll
+++ b/llvm/test/CodeGen/Hexagon/bug17386.ll
@@ -4,18 +4,18 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @f0(ptr %a0, ...) #0 {
+define void @f0(ptr %a0, ..., i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b2, %b0
-  br i1 undef, label %b2, label %b3
+  br i1 %c1, label %b2, label %b3
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b4, label %b5
+  br i1 %c2, label %b4, label %b5
 
 b4:                                               ; preds = %b3
   br label %b5
@@ -24,15 +24,15 @@
   br label %b6
 
 b6:                                               ; preds = %b12, %b5
-  br i1 undef, label %b9, label %b7
+  br i1 %c3, label %b9, label %b7
 
 b7:                                               ; preds = %b6
   %v0 = load i8, ptr undef, align 1, !tbaa !0
   %v1 = zext i8 %v0 to i32
-  br i1 undef, label %b9, label %b8
+  br i1 %c4, label %b9, label %b8
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b9, label %b10
+  br i1 %c5, label %b9, label %b10
 
 b9:                                               ; preds = %b8, %b7, %b6
   br label %b10
@@ -48,16 +48,16 @@
   unreachable
 
 b12:                                              ; preds = %b10
-  br i1 undef, label %b13, label %b6
+  br i1 %c6, label %b13, label %b6
 
 b13:                                              ; preds = %b12
   br label %b14
 
 b14:                                              ; preds = %b15, %b13
-  br i1 undef, label %b16, label %b15
+  br i1 %c7, label %b16, label %b15
 
 b15:                                              ; preds = %b14
-  br i1 undef, label %b14, label %b16
+  br i1 %c8, label %b14, label %b16
 
 b16:                                              ; preds = %b15, %b14
   br label %b17
diff --git a/llvm/test/CodeGen/Hexagon/bug31839.ll b/llvm/test/CodeGen/Hexagon/bug31839.ll
--- a/llvm/test/CodeGen/Hexagon/bug31839.ll
+++ b/llvm/test/CodeGen/Hexagon/bug31839.ll
@@ -3,10 +3,10 @@
 
 ; Check for successful compilation.
 
-define ptr @f0(i32 %a0, i32 %a1) {
+define ptr @f0(i32 %a0, i32 %a1, i1 %c0) {
 b0:
   %v0 = call noalias ptr @f1(i32 undef, i32 undef)
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v1 = ptrtoint ptr %v0 to i32
diff --git a/llvm/test/CodeGen/Hexagon/call-ret-i1.ll b/llvm/test/CodeGen/Hexagon/call-ret-i1.ll
--- a/llvm/test/CodeGen/Hexagon/call-ret-i1.ll
+++ b/llvm/test/CodeGen/Hexagon/call-ret-i1.ll
@@ -6,9 +6,9 @@
 
 %returntype = type { i1, i32 }
 
-define i32 @test(ptr %a0, ptr %a1, ptr %a2) #0 {
+define i32 @test(ptr %a0, ptr %a1, ptr %a2, i1 %c0) #0 {
 b3:
-  br i1 undef, label %b6, label %b4
+  br i1 %c0, label %b6, label %b4
 
 b4:                                               ; preds = %b3
   %v5 = call %returntype @foo(ptr nonnull undef, ptr %a2, ptr %a0) #0
diff --git a/llvm/test/CodeGen/Hexagon/callR_noreturn.ll b/llvm/test/CodeGen/Hexagon/callR_noreturn.ll
--- a/llvm/test/CodeGen/Hexagon/callR_noreturn.ll
+++ b/llvm/test/CodeGen/Hexagon/callR_noreturn.ll
@@ -5,9 +5,9 @@
 %s.1 = type { [1 x %s.2], i32, [4 x i8] }
 %s.2 = type { [16 x i32] }
 
-define hidden void @f0(ptr %a0) #0 {
+define hidden void @f0(ptr %a0, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/cfgopt-fall-through.ll b/llvm/test/CodeGen/Hexagon/cfgopt-fall-through.ll
--- a/llvm/test/CodeGen/Hexagon/cfgopt-fall-through.ll
+++ b/llvm/test/CodeGen/Hexagon/cfgopt-fall-through.ll
@@ -5,18 +5,18 @@
 ; CHECK: jumpr r31
 
 
-define i32 @fred(i32 %a0, i8 zeroext %a1) local_unnamed_addr #0 {
+define i32 @fred(i32 %a0, i8 zeroext %a1, i1 %c0, i1 %c1, i1 %c2, i1 %c3) local_unnamed_addr #0 {
 b2:
-  br i1 undef, label %b4, label %b3
+  br i1 %c0, label %b4, label %b3
 
 b3:                                               ; preds = %b2
   unreachable
 
 b4:                                               ; preds = %b2
-  br i1 undef, label %b19, label %b5
+  br i1 %c1, label %b19, label %b5
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b6, label %b12
+  br i1 %c2, label %b6, label %b12
 
 b6:                                               ; preds = %b5
   switch i8 %a1, label %b17 [
@@ -30,7 +30,7 @@
   unreachable
 
 b8:                                               ; preds = %b6
-  br i1 undef, label %b11, label %b9
+  br i1 %c3, label %b11, label %b9
 
 b9:                                               ; preds = %b8
   %v10 = or i32 undef, 0
diff --git a/llvm/test/CodeGen/Hexagon/cmp-extend.ll b/llvm/test/CodeGen/Hexagon/cmp-extend.ll
--- a/llvm/test/CodeGen/Hexagon/cmp-extend.ll
+++ b/llvm/test/CodeGen/Hexagon/cmp-extend.ll
@@ -12,7 +12,7 @@
 ; CHECK-NOT: zxth
 
 ; Function Attrs: nounwind
-define void @core_bench_list(ptr %res) #0 {
+define void @core_bench_list(ptr %res, i1 %c0) #0 {
 entry:
   %seed3 = getelementptr inbounds %struct.RESULTS_S.A, ptr %res, i32 0, i32 2
   %0 = load i16, ptr %seed3, align 2
@@ -21,7 +21,7 @@
 
 for.body:
   %i.0370 = phi i16 [ %inc50, %if.then ], [ 0, %entry ]
-  br i1 undef, label %if.then, label %while.body.i273
+  br i1 %c0, label %if.then, label %while.body.i273
 
 while.body.i273:
   %tobool.i272 = icmp eq ptr undef, null
diff --git a/llvm/test/CodeGen/Hexagon/const-pool-tf.ll b/llvm/test/CodeGen/Hexagon/const-pool-tf.ll
--- a/llvm/test/CodeGen/Hexagon/const-pool-tf.ll
+++ b/llvm/test/CodeGen/Hexagon/const-pool-tf.ll
@@ -6,9 +6,9 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @hex_h.s0.__outermost(i32 %h.stride.114) #0 {
+define void @hex_h.s0.__outermost(i32 %h.stride.114, i1 %c0) #0 {
 entry:
-  br i1 undef, label %"for h.s0.y.preheader", label %call_destructor.exit, !prof !1
+  br i1 %c0, label %"for h.s0.y.preheader", label %call_destructor.exit, !prof !1
 
 call_destructor.exit:                             ; preds = %entry
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll b/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll
--- a/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll
+++ b/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll
@@ -11,7 +11,7 @@
 
 target triple = "hexagon"
 
-define void @fred(ptr nocapture %a0, ptr nocapture %a1, ptr nocapture %a2, i16 signext %a3, ptr %a4, i16 signext %a5, i16 signext %a6, i16 signext %a7, i32 %a8, i16 signext %a9, i16 signext %a10) local_unnamed_addr #0 {
+define void @fred(ptr nocapture %a0, ptr nocapture %a1, ptr nocapture %a2, i16 signext %a3, ptr %a4, i16 signext %a5, i16 signext %a6, i16 signext %a7, i32 %a8, i16 signext %a9, i16 signext %a10, i1 %c0, i1 %c1) local_unnamed_addr #0 {
 b11:
   %v12 = sext i16 %a5 to i32
   %v13 = tail call i32 @llvm.hexagon.A2.sxth(i32 %v12)
@@ -66,7 +66,7 @@
   store i16 %a7, ptr %a2, align 2
   %v56 = sext i16 %a9 to i32
   %v57 = call i32 @llvm.hexagon.A2.sxth(i32 %v56)
-  br i1 undef, label %b58, label %b62
+  br i1 %c0, label %b58, label %b62
 
 b58:                                              ; preds = %b11
   %v59 = call i32 @llvm.hexagon.A2.add(i32 %v57, i32 %v52)
@@ -84,7 +84,7 @@
   br i1 %v65, label %b66, label %b67
 
 b66:                                              ; preds = %b63
-  br i1 undef, label %b67, label %b68
+  br i1 %c1, label %b67, label %b68
 
 b67:                                              ; preds = %b66, %b63
   store i16 0, ptr %a2, align 2
diff --git a/llvm/test/CodeGen/Hexagon/csr-func-usedef.ll b/llvm/test/CodeGen/Hexagon/csr-func-usedef.ll
--- a/llvm/test/CodeGen/Hexagon/csr-func-usedef.ll
+++ b/llvm/test/CodeGen/Hexagon/csr-func-usedef.ll
@@ -6,7 +6,7 @@
 declare ptr @llvm.hexagon.circ.ldb(ptr, ptr, i32, i32) #1
 declare ptr @llvm.hexagon.circ.stb(ptr, i32, i32, i32) #1
 
-define zeroext i8 @circular_loop_test10(ptr %A, ptr %B, i32 %x, i32 %y, i32 %z, i32 %w) #0 {
+define zeroext i8 @circular_loop_test10(ptr %A, ptr %B, i32 %x, i32 %y, i32 %z, i32 %w, i1 %c0, i1 %c1) #0 {
 entry:
   %element_load0 = alloca i8, align 1
   %element_load2 = alloca i8, align 1
@@ -52,7 +52,7 @@
 
 for.body23:                                       ; preds = %for.body23, %for.body
   %11 = call ptr @llvm.hexagon.circ.stb(ptr undef, i32 undef, i32 %or, i32 3)
-  br i1 undef, label %for.body34, label %for.body23
+  br i1 %c0, label %for.body34, label %for.body23
 
 for.body34:                                       ; preds = %for.body34, %for.body23
   %element_load.173 = phi i32 [ %add38, %for.body34 ], [ %add18, %for.body23 ]
@@ -60,7 +60,7 @@
   %conv36 = zext i8 %12 to i32
   %conv37 = and i32 %element_load.173, 255
   %add38 = add nuw nsw i32 %conv36, %conv37
-  br i1 undef, label %for.end42, label %for.body34
+  br i1 %c1, label %for.end42, label %for.body34
 
 for.end42:                                        ; preds = %for.body34
   %conv39 = trunc i32 %add38 to i8
diff --git a/llvm/test/CodeGen/Hexagon/dag-indexed.ll b/llvm/test/CodeGen/Hexagon/dag-indexed.ll
--- a/llvm/test/CodeGen/Hexagon/dag-indexed.ll
+++ b/llvm/test/CodeGen/Hexagon/dag-indexed.ll
@@ -6,7 +6,7 @@
 ; in DAGCombiner is unable to convert indexed stores.
 
 ; Function Attrs: nounwind
-define void @f0(i32 %a0, ptr %a1, ptr %a2) #0 {
+define void @f0(i32 %a0, ptr %a1, ptr %a2, i1 %c0, i1 %c1) #0 {
 b0:
   switch i32 %a0, label %b5 [
     i32 67830273, label %b1
@@ -14,13 +14,13 @@
   ]
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b5
+  br i1 %c0, label %b2, label %b5
 
 b2:                                               ; preds = %b1
   br label %b5
 
 b3:                                               ; preds = %b0
-  br i1 undef, label %b4, label %b5
+  br i1 %c1, label %b4, label %b5
 
 b4:                                               ; preds = %b3
   store i32 0, ptr %a2, align 1, !tbaa !0
diff --git a/llvm/test/CodeGen/Hexagon/def-undef-deps.ll b/llvm/test/CodeGen/Hexagon/def-undef-deps.ll
--- a/llvm/test/CodeGen/Hexagon/def-undef-deps.ll
+++ b/llvm/test/CodeGen/Hexagon/def-undef-deps.ll
@@ -25,14 +25,14 @@
 
 declare void @f0(ptr, i32, i32, i32, i32, i32)
 
-define void @f1(i8 zeroext %a0, ptr nocapture %a1, i8 zeroext %a2, i8 zeroext %a3) #0 {
+define void @f1(i8 zeroext %a0, ptr nocapture %a1, i8 zeroext %a2, i8 zeroext %a3, i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
   %v0 = getelementptr inbounds %1, ptr %a1, i32 0, i32 1, i32 9
   %v1 = load i8, ptr %v0, align 1
   %v2 = zext i8 %v1 to i32
   %v3 = getelementptr inbounds %1, ptr %a1, i32 0, i32 2, i32 %v2
   %v4 = tail call ptr @f2(i32 undef, i8 zeroext 0)
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   %v5 = tail call i32 @llvm.hexagon.M2.mpy.up(i32 undef, i32 undef)
@@ -43,7 +43,7 @@
   %v10 = lshr i64 %v9, 5
   %v11 = trunc i64 %v10 to i32
   store i32 %v11, ptr undef, align 4
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b2:                                               ; preds = %b1
   store i32 0, ptr %v3, align 4
@@ -57,7 +57,7 @@
   unreachable
 
 b5:                                               ; preds = %b0
-  br i1 undef, label %b6, label %b7
+  br i1 %c2, label %b6, label %b7
 
 b6:                                               ; preds = %b5
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/early-if-vecpred.ll b/llvm/test/CodeGen/Hexagon/early-if-vecpred.ll
--- a/llvm/test/CodeGen/Hexagon/early-if-vecpred.ll
+++ b/llvm/test/CodeGen/Hexagon/early-if-vecpred.ll
@@ -12,10 +12,10 @@
 ; CHECK: q{{[0-3]}} = not
 ; CHECK: LBB
 ; CHECK: if (q{{[0-3]}}) vmem
-define void @fred(i32 %a0) #0 {
+define void @fred(i32 %a0, i1 %c0) #0 {
 b1:
   %v2 = tail call <128 x i1> @llvm.hexagon.V6.pred.scalar2.128B(i32 %a0) #2
-  br i1 undef, label %b3, label %b5
+  br i1 %c0, label %b3, label %b5
 
 b3:                                               ; preds = %b1
   %v4 = tail call <128 x i1> @llvm.hexagon.V6.pred.not.128B(<128 x i1> %v2) #2
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-copy-lis.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-copy-lis.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-copy-lis.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-copy-lis.ll
@@ -7,7 +7,7 @@
 ; into a copy. When this occurs, the pass needs to update the liveness
 ; information for the predicate register, which is removed.
 
-define void @f0(i32 %a0) unnamed_addr {
+define void @f0(i32 %a0, i1 %c0) unnamed_addr {
 b0:
   %v0 = or i32 undef, %a0
   %v1 = or i32 undef, %v0
@@ -21,7 +21,7 @@
   %v6 = select i1 %v5, i32 %v1, i32 %v3
   %v7 = shl i32 %v6, 8
   %v8 = add i32 0, %v7
-  br i1 undef, label %b2, label %b3
+  br i1 %c0, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   store i32 %v8, ptr undef, align 4
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-dead-bad.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-dead-bad.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-dead-bad.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-dead-bad.ll
@@ -7,7 +7,7 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @fred() local_unnamed_addr #0 {
+define void @fred(i1 %c0) local_unnamed_addr #0 {
 b0:
   %v1 = load i32, ptr undef, align 4
   %v2 = and i32 %v1, 603979776
@@ -22,7 +22,7 @@
 
 b5:                                               ; preds = %b0
   %v6 = load i32, ptr undef, align 4
-  br i1 undef, label %b7, label %b8
+  br i1 %c0, label %b7, label %b8
 
 b7:                                               ; preds = %b5
   br label %b9
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-dead.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-dead.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-dead.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-dead.ll
@@ -7,7 +7,7 @@
 ; definition that is really dead. The removal of the dead flag causes an assert
 ; in the Machine Scheduler when querying live interval information.
 
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   br label %b1
 
@@ -38,7 +38,7 @@
   br i1 %v18, label %b3, label %b2
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b1, label %b4
+  br i1 %c0, label %b1, label %b4
 
 b4:                                               ; preds = %b3
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-extend.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-extend.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-extend.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-extend.ll
@@ -6,7 +6,7 @@
 
 target triple = "hexagon"
 
-define void @fred() local_unnamed_addr #0 {
+define void @fred(i1 %c0, i1 %c1, i1 %c2, i1 %c3) local_unnamed_addr #0 {
 entry:
   %0 = load i64, ptr undef, align 8
   %shr.i465 = lshr i64 %0, 48
@@ -28,13 +28,13 @@
 if.end36:                                         ; preds = %if.end26
   %or.i335 = or i64 undef, undef
   %shl2.i322 = or i64 undef, -9223372036854775808
-  br i1 undef, label %if.then44, label %lor.rhs.i
+  br i1 %c0, label %if.then44, label %lor.rhs.i
 
 lor.rhs.i:                                        ; preds = %if.end36
   br label %le128.exit
 
 le128.exit:                                       ; preds = %lor.rhs.i
-  br i1 undef, label %if.then44, label %while.cond.preheader
+  br i1 %c1, label %if.then44, label %while.cond.preheader
 
 if.then44:                                        ; preds = %le128.exit, %if.end36
   %conv42544 = phi i64 [ 0, %le128.exit ], [ 1, %if.end36 ]
@@ -43,7 +43,7 @@
 while.cond.preheader:                             ; preds = %if.then44, %le128.exit
   %aSig0.3.ph = phi i64 [ undef, %if.then44 ], [ %or.i335, %le128.exit ]
   %q.0.ph = phi i64 [ %conv42544, %if.then44 ], [ 0, %le128.exit ]
-  br i1 undef, label %while.body.lr.ph, label %while.end
+  br i1 %c2, label %while.body.lr.ph, label %while.end
 
 while.body.lr.ph:                                 ; preds = %while.cond.preheader
   %shr.i263 = lshr i64 %shl2.i322, 32
@@ -86,7 +86,7 @@
 while.end:                                        ; preds = %while.end.loopexit, %while.cond.preheader
   %aSig0.3.lcssa = phi i64 [ %aSig0.3.ph, %while.cond.preheader ], [ %sub3.i205, %while.end.loopexit ]
   %q.0.lcssa = phi i64 [ %q.0.ph, %while.cond.preheader ], [ %cond, %while.end.loopexit ]
-  br i1 undef, label %if.then56, label %if.else71
+  br i1 %c3, label %if.then56, label %if.else71
 
 if.then56:                                        ; preds = %while.end
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-undef.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-undef.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-undef.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-undef.ll
@@ -5,13 +5,13 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind optsize ssp
-define internal fastcc void @foo() nounwind {
+define internal fastcc void @foo(i1 %c0) nounwind {
 if.else473:
   %0 = load i64, ptr undef, align 8
   %sub = sub nsw i64 undef, %0
   %conv476 = sitofp i64 %sub to double
   %mul477 = fmul double %conv476, 0x3F50624DE0000000
-  br i1 undef, label %cond.true540, label %cond.end548
+  br i1 %c0, label %cond.true540, label %cond.end548
 
 cond.true540:
   %1 = fptrunc double %mul477 to float
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-undef2.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-undef2.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-undef2.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-undef2.ll
@@ -5,15 +5,15 @@
 ; attempting to shrink a live interval incorrectly.
 
 
-define void @test() #0 {
+define void @test(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 entry:
-  br i1 undef, label %cleanup, label %if.end
+  br i1 %c0, label %cleanup, label %if.end
 
 if.end:
   %0 = load i32, ptr undef, align 4
   %sext = shl i32 %0, 16
   %conv19 = ashr exact i32 %sext, 16
-  br i1 undef, label %cleanup, label %for.body.lr.ph
+  br i1 %c1, label %cleanup, label %for.body.lr.ph
 
 for.body.lr.ph:
   br label %for.body
@@ -27,10 +27,10 @@
   unreachable
 
 for.cond90.preheader:
-  br i1 undef, label %early_termination, label %for.body97
+  br i1 %c2, label %early_termination, label %for.body97
 
 for.body97:
-  br i1 undef, label %for.body97, label %early_termination
+  br i1 %c3, label %for.body97, label %early_termination
 
 early_termination:
   %.sink = select i1 undef, i16 undef, i16 %bestScoreL16Q4.0278
diff --git a/llvm/test/CodeGen/Hexagon/expand-condsets-undefvni.ll b/llvm/test/CodeGen/Hexagon/expand-condsets-undefvni.ll
--- a/llvm/test/CodeGen/Hexagon/expand-condsets-undefvni.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-condsets-undefvni.ll
@@ -5,7 +5,7 @@
 
 target triple = "hexagon"
 
-define i64 @fred(i64 %a0, i64 %a1) local_unnamed_addr #0 {
+define i64 @fred(i64 %a0, i64 %a1, i1 %c0, i1 %c1, i1 %c2) local_unnamed_addr #0 {
 b2:
   %v3 = lshr i64 %a1, 52
   %v4 = trunc i64 %v3 to i11
@@ -15,18 +15,18 @@
   ]
 
 b5:                                               ; preds = %b2
-  br i1 undef, label %b13, label %b6
+  br i1 %c0, label %b13, label %b6
 
 b6:                                               ; preds = %b5
   %v7 = or i64 %a1, 2251799813685248
-  br i1 undef, label %b8, label %b10
+  br i1 %c1, label %b8, label %b10
 
 b8:                                               ; preds = %b6
   %v9 = select i1 undef, i64 %v7, i64 undef
   br label %b16
 
 b10:                                              ; preds = %b6
-  br i1 undef, label %b16, label %b11
+  br i1 %c2, label %b16, label %b11
 
 b11:                                              ; preds = %b10
   %v12 = select i1 undef, i64 undef, i64 %v7
diff --git a/llvm/test/CodeGen/Hexagon/expand-vstorerw-undef2.ll b/llvm/test/CodeGen/Hexagon/expand-vstorerw-undef2.ll
--- a/llvm/test/CodeGen/Hexagon/expand-vstorerw-undef2.ll
+++ b/llvm/test/CodeGen/Hexagon/expand-vstorerw-undef2.ll
@@ -2,7 +2,6 @@
 ; REQUIRES: asserts
 
 ; Dead defs may still appear live in LivePhysRegs, leading to an expansion
-; of a double-vector store that uses an undefined source register.
 
 target triple = "hexagon-unknown--elf"
 
@@ -29,9 +28,9 @@
 declare <64 x i32> @llvm.hexagon.V6.vmpyuh.acc.128B(<64 x i32>, <32 x i32>, i32) #1
 declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #1
 
-define hidden void @fred() #0 {
+define hidden void @fred(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   ret void
@@ -44,15 +43,15 @@
   br label %b11
 
 b11:                                              ; preds = %b11, %b2
-  br i1 undef, label %b12, label %b11
+  br i1 %c1, label %b12, label %b11
 
 b12:                                              ; preds = %b11
-  br i1 undef, label %b16, label %b13
+  br i1 %c2, label %b16, label %b13
 
 b13:                                              ; preds = %b12
   %v14 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> zeroinitializer) #2
   %v15 = tail call <32 x i32> @llvm.hexagon.V6.vasrwh.128B(<32 x i32> undef, <32 x i32> %v14, i32 1) #2
-  br i1 undef, label %b19, label %b17
+  br i1 %c3, label %b19, label %b17
 
 b16:                                              ; preds = %b12
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/find-loop-instr.ll b/llvm/test/CodeGen/Hexagon/find-loop-instr.ll
--- a/llvm/test/CodeGen/Hexagon/find-loop-instr.ll
+++ b/llvm/test/CodeGen/Hexagon/find-loop-instr.ll
@@ -10,12 +10,12 @@
 target triple = "hexagon"
 
 ; Function Attrs: norecurse
-define void @fred() local_unnamed_addr #0 align 2 {
+define void @fred(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) local_unnamed_addr #0 align 2 {
 b0:
   br label %b7
 
 b1:                                               ; preds = %b9
-  br i1 undef, label %b4, label %b2
+  br i1 %c0, label %b4, label %b2
 
 b2:                                               ; preds = %b1
   %v3 = sub i32 undef, undef
@@ -23,13 +23,13 @@
 
 b4:                                               ; preds = %b2, %b1
   %v5 = phi i32 [ undef, %b1 ], [ %v3, %b2 ]
-  br i1 undef, label %b14, label %b6
+  br i1 %c1, label %b14, label %b6
 
 b6:                                               ; preds = %b4
   br label %b10
 
 b7:                                               ; preds = %b0
-  br i1 undef, label %b9, label %b8
+  br i1 %c2, label %b9, label %b8
 
 b8:                                               ; preds = %b7
   unreachable
@@ -39,7 +39,7 @@
 
 b10:                                              ; preds = %b21, %b6
   %v11 = phi i32 [ %v22, %b21 ], [ %v5, %b6 ]
-  br i1 undef, label %b21, label %b12
+  br i1 %c3, label %b21, label %b12
 
 b12:                                              ; preds = %b10
   br label %b15
@@ -51,7 +51,7 @@
   ret void
 
 b15:                                              ; preds = %b12
-  br i1 undef, label %b16, label %b17
+  br i1 %c4, label %b16, label %b17
 
 b16:                                              ; preds = %b15
   store i32 0, ptr undef, align 4
@@ -61,7 +61,7 @@
   br label %b18
 
 b18:                                              ; preds = %b17
-  br i1 undef, label %b19, label %b20
+  br i1 %c5, label %b19, label %b20
 
 b19:                                              ; preds = %b18
   br label %b21
diff --git a/llvm/test/CodeGen/Hexagon/find-loop.ll b/llvm/test/CodeGen/Hexagon/find-loop.ll
--- a/llvm/test/CodeGen/Hexagon/find-loop.ll
+++ b/llvm/test/CodeGen/Hexagon/find-loop.ll
@@ -8,11 +8,11 @@
 @g0 = external global i32
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
   %v0 = alloca i64, align 8
   %v2 = load i32, ptr @g0, align 4
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v3 = phi i32 [ %v4, %b1 ], [ 64, %b0 ]
@@ -24,7 +24,7 @@
   br label %b4
 
 b3:                                               ; preds = %b4
-  br i1 undef, label %b4, label %b2
+  br i1 %c1, label %b4, label %b2
 
 b4:                                               ; preds = %b3, %b2
   %v6 = icmp slt i32 undef, 1
diff --git a/llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll b/llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll
--- a/llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll
+++ b/llvm/test/CodeGen/Hexagon/frame-offset-overflow.ll
@@ -11,7 +11,7 @@
 
 target triple = "hexagon"
 
-define void @fred(ptr noalias nocapture readonly %p0, i32 %p1, i32 %p2, ptr noalias nocapture %p3, i32 %p4) local_unnamed_addr #1 {
+define void @fred(ptr noalias nocapture readonly %p0, i32 %p1, i32 %p2, ptr noalias nocapture %p3, i32 %p4, i1 %c0) local_unnamed_addr #1 {
 entry:
   %mul = mul i32 %p4, %p1
   %add.ptr = getelementptr inbounds i16, ptr %p0, i32 %mul
@@ -28,7 +28,7 @@
   %incdec.ptr16 = getelementptr inbounds i16, ptr %p0, i32 32
   %incdec.ptr15 = getelementptr inbounds i16, ptr %add.ptr2, i32 32
   %incdec.ptr = getelementptr inbounds i16, ptr %add.ptr, i32 32
-  br i1 undef, label %for.end.loopexit.unr-lcssa, label %for.body
+  br i1 %c0, label %for.end.loopexit.unr-lcssa, label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %optr.0102 = phi ptr [ %incdec.ptr24.3, %for.body ], [ %p3, %entry ]
diff --git a/llvm/test/CodeGen/Hexagon/getBlockAddress.ll b/llvm/test/CodeGen/Hexagon/getBlockAddress.ll
--- a/llvm/test/CodeGen/Hexagon/getBlockAddress.ll
+++ b/llvm/test/CodeGen/Hexagon/getBlockAddress.ll
@@ -2,7 +2,7 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   call void @f1(ptr blockaddress(@f0, %b1))
   br label %b1
@@ -11,7 +11,7 @@
   ret void
 
 b2:                                               ; No predecessors!
-  indirectbr ptr undef, [label %b1]
+  indirectbr ptr %c0, [label %b1]
 }
 
 declare void @f1(...)
diff --git a/llvm/test/CodeGen/Hexagon/hexagon-tfr-add.ll b/llvm/test/CodeGen/Hexagon/hexagon-tfr-add.ll
--- a/llvm/test/CodeGen/Hexagon/hexagon-tfr-add.ll
+++ b/llvm/test/CodeGen/Hexagon/hexagon-tfr-add.ll
@@ -90,7 +90,7 @@
 ; but check for sane output anyway.
 ; CHECK-ADDI: ##g0
 ; Function Attrs: nounwind optsize ssp
-define zeroext i8 @f3() #2 {
+define zeroext i8 @f3(i1 %c0, i1 %c1, i1 %c2) #2 {
 b0:
   %v0 = load i8, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 57), align 2
   %v1 = icmp eq i8 %v0, 0
@@ -102,7 +102,7 @@
 
 b2:                                               ; preds = %b0
   %v2 = call zeroext i8 @f1(ptr nonnull undef) #4
-  br i1 undef, label %b3, label %b8
+  br i1 %c0, label %b3, label %b8
 
 b3:                                               ; preds = %b2
   %v3 = load i8, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 1), align 1
@@ -129,13 +129,13 @@
   unreachable
 
 b8:                                               ; preds = %b2
-  br i1 undef, label %b9, label %b10
+  br i1 %c1, label %b9, label %b10
 
 b9:                                               ; preds = %b8
   unreachable
 
 b10:                                              ; preds = %b8
-  br i1 undef, label %b12, label %b11
+  br i1 %c2, label %b12, label %b11
 
 b11:                                              ; preds = %b10
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_invalid.ll b/llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_invalid.ll
--- a/llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_invalid.ll
+++ b/llvm/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_invalid.ll
@@ -4,10 +4,10 @@
 
 ; CHECK-NOT: extract.h.hexagon.vlcr
 
-define dso_local void @test() local_unnamed_addr #0 {
+define dso_local void @test(i1 %c0) local_unnamed_addr #0 {
 entry:
   %0 = tail call <64 x i32> @llvm.hexagon.V6.vunpackuh.128B(<32 x i32> undef)
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.body:
   %a = phi <64 x i32> [ %1, %for.body ], [ %0, %entry ]
diff --git a/llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll b/llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll
--- a/llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll
+++ b/llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll
@@ -6,9 +6,9 @@
 
 target triple = "hexagon"
 
-define dso_local void @f0() local_unnamed_addr #0 {
+define dso_local void @f0(i1 %c0) local_unnamed_addr #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v0 = load i8, ptr undef, align 1
diff --git a/llvm/test/CodeGen/Hexagon/hvx-loopidiom-memcpy.ll b/llvm/test/CodeGen/Hexagon/hvx-loopidiom-memcpy.ll
--- a/llvm/test/CodeGen/Hexagon/hvx-loopidiom-memcpy.ll
+++ b/llvm/test/CodeGen/Hexagon/hvx-loopidiom-memcpy.ll
@@ -7,9 +7,9 @@
 
 %s.0 = type { i32 }
 
-define void @f0(ptr noalias %a0, ptr noalias %a1) #0 align 2 {
+define void @f0(ptr noalias %a0, ptr noalias %a1, i1 %c0, i1 %c1) #0 align 2 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ]
@@ -19,7 +19,7 @@
   %v5 = load <64 x i32>, ptr %v2, align 256
   store <64 x i32> %v5, ptr %v3, align 256
   %v7 = add nuw nsw i32 %v0, 1
-  br i1 undef, label %b1, label %b2
+  br i1 %c1, label %b1, label %b2
 
 b2:                                               ; preds = %b1, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-ph-deadcode.ll b/llvm/test/CodeGen/Hexagon/hwloop-ph-deadcode.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-ph-deadcode.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-ph-deadcode.ll
@@ -7,9 +7,9 @@
 
 @g = external global i32
 
-define void @foo() #0 {
+define void @foo(i1 %c0) #0 {
 entry:
-  br i1 undef, label %if.end38, label %for.body
+  br i1 %c0, label %if.end38, label %for.body
 
 for.body:
   %loopIdx.051 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-phi-subreg.ll b/llvm/test/CodeGen/Hexagon/hwloop-phi-subreg.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-phi-subreg.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-phi-subreg.ll
@@ -5,7 +5,7 @@
 ; new preheader is created in the Hardware Loop pass.
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
   br label %b2
 
@@ -33,10 +33,10 @@
   %v20 = add nsw i64 %v19, 0
   %v21 = lshr i64 %v20, 32
   %v22 = trunc i64 %v21 to i32
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b2:                                               ; preds = %b5, %b0
-  br i1 undef, label %b1, label %b4
+  br i1 %c1, label %b1, label %b4
 
 b3:                                               ; preds = %b1
   br i1 false, label %b5, label %b4
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-preheader.ll
@@ -5,9 +5,9 @@
 ; we generate an invalid hardware loop.
 
 ; Function Attrs: nounwind readonly
-define void @test(i16 signext %n) #0 {
+define void @test(i16 signext %n, i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %for.cond4.preheader.preheader.split.us, label %for.end22
+  br i1 %c0, label %for.cond4.preheader.preheader.split.us, label %for.end22
 
 for.cond4.preheader.preheader.split.us:
   %0 = sext i16 %n to i32
@@ -22,7 +22,7 @@
 
 for.body9.preheader.us:
   %i.030.us.pmt = phi i32 [ %inc21.us.pmt, %for.end.loopexit.us ], [ 0, %for.cond4.preheader.preheader.split.us ]
-  br i1 undef, label %for.body9.us, label %for.body9.us.ur
+  br i1 %c1, label %for.body9.us, label %for.body9.us.ur
 
 for.body9.us.ur:
   %exitcond.ur.old = icmp eq i16 undef, %n
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-subreg.ll b/llvm/test/CodeGen/Hexagon/hwloop-subreg.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-subreg.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-subreg.ll
@@ -4,14 +4,14 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind optsize readonly
-define void @f0() #0 align 2 {
+define void @f0(i1 %c0) #0 align 2 {
 b0:
   %v0 = load i32, ptr undef, align 8
   %v1 = zext i32 %v0 to i64
   %v2 = add nuw nsw i64 %v1, 63
   %v3 = lshr i64 %v2, 6
   %v4 = trunc i64 %v3 to i32
-  br i1 undef, label %b3, label %b1
+  br i1 %c0, label %b3, label %b1
 
 b1:                                               ; preds = %b0
   %v5 = add nsw i32 %v4, -1
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-swap.ll b/llvm/test/CodeGen/Hexagon/hwloop-swap.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-swap.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-swap.ll
@@ -7,12 +7,12 @@
 ; CHECK: cmpb.gtu([[REG0:r[0-9]+]]
 ; CHECK: [[REG0]] = add([[REG0]],
 
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b2:                                               ; preds = %b2, %b1
   %v0 = phi i32 [ %v3, %b2 ], [ undef, %b1 ]
diff --git a/llvm/test/CodeGen/Hexagon/hwloop-wrap2.ll b/llvm/test/CodeGen/Hexagon/hwloop-wrap2.ll
--- a/llvm/test/CodeGen/Hexagon/hwloop-wrap2.ll
+++ b/llvm/test/CodeGen/Hexagon/hwloop-wrap2.ll
@@ -12,17 +12,17 @@
 @pairArray = external global ptr
 @carray = external global ptr
 
-define void @test() #0 {
+define void @test(i1 %c0, i1 %c1, i1 %c2) #0 {
 entry:
   %0 = load ptr, ptr @pairArray, align 4
   %1 = load ptr, ptr @carray, align 4
-  br i1 undef, label %for.end110, label %for.body
+  br i1 %c0, label %for.end110, label %for.body
 
 for.body:
   %row.0199 = phi i32 [ %inc109, %for.inc108 ], [ 1, %entry ]
   %arrayidx = getelementptr inbounds ptr, ptr %0, i32 %row.0199
   %2 = load ptr, ptr %arrayidx, align 4
-  br i1 undef, label %for.body48, label %for.inc108
+  br i1 %c1, label %for.body48, label %for.inc108
 
 for.cond45:
   %cmp46 = icmp sgt i32 %dec58, 0
@@ -60,7 +60,7 @@
 
 for.inc108:
   %inc109 = add nsw i32 %row.0199, 1
-  br i1 undef, label %for.body, label %for.end110
+  br i1 %c2, label %for.body, label %for.end110
 
 for.end110:
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/ignore-terminal-mbb.ll b/llvm/test/CodeGen/Hexagon/ignore-terminal-mbb.ll
--- a/llvm/test/CodeGen/Hexagon/ignore-terminal-mbb.ll
+++ b/llvm/test/CodeGen/Hexagon/ignore-terminal-mbb.ll
@@ -6,16 +6,16 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   store i32 0, ptr undef, align 4, !tbaa !0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b4, label %b3
+  br i1 %c1, label %b4, label %b3
 
 b3:                                               ; preds = %b2
   %v0 = or i32 undef, 2048
diff --git a/llvm/test/CodeGen/Hexagon/invalid-memrefs.ll b/llvm/test/CodeGen/Hexagon/invalid-memrefs.ll
--- a/llvm/test/CodeGen/Hexagon/invalid-memrefs.ll
+++ b/llvm/test/CodeGen/Hexagon/invalid-memrefs.ll
@@ -1,6 +1,5 @@
 ; RUN: llc -O2 -march=hexagon -hexagon-expand-condsets=0 < %s
 ; REQUIRES: asserts
-; Disable expand-condsets because it will assert on undefined registers.
 
 target triple = "hexagon-unknown--elf"
 
@@ -10,33 +9,33 @@
 @g0 = external global %s.0, align 4
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12) #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b26, label %b3
+  br i1 %c1, label %b26, label %b3
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b6, label %b4
+  br i1 %c2, label %b6, label %b4
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b5, label %b26
+  br i1 %c3, label %b5, label %b26
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b7, label %b26
+  br i1 %c4, label %b7, label %b26
 
 b6:                                               ; preds = %b3
   br label %b7
 
 b7:                                               ; preds = %b6, %b5
-  br i1 undef, label %b11, label %b8
+  br i1 %c5, label %b11, label %b8
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b10, label %b9
+  br i1 %c6, label %b10, label %b9
 
 b9:                                               ; preds = %b8
   unreachable
@@ -45,22 +44,22 @@
   unreachable
 
 b11:                                              ; preds = %b7
-  br i1 undef, label %b25, label %b12
+  br i1 %c7, label %b25, label %b12
 
 b12:                                              ; preds = %b11
-  br i1 undef, label %b14, label %b13
+  br i1 %c8, label %b14, label %b13
 
 b13:                                              ; preds = %b12
   br label %b14
 
 b14:                                              ; preds = %b13, %b12
-  br i1 undef, label %b15, label %b16
+  br i1 %c9, label %b15, label %b16
 
 b15:                                              ; preds = %b14
   br label %b16
 
 b16:                                              ; preds = %b15, %b14
-  br i1 undef, label %b18, label %b17
+  br i1 %c10, label %b18, label %b17
 
 b17:                                              ; preds = %b16
   unreachable
@@ -69,7 +68,7 @@
   %v0 = load ptr, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 1), align 4
   %v1 = load ptr, ptr @g0, align 4
   %v2 = select i1 undef, ptr %v0, ptr %v1
-  br i1 undef, label %b22, label %b19
+  br i1 %c11, label %b22, label %b19
 
 b19:                                              ; preds = %b18
   %v3 = load ptr, ptr undef, align 4
@@ -84,7 +83,7 @@
   br label %b22
 
 b22:                                              ; preds = %b21, %b18
-  br i1 undef, label %b24, label %b23
+  br i1 %c12, label %b24, label %b23
 
 b23:                                              ; preds = %b22
   store ptr %v2, ptr undef, align 4
diff --git a/llvm/test/CodeGen/Hexagon/is-legal-void.ll b/llvm/test/CodeGen/Hexagon/is-legal-void.ll
--- a/llvm/test/CodeGen/Hexagon/is-legal-void.ll
+++ b/llvm/test/CodeGen/Hexagon/is-legal-void.ll
@@ -10,9 +10,9 @@
 %struct.0 = type { ptr, i8, %union.anon.0 }
 %union.anon.0 = type { ptr }
 
-define hidden fastcc void @fred() unnamed_addr #0 {
+define hidden fastcc void @fred(i1 %c0) unnamed_addr #0 {
 entry:
-  br i1 undef, label %while.end, label %while.body.lr.ph
+  br i1 %c0, label %while.end, label %while.body.lr.ph
 
 while.body.lr.ph:                                 ; preds = %entry
   br label %while.body
diff --git a/llvm/test/CodeGen/Hexagon/isel-simplify-crash.ll b/llvm/test/CodeGen/Hexagon/isel-simplify-crash.ll
--- a/llvm/test/CodeGen/Hexagon/isel-simplify-crash.ll
+++ b/llvm/test/CodeGen/Hexagon/isel-simplify-crash.ll
@@ -7,10 +7,10 @@
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
-define void @fred(i16 signext %a0, ptr %a1, <32 x i16> %a3) #0 {
+define void @fred(i16 signext %a0, ptr %a1, <32 x i16> %a3, i1 %c0) #0 {
 b1:
   %v4 = add i16 undef, %a0
-  br i1 undef, label %b11, label %b5
+  br i1 %c0, label %b11, label %b5
 
 b5:                                               ; preds = %b1
   %v6 = insertelement <32 x i16> undef, i16 %v4, i32 0
diff --git a/llvm/test/CodeGen/Hexagon/isel-v3i16.ll b/llvm/test/CodeGen/Hexagon/isel-v3i16.ll
--- a/llvm/test/CodeGen/Hexagon/isel-v3i16.ll
+++ b/llvm/test/CodeGen/Hexagon/isel-v3i16.ll
@@ -8,7 +8,7 @@
 
 @g0 = external dllexport global ptr, align 4
 
-define hidden void @f0(i32 %a0, ptr %a1) #0 {
+define hidden void @f0(i32 %a0, ptr %a1, i1 %c0) #0 {
 b0:
   %v0 = load ptr, ptr @g0, align 4
   %v1 = call ptr %v0(i32 1, i32 %a0, i64 314646, i32 0, i32 16)
@@ -22,7 +22,7 @@
   br i1 %v2, label %b3, label %b1
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b4, label %b5
+  br i1 %c0, label %b4, label %b5
 
 b4:                                               ; preds = %b3
   %v3 = load <3 x i16>, ptr %a1, align 2
diff --git a/llvm/test/CodeGen/Hexagon/loop-idiom/lcssa.ll b/llvm/test/CodeGen/Hexagon/loop-idiom/lcssa.ll
--- a/llvm/test/CodeGen/Hexagon/loop-idiom/lcssa.ll
+++ b/llvm/test/CodeGen/Hexagon/loop-idiom/lcssa.ll
@@ -6,22 +6,22 @@
 ; which can invalidate LCSSA. Specifically, the uses of a LCSSA phi variable
 ; are replaced by the incoming value.
 
-define hidden void @test() local_unnamed_addr #0 {
+define hidden void @test(i1 %c0, i1 %c1, i1 %c2, i1 %c3) local_unnamed_addr #0 {
 entry:
   br label %if.then63
 
 if.then63:
-  br i1 undef, label %do.body311, label %if.end375
+  br i1 %c0, label %do.body311, label %if.end375
 
 do.body311:
-  br i1 undef, label %do.end318, label %do.body311
+  br i1 %c1, label %do.end318, label %do.body311
 
 do.end318:
-  br i1 undef, label %if.end322, label %if.end375
+  br i1 %c2, label %if.end322, label %if.end375
 
 if.end322:
   %sub325 = sub i32 undef, undef
-  br i1 undef, label %do.end329, label %do.body311
+  br i1 %c3, label %do.end329, label %do.body311
 
 do.end329:
   %sub325.lcssa = phi i32 [ %sub325, %if.end322 ]
diff --git a/llvm/test/CodeGen/Hexagon/loop-idiom/nullptr-crash.ll b/llvm/test/CodeGen/Hexagon/loop-idiom/nullptr-crash.ll
--- a/llvm/test/CodeGen/Hexagon/loop-idiom/nullptr-crash.ll
+++ b/llvm/test/CodeGen/Hexagon/loop-idiom/nullptr-crash.ll
@@ -4,9 +4,9 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @fred(i8 zeroext %L) #0 {
+define void @fred(i8 zeroext %L, i1 %c0, i1 %c1) #0 {
 entry:
-  br i1 undef, label %if.end53, label %while.body37
+  br i1 %c0, label %if.end53, label %while.body37
 
 while.body37:                                     ; preds = %while.body37, %entry
   %i.121 = phi i32 [ %inc46, %while.body37 ], [ 0, %entry ]
@@ -15,7 +15,7 @@
   %tobool40 = icmp eq i32 %and39, 0
   %inc46 = add nuw nsw i32 %i.121, 1
   %storemerge = select i1 %tobool40, i8 %L, i8 0
-  br i1 undef, label %while.body37, label %if.end53
+  br i1 %c1, label %while.body37, label %if.end53
 
 if.end53:                                         ; preds = %while.body37, %entry
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-long-loop.ll b/llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-long-loop.ll
--- a/llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-long-loop.ll
+++ b/llvm/test/CodeGen/Hexagon/loop-idiom/pmpy-long-loop.ll
@@ -7,12 +7,11 @@
 ; Instead of crashing, gracefully abort the simplification.
 ;
 ; Check for sane output.
-; CHECK: define void @fred
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
-define void @fred() unnamed_addr #0 {
+define void @fred(i1 %c0) unnamed_addr #0 {
 b0:
   %v1 = select i1 false, i32 undef, i32 2
   br label %b2
@@ -53,7 +52,7 @@
   %v35 = add nsw i32 %v34, 32768
   %v36 = icmp ult i32 %v35, 65536
   %v37 = select i1 %v36, i32 %v34, i32 undef
-  br i1 undef, label %b2, label %b38
+  br i1 %c0, label %b2, label %b38
 
 b38:                                              ; preds = %b2
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/machine-sink.ll b/llvm/test/CodeGen/Hexagon/machine-sink.ll
--- a/llvm/test/CodeGen/Hexagon/machine-sink.ll
+++ b/llvm/test/CodeGen/Hexagon/machine-sink.ll
@@ -6,9 +6,9 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
@@ -19,10 +19,10 @@
   %v2 = load i8, ptr %v0, align 1, !tbaa !0
   %v3 = zext i8 %v2 to i32
   %v4 = shl nuw nsw i32 %v3, 8
-  br i1 undef, label %b3, label %b5
+  br i1 %c1, label %b3, label %b5
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b15, label %b4
+  br i1 %c2, label %b15, label %b4
 
 b4:                                               ; preds = %b3
   br label %b5
@@ -42,16 +42,16 @@
   unreachable
 
 b8:                                               ; preds = %b6
-  br i1 undef, label %b6, label %b9
+  br i1 %c3, label %b6, label %b9
 
 b9:                                               ; preds = %b8
-  br i1 undef, label %b10, label %b14
+  br i1 %c4, label %b10, label %b14
 
 b10:                                              ; preds = %b9
-  br i1 undef, label %b11, label %b13
+  br i1 %c5, label %b11, label %b13
 
 b11:                                              ; preds = %b10
-  br i1 undef, label %b12, label %b13
+  br i1 %c6, label %b12, label %b13
 
 b12:                                              ; preds = %b11
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/mipi-double-small.ll b/llvm/test/CodeGen/Hexagon/mipi-double-small.ll
--- a/llvm/test/CodeGen/Hexagon/mipi-double-small.ll
+++ b/llvm/test/CodeGen/Hexagon/mipi-double-small.ll
@@ -4,12 +4,12 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b3
+  br i1 %c0, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   %v0 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> undef)
diff --git a/llvm/test/CodeGen/Hexagon/newvalueSameReg.ll b/llvm/test/CodeGen/Hexagon/newvalueSameReg.ll
--- a/llvm/test/CodeGen/Hexagon/newvalueSameReg.ll
+++ b/llvm/test/CodeGen/Hexagon/newvalueSameReg.ll
@@ -18,11 +18,11 @@
 ; Function Attrs: nounwind
 declare void @f0(ptr nocapture, ptr nocapture readonly, ...) #0
 
-define void @f1() #1 {
+define void @f1(i1 %c0, i1 %c1, i1 %c2) #1 {
 b0:
   %v0 = load ptr, ptr undef, align 4
   %v1 = load i32, ptr undef, align 4
-  br i1 undef, label %b4, label %b1
+  br i1 %c0, label %b4, label %b1
 
 b1:                                               ; preds = %b0
   %v2 = icmp slt i32 %v1, 0
@@ -32,7 +32,7 @@
   %v6 = getelementptr inbounds i32, ptr %v0, i32 %v5
   %v7 = icmp ult ptr %v6, %v0
   %v8 = select i1 %v7, i32 0, i32 1
-  br i1 undef, label %b2, label %b4
+  br i1 %c1, label %b2, label %b4
 
 b2:                                               ; preds = %b1
   %v9 = icmp slt i32 %v1, 0
@@ -50,7 +50,7 @@
   unreachable
 
 b4:                                               ; preds = %b2, %b1, %b0
-  br i1 undef, label %b6, label %b5
+  br i1 %c2, label %b6, label %b5
 
 b5:                                               ; preds = %b4
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll b/llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll
--- a/llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll
+++ b/llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll
@@ -8,14 +8,14 @@
 
 @g0 = external hidden unnamed_addr global [182 x i16], align 8
 
-define void @fred(i16 signext %a0, i16 signext %a1) #0 {
+define void @fred(i16 signext %a0, i16 signext %a1, i1 %c0, i1 %c1) #0 {
 b1:
   %v1 = sext i16 %a0 to i32
   %v2 = getelementptr inbounds [182 x i16], ptr @g0, i32 0, i32 %v1
   %v3 = sext i16 %a1 to i32
   %v4 = call i32 @llvm.hexagon.A2.asrh(i32 undef)
   %v5 = trunc i32 %v4 to i16
-  br i1 undef, label %b6, label %b14
+  br i1 %c0, label %b6, label %b14
 
 b6:                                               ; preds = %b1
   %v7 = sext i16 %v5 to i32
@@ -30,7 +30,7 @@
   br label %b8
 
 b14:                                              ; preds = %b1
-  br i1 undef, label %b16, label %b15
+  br i1 %c1, label %b16, label %b15
 
 b15:                                              ; preds = %b14
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/newvaluejump3.ll b/llvm/test/CodeGen/Hexagon/newvaluejump3.ll
--- a/llvm/test/CodeGen/Hexagon/newvaluejump3.ll
+++ b/llvm/test/CodeGen/Hexagon/newvaluejump3.ll
@@ -12,10 +12,10 @@
 %type.3 = type { i32 }
 %type.4 = type { ptr, i32 }
 
-define hidden fastcc ptr @fred(ptr nocapture readonly %a0, ptr readonly %a1) unnamed_addr #2 {
+define hidden fastcc ptr @fred(ptr nocapture readonly %a0, ptr readonly %a1, i1 %c0, i1 %c1) unnamed_addr #2 {
 b2:
   %v3 = load i8, ptr %a1, align 1
-  br i1 undef, label %b4, label %b24
+  br i1 %c0, label %b4, label %b24
 
 b4:                                               ; preds = %b2
   switch i8 %v3, label %b13 [
@@ -51,7 +51,7 @@
   br label %b14
 
 b14:                                              ; preds = %b13
-  br i1 undef, label %b15, label %b16
+  br i1 %c1, label %b15, label %b16
 
 b15:                                              ; preds = %b14
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/opt-addr-mode-subreg-use.ll b/llvm/test/CodeGen/Hexagon/opt-addr-mode-subreg-use.ll
--- a/llvm/test/CodeGen/Hexagon/opt-addr-mode-subreg-use.ll
+++ b/llvm/test/CodeGen/Hexagon/opt-addr-mode-subreg-use.ll
@@ -41,7 +41,7 @@
 declare ptr @f9(ptr nocapture readonly) #0 align 2
 
 ; Function Attrs: optsize
-define void @f10(ptr %a0, ptr dereferenceable(64) %a1) #1 align 2 {
+define void @f10(ptr %a0, ptr dereferenceable(64) %a1, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14, i1 %c15, i1 %c16) #1 align 2 {
 b0:
   %v0 = alloca %s.0, align 4
   %v1 = alloca %s.1, align 4
@@ -49,10 +49,10 @@
   %v3 = alloca %s.3, align 4
   %v4 = alloca %s.4, align 4
   %v5 = alloca %s.5, align 8
-  br i1 undef, label %b34, label %b1
+  br i1 %c0, label %b34, label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b2:                                               ; preds = %b1
   %v6 = ptrtoint ptr %v0 to i32
@@ -80,7 +80,7 @@
   %v28 = shl nuw i64 %v27, 32
   %v29 = or i64 %v28, zext (i32 ptrtoint (ptr @f7 to i32) to i64)
   %v30 = call ptr @f9(ptr nonnull null) #1
-  br i1 undef, label %b5, label %b4
+  br i1 %c2, label %b5, label %b4
 
 b3:                                               ; preds = %b1
   unreachable
@@ -94,23 +94,23 @@
   unreachable
 
 b6:                                               ; preds = %b4
-  br i1 undef, label %b7, label %b32
+  br i1 %c3, label %b7, label %b32
 
 b7:                                               ; preds = %b6
-  br i1 undef, label %b8, label %b32
+  br i1 %c4, label %b8, label %b32
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b9, label %b32
+  br i1 %c5, label %b9, label %b32
 
 b9:                                               ; preds = %b8
-  br i1 undef, label %b10, label %b32
+  br i1 %c6, label %b10, label %b32
 
 b10:                                              ; preds = %b9
   %v32 = call zeroext i1 @f1(ptr null) #0
   br i1 %v32, label %b11, label %b32
 
 b11:                                              ; preds = %b10
-  br i1 undef, label %b13, label %b12
+  br i1 %c7, label %b13, label %b12
 
 b12:                                              ; preds = %b11
   unreachable
@@ -120,7 +120,7 @@
   br i1 %v33, label %b14, label %b32
 
 b14:                                              ; preds = %b13
-  br i1 undef, label %b16, label %b15
+  br i1 %c8, label %b16, label %b15
 
 b15:                                              ; preds = %b14
   unreachable
@@ -133,22 +133,22 @@
   unreachable
 
 b18:                                              ; preds = %b16
-  br i1 undef, label %b19, label %b32
+  br i1 %c9, label %b19, label %b32
 
 b19:                                              ; preds = %b18
-  br i1 undef, label %b26, label %b20
+  br i1 %c10, label %b26, label %b20
 
 b20:                                              ; preds = %b19
-  br i1 undef, label %b22, label %b21
+  br i1 %c11, label %b22, label %b21
 
 b21:                                              ; preds = %b20
-  br i1 undef, label %b23, label %b32
+  br i1 %c12, label %b23, label %b32
 
 b22:                                              ; preds = %b20
   unreachable
 
 b23:                                              ; preds = %b21
-  br i1 undef, label %b24, label %b32
+  br i1 %c13, label %b24, label %b32
 
 b24:                                              ; preds = %b23
   %v35 = call zeroext i1 @f8(ptr nonnull %a1, ptr undef, i64 undef) #1
@@ -159,13 +159,13 @@
   unreachable
 
 b26:                                              ; preds = %b19
-  br i1 undef, label %b27, label %b32
+  br i1 %c14, label %b27, label %b32
 
 b27:                                              ; preds = %b26
-  br i1 undef, label %b28, label %b32
+  br i1 %c15, label %b28, label %b32
 
 b28:                                              ; preds = %b27
-  br i1 undef, label %b31, label %b29
+  br i1 %c16, label %b31, label %b29
 
 b29:                                              ; preds = %b28
   %v37 = call zeroext i1 @f8(ptr nonnull %a1, ptr null, i64 %v21) #1
diff --git a/llvm/test/CodeGen/Hexagon/packetize-impdef-1.ll b/llvm/test/CodeGen/Hexagon/packetize-impdef-1.ll
--- a/llvm/test/CodeGen/Hexagon/packetize-impdef-1.ll
+++ b/llvm/test/CodeGen/Hexagon/packetize-impdef-1.ll
@@ -12,7 +12,7 @@
 ; CHECK: memd(r29+#0) = r{{[0-9]+}}:{{[0-9]+}}
 ; CHECK: memd(r29+#0) = r{{[0-9]+}}:{{[0-9]+}}
 
-define ptr @f0(ptr %a0) local_unnamed_addr {
+define ptr @f0(ptr %a0, i1 %c0, i1 %c1, i1 %c2, i1 %c3) local_unnamed_addr {
 b0:
   %v0 = tail call ptr @f1(i32 0)
   %v1 = tail call ptr @f1(i32 8)
@@ -38,7 +38,7 @@
   br label %b5
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b27, label %b6
+  br i1 %c0, label %b27, label %b6
 
 b6:                                               ; preds = %b5
   %v6 = ptrtoint ptr %v4 to i32
@@ -48,7 +48,7 @@
   br label %b7
 
 b7:                                               ; preds = %b6
-  br i1 undef, label %b8, label %b9
+  br i1 %c1, label %b8, label %b9
 
 b8:                                               ; preds = %b7
   br label %b9
@@ -62,7 +62,7 @@
   ]
 
 b10:                                              ; preds = %b9, %b9
-  br i1 undef, label %b11, label %b12
+  br i1 %c2, label %b11, label %b12
 
 b11:                                              ; preds = %b10
   %v12 = call i64 @f6(ptr nonnull %v9, ptr nonnull undef, i32 10)
@@ -99,7 +99,7 @@
   br label %b27
 
 b18:                                              ; preds = %b16
-  br i1 undef, label %b19, label %b20
+  br i1 %c3, label %b19, label %b20
 
 b19:                                              ; preds = %b18
   br label %b24
diff --git a/llvm/test/CodeGen/Hexagon/packetize-impdef.ll b/llvm/test/CodeGen/Hexagon/packetize-impdef.ll
--- a/llvm/test/CodeGen/Hexagon/packetize-impdef.ll
+++ b/llvm/test/CodeGen/Hexagon/packetize-impdef.ll
@@ -23,21 +23,21 @@
 
 declare void @f0(ptr, i32, i32)
 
-define hidden fastcc i32 @f1(ptr %a0, ptr %a1, ptr %a2) {
+define hidden fastcc i32 @f1(ptr %a0, ptr %a1, ptr %a2, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12, i1 %c13, i1 %c14) {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b2
   br label %b55
 
 b4:                                               ; preds = %b2
-  br i1 undef, label %b6, label %b5
+  br i1 %c2, label %b6, label %b5
 
 b5:                                               ; preds = %b4
   %v0 = getelementptr inbounds %5, ptr %a0, i32 0, i32 1
@@ -64,25 +64,25 @@
 b9:                                               ; preds = %b7
   %v9 = load i8, ptr undef, align 1
   %v10 = zext i8 %v9 to i32
-  br i1 undef, label %b10, label %b11
+  br i1 %c3, label %b10, label %b11
 
 b10:                                              ; preds = %b9
   br label %b47
 
 b11:                                              ; preds = %b9
-  br i1 undef, label %b12, label %b47
+  br i1 %c4, label %b12, label %b47
 
 b12:                                              ; preds = %b11
-  br i1 undef, label %b13, label %b47
+  br i1 %c5, label %b13, label %b47
 
 b13:                                              ; preds = %b12
   %v11 = getelementptr inbounds [7 x %0], ptr @g0, i32 0, i32 %v10, i32 2
   %v12 = load ptr, ptr %v11, align 4
   %v13 = call zeroext i8 %v12(i8 zeroext %v9)
-  br i1 undef, label %b14, label %b47
+  br i1 %c6, label %b14, label %b47
 
 b14:                                              ; preds = %b13
-  br i1 undef, label %b15, label %b16
+  br i1 %c7, label %b15, label %b16
 
 b15:                                              ; preds = %b14
   br label %b46
@@ -91,7 +91,7 @@
   br i1 false, label %b17, label %b22
 
 b17:                                              ; preds = %b16
-  br i1 undef, label %b18, label %b19
+  br i1 %c8, label %b18, label %b19
 
 b18:                                              ; preds = %b17
   unreachable
@@ -100,7 +100,7 @@
   br label %b20
 
 b20:                                              ; preds = %b20, %b19
-  br i1 undef, label %b20, label %b21
+  br i1 %c9, label %b20, label %b21
 
 b21:                                              ; preds = %b20
   unreachable
@@ -155,7 +155,7 @@
   br label %b36
 
 b33:                                              ; preds = %b31
-  br i1 undef, label %b34, label %b35
+  br i1 %c10, label %b34, label %b35
 
 b34:                                              ; preds = %b33
   %v29 = getelementptr inbounds %1, ptr @g1, i32 0, i32 3, i32 %v14
@@ -174,7 +174,7 @@
   br label %b38
 
 b38:                                              ; preds = %b38, %b37
-  br i1 undef, label %b38, label %b39
+  br i1 %c11, label %b38, label %b39
 
 b39:                                              ; preds = %b38
   br i1 false, label %b40, label %b41
@@ -194,7 +194,7 @@
   br label %b44
 
 b44:                                              ; preds = %b44, %b43
-  br i1 undef, label %b45, label %b44
+  br i1 %c12, label %b45, label %b44
 
 b45:                                              ; preds = %b44
   %v34 = sdiv i64 undef, %v33
@@ -220,10 +220,10 @@
   br label %b54
 
 b49:                                              ; preds = %b47
-  br i1 undef, label %b50, label %b52
+  br i1 %c13, label %b50, label %b52
 
 b50:                                              ; preds = %b49
-  br i1 undef, label %b51, label %b53
+  br i1 %c14, label %b51, label %b53
 
 b51:                                              ; preds = %b50
   br label %b52
diff --git a/llvm/test/CodeGen/Hexagon/peephole-op-swap.ll b/llvm/test/CodeGen/Hexagon/peephole-op-swap.ll
--- a/llvm/test/CodeGen/Hexagon/peephole-op-swap.ll
+++ b/llvm/test/CodeGen/Hexagon/peephole-op-swap.ll
@@ -11,9 +11,9 @@
 @float_exception_flags = external global i8, align 1
 
 ; Function Attrs: nounwind
-define i64 @fred(i32 %a) #0 {
+define i64 @fred(i32 %a, i1 %c0) #0 {
 entry:
-  br i1 undef, label %cleanup, label %lor.lhs.false
+  br i1 %c0, label %cleanup, label %lor.lhs.false
 
 lor.lhs.false:                                    ; preds = %entry
   %cmp3 = icmp eq i32 undef, 255
diff --git a/llvm/test/CodeGen/Hexagon/postinc-offset.ll b/llvm/test/CodeGen/Hexagon/postinc-offset.ll
--- a/llvm/test/CodeGen/Hexagon/postinc-offset.ll
+++ b/llvm/test/CodeGen/Hexagon/postinc-offset.ll
@@ -7,7 +7,7 @@
 ; CHECK: }
 
 
-define void @f0(ptr %a0) #0 {
+define void @f0(ptr %a0, i1 %c0) #0 {
 b0:
   store i32 -1, ptr %a0, align 8, !tbaa !0
   br label %b4
@@ -20,7 +20,7 @@
 
 b3:                                               ; preds = %b4
   %v0 = extractelement <2 x i32> %v6, i32 1
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b4:                                               ; preds = %b4, %b0
   %v1 = phi <2 x i32> [ %v6, %b4 ], [ zeroinitializer, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/pred-taken-jump.ll b/llvm/test/CodeGen/Hexagon/pred-taken-jump.ll
--- a/llvm/test/CodeGen/Hexagon/pred-taken-jump.ll
+++ b/llvm/test/CodeGen/Hexagon/pred-taken-jump.ll
@@ -8,7 +8,7 @@
 
 %s.0 = type { ptr, i8 }
 
-define i32 @f0(ptr nocapture %a0, i32 %a1) #0 {
+define i32 @f0(ptr nocapture %a0, i32 %a1, i1 %c0) #0 {
 b0:
   %v0 = and i32 %a1, 63
   %v1 = icmp eq i32 %v0, %a1
@@ -35,7 +35,7 @@
   br label %b2
 
 b5:                                               ; preds = %b2
-  br i1 undef, label %b7, label %b6
+  br i1 %c0, label %b7, label %b6
 
 b6:                                               ; preds = %b5
   br label %b7
diff --git a/llvm/test/CodeGen/Hexagon/rdf-copy-undef.ll b/llvm/test/CodeGen/Hexagon/rdf-copy-undef.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-copy-undef.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-copy-undef.ll
@@ -23,23 +23,23 @@
 declare fastcc signext i16 @f1(i16 signext, i16 signext) unnamed_addr #1
 
 ; Function Attrs: norecurse nounwind
-define fastcc i32 @f2(ptr nocapture readonly %a0, i16 signext %a1, i16 signext %a2, ptr nocapture readonly %a3, i16 signext %a4, ptr nocapture readonly %a51, ptr nocapture %a6) unnamed_addr #1 {
+define fastcc i32 @f2(ptr nocapture readonly %a0, i16 signext %a1, i16 signext %a2, ptr nocapture readonly %a3, i16 signext %a4, ptr nocapture readonly %a51, ptr nocapture %a6, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9) unnamed_addr #1 {
 b0:
   %v0 = tail call ptr @llvm.stacksave()
   %v1 = tail call fastcc signext i16 @f1(i16 signext %a2, i16 signext %a1)
-  br i1 undef, label %b7, label %b1
+  br i1 %c0, label %b7, label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b2:                                               ; preds = %b1
-  br i1 undef, label %b4, label %b8
+  br i1 %c2, label %b4, label %b8
 
 b3:                                               ; preds = %b1
-  br i1 undef, label %b5, label %b8
+  br i1 %c3, label %b5, label %b8
 
 b4:                                               ; preds = %b4, %b2
-  br i1 undef, label %b4, label %b6, !llvm.loop !2
+  br i1 %c4, label %b4, label %b6, !llvm.loop !2
 
 b5:                                               ; preds = %b5, %b3
   %v2 = phi i16 [ %v3, %b5 ], [ 0, %b3 ]
@@ -53,7 +53,7 @@
 
 b7:                                               ; preds = %b6, %b0
   %v6 = phi i16 [ %v5, %b6 ], [ 0, %b0 ]
-  br i1 undef, label %b9, label %b8
+  br i1 %c5, label %b9, label %b8
 
 b8:                                               ; preds = %b7, %b3, %b2
   %v7 = or i32 0, undef
@@ -65,7 +65,7 @@
   %v10 = load i16, ptr undef, align 2, !tbaa !4
   %v11 = sext i16 %v10 to i32
   %v12 = zext i16 %v10 to i32
-  br i1 undef, label %b10, label %b11
+  br i1 %c6, label %b10, label %b11
 
 b10:                                              ; preds = %b9
   store i1 true, ptr @g0, align 4
@@ -95,13 +95,13 @@
   br label %b13
 
 b13:                                              ; preds = %b12, %b11
-  br i1 undef, label %b14, label %b24
+  br i1 %c7, label %b14, label %b24
 
 b14:                                              ; preds = %b13
   br label %b15
 
 b15:                                              ; preds = %b23, %b14
-  br i1 undef, label %b16, label %b17
+  br i1 %c8, label %b16, label %b17
 
 b16:                                              ; preds = %b15
   br label %b19
@@ -136,7 +136,7 @@
   %v35 = lshr i32 %v34, 16
   %v36 = trunc i32 %v35 to i16
   store i16 %v36, ptr undef, align 2, !tbaa !4
-  br i1 undef, label %b24, label %b15
+  br i1 %c9, label %b24, label %b15
 
 b24:                                              ; preds = %b23, %b13
   call fastcc void @f0(i16 signext undef, i16 signext %a1, i16 signext %a2, ptr %a3, i16 signext %a4, ptr %a6)
diff --git a/llvm/test/CodeGen/Hexagon/rdf-copy-undef2.ll b/llvm/test/CodeGen/Hexagon/rdf-copy-undef2.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-copy-undef2.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-copy-undef2.ll
@@ -11,16 +11,16 @@
 declare ptr @llvm.stacksave() #2
 declare void @llvm.stackrestore(ptr) #2
 
-define i32 @fred(i16 signext %p0, i16 signext %p1, ptr nocapture readonly %p2, i16 signext %p3, ptr nocapture readonly %p4, ptr nocapture %p5) #1 {
+define i32 @fred(i16 signext %p0, i16 signext %p1, ptr nocapture readonly %p2, i16 signext %p3, ptr nocapture readonly %p4, ptr nocapture %p5, i1 %c0, i1 %c1) #1 {
 entry:
   %0 = tail call ptr @llvm.stacksave()
   %vla = alloca i16, i32 undef, align 8
   %call17 = call signext i16 @cat(i16 signext 1) #1
-  br i1 undef, label %for.cond23.preheader, label %for.end47
+  br i1 %c0, label %for.cond23.preheader, label %for.end47
 
 for.cond23.preheader:                             ; preds = %for.end40, %entry
   %i.190 = phi i16 [ %inc46, %for.end40 ], [ 0, %entry ]
-  br i1 undef, label %for.body27, label %for.end40
+  br i1 %c1, label %for.body27, label %for.end40
 
 for.body27:                                       ; preds = %for.body27, %for.cond23.preheader
   %indvars.iv = phi i32 [ %indvars.iv.next, %for.body27 ], [ 0, %for.cond23.preheader ]
diff --git a/llvm/test/CodeGen/Hexagon/rdf-cover-use.ll b/llvm/test/CodeGen/Hexagon/rdf-cover-use.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-cover-use.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-cover-use.ll
@@ -10,9 +10,9 @@
 declare i32 @llvm.hexagon.S2.vrndpackwh(i64) #0
 declare i64 @llvm.hexagon.M2.mmpyl.s1(i64, i64) #0
 
-define i64 @fred(i32 %a0, i32 %a1) local_unnamed_addr #1 {
+define i64 @fred(i32 %a0, i32 %a1, i1 %c0) local_unnamed_addr #1 {
 b2:
-  br i1 undef, label %b15, label %b3
+  br i1 %c0, label %b15, label %b3
 
 b3:                                               ; preds = %b2
   %v4 = tail call i32 @llvm.hexagon.S2.clb(i32 %a1) #0
diff --git a/llvm/test/CodeGen/Hexagon/rdf-extra-livein.ll b/llvm/test/CodeGen/Hexagon/rdf-extra-livein.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-extra-livein.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-extra-livein.ll
@@ -14,9 +14,9 @@
 declare zeroext i8 @sammy() local_unnamed_addr #0
 
 ; Function Attrs: nounwind
-define void @main() local_unnamed_addr #0 {
+define void @main(i1 %c0, i1 %c1, i1 %c2, i1 %c3) local_unnamed_addr #0 {
 entry:
-  br i1 undef, label %if.then8, label %if.end10
+  br i1 %c0, label %if.then8, label %if.end10
 
 if.then8:                                         ; preds = %entry
   ret void
@@ -29,7 +29,7 @@
   br i1 %cond, label %if.end49, label %if.then124
 
 if.end49:                                         ; preds = %do.body
-  br i1 undef, label %if.end55, label %if.then53
+  br i1 %c1, label %if.end55, label %if.then53
 
 if.then53:                                        ; preds = %if.end49
   call void @danny()
@@ -46,7 +46,7 @@
   unreachable
 
 sw.epilog79:                                      ; preds = %if.end55
-  br i1 undef, label %if.end88, label %if.then81
+  br i1 %c2, label %if.end88, label %if.then81
 
 if.then81:                                        ; preds = %sw.epilog79
   %div87 = fdiv float 0.000000e+00, undef
@@ -59,7 +59,7 @@
   %div93 = fdiv float %mul92, 1.000000e+06
   %conv107 = fpext float %div93 to double
   call void (ptr, ...) @printf(ptr @.str.13, double %conv107, double undef, i64 undef, i32 undef) #0
-  br i1 undef, label %if.end88.do.body_crit_edge, label %if.then124
+  br i1 %c3, label %if.end88.do.body_crit_edge, label %if.then124
 
 if.end88.do.body_crit_edge:                       ; preds = %if.end88
   br label %do.body
diff --git a/llvm/test/CodeGen/Hexagon/rdf-ignore-undef.ll b/llvm/test/CodeGen/Hexagon/rdf-ignore-undef.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-ignore-undef.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-ignore-undef.ll
@@ -10,7 +10,7 @@
 declare void @foo(ptr, ptr) local_unnamed_addr #0
 declare void @bar(ptr, ptr readonly) local_unnamed_addr #0
 
-define i32 @fred(i32 %argc, ptr nocapture readonly %argv) local_unnamed_addr #0 {
+define i32 @fred(i32 %argc, ptr nocapture readonly %argv, i1 %c0, i1 %c1, i1 %c2) local_unnamed_addr #0 {
 entry:
   br label %do.body
 
@@ -20,7 +20,7 @@
 
 if.end49:                                         ; preds = %do.body
   call void @foo(ptr nonnull undef, ptr nonnull undef) #0
-  br i1 undef, label %if.end55, label %if.then53
+  br i1 %c0, label %if.end55, label %if.then53
 
 if.then53:                                        ; preds = %if.end49
   call void @bar(ptr null, ptr nonnull undef)
@@ -36,14 +36,14 @@
   br label %sw.epilog79
 
 sw.epilog79:                                      ; preds = %sw.bb77, %if.end55
-  br i1 undef, label %if.end88, label %if.then81
+  br i1 %c1, label %if.end88, label %if.then81
 
 if.then81:                                        ; preds = %sw.epilog79
   br label %if.end88
 
 if.end88:                                         ; preds = %if.then81, %sw.epilog79
   store float 0.000000e+00, ptr undef, align 4
-  br i1 undef, label %if.end88.do.body_crit_edge, label %if.then124
+  br i1 %c2, label %if.end88.do.body_crit_edge, label %if.then124
 
 if.end88.do.body_crit_edge:                       ; preds = %if.end88
   br label %do.body
diff --git a/llvm/test/CodeGen/Hexagon/rdf-kill-last-op.ll b/llvm/test/CodeGen/Hexagon/rdf-kill-last-op.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-kill-last-op.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-kill-last-op.ll
@@ -10,15 +10,15 @@
 @g1 = external constant %s.0, align 4
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9, i1 %c10, i1 %c11, i1 %c12) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b2
   switch i32 undef, label %b4 [
@@ -29,7 +29,7 @@
   unreachable
 
 b5:                                               ; preds = %b3
-  br i1 undef, label %b7, label %b6
+  br i1 %c2, label %b7, label %b6
 
 b6:                                               ; preds = %b5
   switch i32 undef, label %b40 [
@@ -41,28 +41,28 @@
   unreachable
 
 b8:                                               ; preds = %b6
-  br i1 undef, label %b9, label %b37
+  br i1 %c3, label %b9, label %b37
 
 b9:                                               ; preds = %b8
-  br i1 undef, label %b10, label %b37
+  br i1 %c4, label %b10, label %b37
 
 b10:                                              ; preds = %b9
-  br i1 undef, label %b12, label %b11
+  br i1 %c5, label %b12, label %b11
 
 b11:                                              ; preds = %b10
   unreachable
 
 b12:                                              ; preds = %b10
-  br i1 undef, label %b13, label %b17
+  br i1 %c6, label %b13, label %b17
 
 b13:                                              ; preds = %b12
-  br i1 undef, label %b14, label %b15
+  br i1 %c7, label %b14, label %b15
 
 b14:                                              ; preds = %b13
   unreachable
 
 b15:                                              ; preds = %b13
-  br i1 undef, label %b16, label %b18
+  br i1 %c8, label %b16, label %b18
 
 b16:                                              ; preds = %b15
   unreachable
@@ -71,7 +71,7 @@
   unreachable
 
 b18:                                              ; preds = %b15
-  br i1 undef, label %b19, label %b20
+  br i1 %c9, label %b19, label %b20
 
 b19:                                              ; preds = %b18
   br label %b21
@@ -122,7 +122,7 @@
   br i1 %v26, label %b26, label %b27
 
 b26:                                              ; preds = %b25
-  br i1 undef, label %b32, label %b27
+  br i1 %c10, label %b32, label %b27
 
 b27:                                              ; preds = %b26, %b25
   %v27 = getelementptr inbounds [6 x [2 x i32]], ptr @g0, i32 0, i32 %v23, i32 0
@@ -131,7 +131,7 @@
   br i1 %v29, label %b28, label %b29
 
 b28:                                              ; preds = %b27
-  br i1 undef, label %b32, label %b29
+  br i1 %c11, label %b32, label %b29
 
 b29:                                              ; preds = %b28, %b27
   %v30 = load i32, ptr undef, align 4, !tbaa !4
@@ -153,7 +153,7 @@
 
 b32:                                              ; preds = %b31, %b28, %b26
   %v39 = phi i16 [ %v38, %b31 ], [ %v2, %b28 ], [ %v2, %b26 ]
-  br i1 undef, label %b33, label %b34
+  br i1 %c12, label %b33, label %b34
 
 b33:                                              ; preds = %b32
   call void (ptr, i32, ...) @f1(ptr nonnull @g1, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 %v7) #0
diff --git a/llvm/test/CodeGen/Hexagon/rdf-multiple-phis-up.ll b/llvm/test/CodeGen/Hexagon/rdf-multiple-phis-up.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-multiple-phis-up.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-multiple-phis-up.ll
@@ -8,9 +8,9 @@
 
 %struct.0 = type { ptr, ptr, [2 x ptr], i32, i32, ptr, i32, i32, i32, i32, i32, [2 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
 
-define i32 @fred(ptr %p0) local_unnamed_addr #0 {
+define i32 @fred(ptr %p0, i1 %c0) local_unnamed_addr #0 {
 entry:
-  br i1 undef, label %if.then21, label %for.body.i
+  br i1 %c0, label %if.then21, label %for.body.i
 
 if.then21:                                        ; preds = %entry
   %.pr = load i32, ptr undef, align 4
diff --git a/llvm/test/CodeGen/Hexagon/rdf-phi-shadows.ll b/llvm/test/CodeGen/Hexagon/rdf-phi-shadows.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-phi-shadows.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-phi-shadows.ll
@@ -12,7 +12,7 @@
 
 @.str = private unnamed_addr constant [5 x i8] c"blah\00", align 1
 
-define i32 @main(i32 %argc, ptr nocapture readonly %argv) local_unnamed_addr #0 {
+define i32 @main(i32 %argc, ptr nocapture readonly %argv, i1 %c0, i1 %c1, i1 %c2) local_unnamed_addr #0 {
 entry:
   %t0 = alloca %struct.0, align 4
   br label %do.body
@@ -22,7 +22,7 @@
   br i1 %cond, label %if.end49, label %if.then124
 
 if.end49:                                         ; preds = %do.body
-  br i1 undef, label %if.end55, label %if.then53
+  br i1 %c0, label %if.end55, label %if.then53
 
 if.then53:                                        ; preds = %if.end49
   call void @foo(ptr null, ptr nonnull %t0)
@@ -39,7 +39,7 @@
   unreachable
 
 sw.epilog79:                                      ; preds = %if.end55
-  br i1 undef, label %if.end88, label %if.then81
+  br i1 %c1, label %if.end88, label %if.then81
 
 if.then81:                                        ; preds = %sw.epilog79
   %div87 = fdiv float 0.000000e+00, undef
@@ -51,7 +51,7 @@
   %.sroa.speculated = select i1 undef, float 0.000000e+00, float undef
   %conv108 = fpext float %.sroa.speculated to double
   %call113 = call i32 (ptr, ...) @printf(ptr @.str, double undef, double %conv108, i64 undef, i32 undef) #0
-  br i1 undef, label %if.end88.do.body_crit_edge, label %if.then124
+  br i1 %c2, label %if.end88.do.body_crit_edge, label %if.then124
 
 if.end88.do.body_crit_edge:                       ; preds = %if.end88
   br label %do.body
diff --git a/llvm/test/CodeGen/Hexagon/rdf-reset-kills.ll b/llvm/test/CodeGen/Hexagon/rdf-reset-kills.ll
--- a/llvm/test/CodeGen/Hexagon/rdf-reset-kills.ll
+++ b/llvm/test/CodeGen/Hexagon/rdf-reset-kills.ll
@@ -6,7 +6,7 @@
 
 target triple = "hexagon"
 
-define void @foo(i64 %a) #0 {
+define void @foo(i64 %a, i1 %c0) #0 {
 entry:
   %conv.i = and i64 %a, 9218868437227405312
   %cmp = icmp ne i64 %conv.i, 9218868437227405312
@@ -16,7 +16,7 @@
   br i1 %or.cond, label %lor.lhs.false, label %if.then
 
 lor.lhs.false:                                    ; preds = %entry
-  br i1 undef, label %return, label %if.then
+  br i1 %c0, label %return, label %if.then
 
 if.then:                                          ; preds = %lor.lhs.false, %entry
   br label %return
diff --git a/llvm/test/CodeGen/Hexagon/redundant-branching2.ll b/llvm/test/CodeGen/Hexagon/redundant-branching2.ll
--- a/llvm/test/CodeGen/Hexagon/redundant-branching2.ll
+++ b/llvm/test/CodeGen/Hexagon/redundant-branching2.ll
@@ -13,9 +13,9 @@
 declare void @f0() #0
 
 ; Function Attrs: nounwind
-define void @f1(ptr %a0, i32 %a1, ptr %a2, ptr %a3, i32 %a4) #0 {
+define void @f1(ptr %a0, i32 %a1, ptr %a2, ptr %a3, i32 %a4, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b8, label %b1
+  br i1 %c0, label %b8, label %b1
 
 b1:                                               ; preds = %b0
   tail call void @f0() #0
diff --git a/llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll b/llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
--- a/llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
+++ b/llvm/test/CodeGen/Hexagon/reg-scavengebug-2.ll
@@ -4,9 +4,9 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture %a0) #0 {
+define void @f0(ptr nocapture %a0, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/reg-scavengebug-4.ll b/llvm/test/CodeGen/Hexagon/reg-scavengebug-4.ll
--- a/llvm/test/CodeGen/Hexagon/reg-scavengebug-4.ll
+++ b/llvm/test/CodeGen/Hexagon/reg-scavengebug-4.ll
@@ -6,10 +6,10 @@
 ; and requires another register to compute the location on the stack.
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, ptr nocapture readonly %a3, ptr nocapture readonly %a4, ptr nocapture %a5) #0 {
+define void @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, ptr nocapture readonly %a3, ptr nocapture readonly %a4, ptr nocapture %a5, i1 %c0) #0 {
 b0:
   %v0 = tail call <16 x i32> @llvm.hexagon.V6.vshuffb(<16 x i32> zeroinitializer)
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   %v1 = getelementptr inbounds i8, ptr %a3, i32 31
diff --git a/llvm/test/CodeGen/Hexagon/reg-scavengebug-5.ll b/llvm/test/CodeGen/Hexagon/reg-scavengebug-5.ll
--- a/llvm/test/CodeGen/Hexagon/reg-scavengebug-5.ll
+++ b/llvm/test/CodeGen/Hexagon/reg-scavengebug-5.ll
@@ -7,7 +7,7 @@
 ; the code changed when a spill is inserted, was not always returning true.
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr noalias nocapture %a4, i32 %a5) #0 {
+define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3, ptr noalias nocapture %a4, i32 %a5, i1 %c0) #0 {
 b0:
   %v0 = sub i32 0, %a1
   %v1 = getelementptr inbounds i8, ptr %a0, i32 %v0
@@ -50,7 +50,7 @@
   %v41 = add nuw nsw i32 %v40, 1
   %v42 = and i32 %v41, 3
   %v43 = icmp eq i32 %v42, 0
-  br i1 undef, label %b2, label %b4
+  br i1 %c0, label %b2, label %b4
 
 b2:                                               ; preds = %b2, %b1
   %v44 = phi i32 [ %v144, %b2 ], [ %a2, %b1 ]
diff --git a/llvm/test/CodeGen/Hexagon/regalloc-block-overlap.ll b/llvm/test/CodeGen/Hexagon/regalloc-block-overlap.ll
--- a/llvm/test/CodeGen/Hexagon/regalloc-block-overlap.ll
+++ b/llvm/test/CodeGen/Hexagon/regalloc-block-overlap.ll
@@ -16,7 +16,7 @@
 declare <64 x i32> @llvm.hexagon.V6.vlutvwh.128B(<32 x i32>, <32 x i32>, i32) #1
 declare <64 x i32> @llvm.hexagon.V6.vlutvwh.oracc.128B(<64 x i32>, <32 x i32>, <32 x i32>, i32) #1
 
-define hidden void @fred(ptr %a0, i32 %a1, i1 %cond) #0 {
+define hidden void @fred(ptr %a0, i32 %a1, i1 %cond, i1 %c0) #0 {
 b0:
   %v1 = ashr i32 %a1, 7
   %v2 = shl nsw i32 %v1, 7
@@ -64,7 +64,7 @@
   br label %b14
 
 b14:                                              ; preds = %b13
-  br i1 undef, label %b15, label %b13
+  br i1 %c0, label %b15, label %b13
 
 b15:                                              ; preds = %b14
   br label %b16
diff --git a/llvm/test/CodeGen/Hexagon/registerscav-missing-spill-slot.ll b/llvm/test/CodeGen/Hexagon/registerscav-missing-spill-slot.ll
--- a/llvm/test/CodeGen/Hexagon/registerscav-missing-spill-slot.ll
+++ b/llvm/test/CodeGen/Hexagon/registerscav-missing-spill-slot.ll
@@ -7,29 +7,29 @@
 %s.0 = type { double, double, double, double, double, double, i32, double, double, double, double, ptr, i8, [9 x i8], double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, [200 x ptr], [32 x ptr], [32 x i8], i32 }
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #0 {
 b0:
   %v0 = call ptr @f2()
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   ret void
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b2
   unreachable
 
 b4:                                               ; preds = %b2
-  br i1 undef, label %b5, label %b6
+  br i1 %c2, label %b5, label %b6
 
 b5:                                               ; preds = %b4
   unreachable
 
 b6:                                               ; preds = %b4
   %v1 = call i32 @f1() #0
-  br i1 undef, label %b7, label %b20
+  br i1 %c3, label %b7, label %b20
 
 b7:                                               ; preds = %b6
   switch i32 undef, label %b8 [
@@ -65,7 +65,7 @@
 
 b15:                                              ; preds = %b15, %b14
   %v4 = fadd double undef, undef
-  br i1 undef, label %b16, label %b15
+  br i1 %c4, label %b16, label %b15
 
 b16:                                              ; preds = %b15
   switch i32 undef, label %b18 [
diff --git a/llvm/test/CodeGen/Hexagon/registerscavenger-fail1.ll b/llvm/test/CodeGen/Hexagon/registerscavenger-fail1.ll
--- a/llvm/test/CodeGen/Hexagon/registerscavenger-fail1.ll
+++ b/llvm/test/CodeGen/Hexagon/registerscavenger-fail1.ll
@@ -8,32 +8,32 @@
 @g0 = external unnamed_addr constant [6 x i8], align 8
 
 ; Function Attrs: nounwind
-define i32 @f0(double %a0) #0 {
+define i32 @f0(double %a0, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7, i1 %c8, i1 %c9) #0 {
 b0:
   %v0 = call double @f1(ptr @g0) #0
   %v1 = call i32 @f2() #0
   %v2 = call ptr @f3(i32 undef)
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b2
   unreachable
 
 b4:                                               ; preds = %b2
   %v3 = mul i32 %v1, 12
-  br i1 undef, label %b5, label %b6
+  br i1 %c2, label %b5, label %b6
 
 b5:                                               ; preds = %b4
   ret i32 0
 
 b6:                                               ; preds = %b4
   %v4 = call i32 @f2() #0
-  br i1 undef, label %b7, label %b24
+  br i1 %c3, label %b7, label %b24
 
 b7:                                               ; preds = %b6
   switch i32 undef, label %b8 [
@@ -74,10 +74,10 @@
 
 b16:                                              ; preds = %b14
   %v7 = and i32 %v4, 3
-  br i1 undef, label %b17, label %b18
+  br i1 %c4, label %b17, label %b18
 
 b17:                                              ; preds = %b16
-  br i1 undef, label %b19, label %b18
+  br i1 %c5, label %b19, label %b18
 
 b18:                                              ; preds = %b18, %b17, %b16
   %v8 = phi i32 [ %v10, %b18 ], [ 0, %b16 ], [ undef, %b17 ]
@@ -87,7 +87,7 @@
   br i1 %v11, label %b19, label %b18
 
 b19:                                              ; preds = %b18, %b17
-  br i1 undef, label %b20, label %b23
+  br i1 %c6, label %b20, label %b23
 
 b20:                                              ; preds = %b19
   %v12 = icmp eq i32 %v7, 2
@@ -141,7 +141,7 @@
   %v59 = select i1 %v58, double %v50, double %v38
   %v60 = select i1 undef, double %v53, double %v40
   %v61 = add i32 %v42, 1
-  br i1 undef, label %b24, label %b23
+  br i1 %c7, label %b24, label %b23
 
 b23:                                              ; preds = %b23, %b22, %b19
   %v62 = phi double [ %v79, %b23 ], [ 1.000000e+11, %b19 ], [ %v57, %b22 ]
@@ -180,7 +180,7 @@
   %v93 = fdiv double %v92, %v0
   %v94 = fadd double %v93, 1.000000e+00
   %v95 = fptosi double %v94 to i32
-  br i1 undef, label %b25, label %b27
+  br i1 %c8, label %b25, label %b27
 
 b25:                                              ; preds = %b24
   %v96 = fdiv double %v88, 0.000000e+00
@@ -215,7 +215,7 @@
 b28:                                              ; preds = %b35, %b27
   %v117 = phi i32 [ %v146, %b35 ], [ 0, %b27 ]
   %v118 = mul i32 %v117, 232
-  br i1 undef, label %b29, label %b35
+  br i1 %c9, label %b29, label %b35
 
 b29:                                              ; preds = %b28
   %v119 = add i32 %v118, 8
diff --git a/llvm/test/CodeGen/Hexagon/save-kill-csr.ll b/llvm/test/CodeGen/Hexagon/save-kill-csr.ll
--- a/llvm/test/CodeGen/Hexagon/save-kill-csr.ll
+++ b/llvm/test/CodeGen/Hexagon/save-kill-csr.ll
@@ -31,9 +31,9 @@
 @g18 = external hidden global [3 x %s.0], align 8
 
 ; Function Attrs: norecurse nounwind optsize ssp
-define hidden zeroext i8 @f0(ptr nocapture readnone %a0, ptr readonly %a1, ptr %a2, i32 %a3) unnamed_addr #0 align 2 {
+define hidden zeroext i8 @f0(ptr nocapture readnone %a0, ptr readonly %a1, ptr %a2, i32 %a3, i1 %c0, i1 %c1) unnamed_addr #0 align 2 {
 b0:
-  br i1 undef, label %b4, label %b1
+  br i1 %c0, label %b4, label %b1
 
 b1:                                               ; preds = %b0
   %v0 = icmp eq i32 %a3, 1
@@ -75,7 +75,7 @@
   %v36 = select i1 %v35, i8 4, i8 3
   %v37 = select i1 undef, i8 0, i8 %v36
   %v38 = select i1 undef, i8 4, i8 %v37
-  br i1 undef, label %b2, label %b3
+  br i1 %c1, label %b2, label %b3
 
 b2:                                               ; preds = %b3, %b1
   %v39 = phi ptr [ undef, %b3 ], [ %v33, %b1 ]
diff --git a/llvm/test/CodeGen/Hexagon/split-muxii.ll b/llvm/test/CodeGen/Hexagon/split-muxii.ll
--- a/llvm/test/CodeGen/Hexagon/split-muxii.ll
+++ b/llvm/test/CodeGen/Hexagon/split-muxii.ll
@@ -3,7 +3,7 @@
 
 target triple = "hexagon"
 
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   %v0 = load i32, ptr null, align 4
   %v1 = icmp slt i32 undef, %v0
@@ -12,7 +12,7 @@
   %v4 = zext i1 %v3 to i32
   %v5 = add nsw i32 %v2, %v4
   store i32 %v5, ptr undef, align 4
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/split-vecpred.ll b/llvm/test/CodeGen/Hexagon/split-vecpred.ll
--- a/llvm/test/CodeGen/Hexagon/split-vecpred.ll
+++ b/llvm/test/CodeGen/Hexagon/split-vecpred.ll
@@ -6,12 +6,12 @@
 ; later. The assert occurs because there is a use of a register that does not
 ; have a correct definition.
 
-define void @f0() local_unnamed_addr #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2) local_unnamed_addr #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b3
+  br i1 %c0, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   unreachable
@@ -23,7 +23,7 @@
   br label %b5
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b13, label %b6
+  br i1 %c1, label %b13, label %b6
 
 b6:                                               ; preds = %b5
   br label %b7
@@ -33,7 +33,7 @@
 
 b8:                                               ; preds = %b7
   %v0 = tail call <64 x i1> @llvm.hexagon.V6.vandvrt(<16 x i32> undef, i32 -1)
-  br i1 undef, label %b9, label %b11
+  br i1 %c2, label %b9, label %b11
 
 b9:                                               ; preds = %b8
   br label %b12
diff --git a/llvm/test/CodeGen/Hexagon/stack-align-reset.ll b/llvm/test/CodeGen/Hexagon/stack-align-reset.ll
--- a/llvm/test/CodeGen/Hexagon/stack-align-reset.ll
+++ b/llvm/test/CodeGen/Hexagon/stack-align-reset.ll
@@ -15,11 +15,11 @@
 declare extern_weak void @f0(i32, ptr, i32, ptr, ...) #0
 declare void @f1(ptr, i32) #0
 
-define void @fred(ptr %a0) #0 {
+define void @fred(ptr %a0, i1 %c0, i1 %c1) #0 {
 b1:
   %v2 = alloca %struct.0, align 4
   %v3 = alloca %struct.2, i32 undef, align 8
-  br i1 undef, label %b5, label %b4
+  br i1 %c0, label %b5, label %b4
 
 b4:                                               ; preds = %b1
   br label %b7
@@ -42,7 +42,7 @@
   br label %b7
 
 b11:                                              ; preds = %b11, %b7
-  br i1 undef, label %b10, label %b11
+  br i1 %c1, label %b10, label %b11
 }
 
 declare i32 @llvm.hexagon.V6.extractw(<16 x i32>, i32) #1
diff --git a/llvm/test/CodeGen/Hexagon/store-vector-pred.ll b/llvm/test/CodeGen/Hexagon/store-vector-pred.ll
--- a/llvm/test/CodeGen/Hexagon/store-vector-pred.ll
+++ b/llvm/test/CodeGen/Hexagon/store-vector-pred.ll
@@ -6,9 +6,9 @@
 
 target triple = "hexagon"
 
-define dso_local void @f0() local_unnamed_addr #0 {
+define dso_local void @f0(i1 %c0) local_unnamed_addr #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v0 = load i8, ptr undef, align 1
diff --git a/llvm/test/CodeGen/Hexagon/swp-art-deps-rec.ll b/llvm/test/CodeGen/Hexagon/swp-art-deps-rec.ll
--- a/llvm/test/CodeGen/Hexagon/swp-art-deps-rec.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-art-deps-rec.ll
@@ -16,16 +16,16 @@
 ; it will be greater.
 ; CHECK: rec=1,
 
-define void @foo(i32 %size) #0 {
+define void @foo(i32 %size, i1 %c0, i1 %c1) #0 {
 entry:
   %add = add nsw i32 0, 4
   %shr = ashr i32 %size, 1
-  br i1 undef, label %L57.us, label %L57.us.ur
+  br i1 %c0, label %L57.us, label %L57.us.ur
 
 L57.us:
   %R9.0470.us = phi i32 [ %sub40.us.3, %L57.us ], [ undef, %entry ]
   %sub40.us.3 = add i32 %R9.0470.us, -64
-  br i1 undef, label %L57.us, label %for.cond22.for.end_crit_edge.us.ur-lcssa
+  br i1 %c1, label %L57.us, label %for.cond22.for.end_crit_edge.us.ur-lcssa
 
 for.cond22.for.end_crit_edge.us.ur-lcssa:
   %inc.us.3.lcssa = phi i32 [ undef, %L57.us ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-badorder.ll b/llvm/test/CodeGen/Hexagon/swp-badorder.ll
--- a/llvm/test/CodeGen/Hexagon/swp-badorder.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-badorder.ll
@@ -2,9 +2,9 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture %a0) #0 {
+define void @f0(ptr nocapture %a0, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i64 [ %v9, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-carried-1.ll b/llvm/test/CodeGen/Hexagon/swp-carried-1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-carried-1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-carried-1.ll
@@ -14,12 +14,12 @@
 
 @g0 = external global [256 x i32], align 8
 
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   br label %b3
@@ -27,10 +27,10 @@
 b3:                                               ; preds = %b3, %b2
   %v0 = phi ptr [ @g0, %b2 ], [ %v1, %b3 ]
   %v1 = getelementptr i32, ptr %v0, i32 6
-  br i1 undef, label %b4, label %b3
+  br i1 %c1, label %b4, label %b3
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b6, label %b5
+  br i1 %c2, label %b6, label %b5
 
 b5:                                               ; preds = %b5, %b4
   %v2 = phi i64 [ %v19, %b5 ], [ undef, %b4 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-chain-refs.ll b/llvm/test/CodeGen/Hexagon/swp-chain-refs.ll
--- a/llvm/test/CodeGen/Hexagon/swp-chain-refs.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-chain-refs.ll
@@ -9,7 +9,7 @@
 ; STATS-NOT: 1 pipeliner   - Number of loops software pipelined
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #0 {
 b0:
   br label %b2
 
@@ -20,16 +20,16 @@
   br label %b3
 
 b3:                                               ; preds = %b5, %b2
-  br i1 undef, label %b4, label %b5
+  br i1 %c0, label %b4, label %b5
 
 b4:                                               ; preds = %b3
   br label %b5
 
 b5:                                               ; preds = %b4, %b3
-  br i1 undef, label %b3, label %b6
+  br i1 %c1, label %b3, label %b6
 
 b6:                                               ; preds = %b5
-  br i1 undef, label %b1, label %b2
+  br i1 %c2, label %b1, label %b2
 
 b7:                                               ; preds = %b7, %b1
   %v0 = phi i32 [ 0, %b1 ], [ %v4, %b7 ]
@@ -43,13 +43,13 @@
   br i1 %v5, label %b8, label %b7
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b9, label %b10
+  br i1 %c3, label %b9, label %b10
 
 b9:                                               ; preds = %b8
   br label %b10
 
 b10:                                              ; preds = %b9, %b8
-  br i1 undef, label %b11, label %b12
+  br i1 %c4, label %b11, label %b12
 
 b11:                                              ; preds = %b10
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/swp-change-dep-cycle.ll b/llvm/test/CodeGen/Hexagon/swp-change-dep-cycle.ll
--- a/llvm/test/CodeGen/Hexagon/swp-change-dep-cycle.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-change-dep-cycle.ll
@@ -4,9 +4,9 @@
 ; Don't change the dependences if it's going to cause a cycle.
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture %a0, i32 %a1) #0 {
+define void @f0(ptr nocapture %a0, i32 %a1, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi ptr [ undef, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-change-dep.ll b/llvm/test/CodeGen/Hexagon/swp-change-dep.ll
--- a/llvm/test/CodeGen/Hexagon/swp-change-dep.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-change-dep.ll
@@ -2,21 +2,21 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b2
   unreachable
 
 b4:                                               ; preds = %b2
-  br i1 undef, label %b5, label %b6
+  br i1 %c2, label %b5, label %b6
 
 b5:                                               ; preds = %b4
   unreachable
@@ -25,22 +25,22 @@
   br label %b7
 
 b7:                                               ; preds = %b7, %b6
-  br i1 undef, label %b8, label %b7
+  br i1 %c3, label %b8, label %b7
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b15, label %b9
+  br i1 %c4, label %b15, label %b9
 
 b9:                                               ; preds = %b8
   br label %b10
 
 b10:                                              ; preds = %b10, %b9
-  br i1 undef, label %b11, label %b10
+  br i1 %c5, label %b11, label %b10
 
 b11:                                              ; preds = %b10
   br label %b12
 
 b12:                                              ; preds = %b12, %b11
-  br i1 undef, label %b13, label %b12
+  br i1 %c6, label %b13, label %b12
 
 b13:                                              ; preds = %b13, %b12
   %v0 = phi i32 [ %v5, %b13 ], [ 0, %b12 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll b/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
@@ -3,7 +3,6 @@
 ; RUN:     -enable-aa-sched-mi=false -hexagon-expand-condsets=0 \
 ; RUN:     < %s -pipeliner-experimental-cg=true | FileCheck %s
 
-; Disable expand-condsets because it will assert on undefined registers.
 
 ; Test that we change the CFG correctly for pipelined loops where the trip
 ; count is a compile-time constant, and the trip count is the same as the
@@ -13,7 +12,7 @@
 ; CHECK: memb(r{{[0-9]+}}+#0) =
 
 ; Function Attrs: nounwind optsize
-define void @f0(i1 %x) #0 {
+define void @f0(i1 %x, i1 %c0, i1 %c1) #0 {
 b0:
   br label %b1
 
@@ -52,10 +51,10 @@
   br i1 %v23, label %b4, label %b3
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b5, label %b2
+  br i1 %c0, label %b5, label %b2
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b1, label %b6
+  br i1 %c1, label %b1, label %b6
 
 b6:                                               ; preds = %b5
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/swp-cse-phi.ll b/llvm/test/CodeGen/Hexagon/swp-cse-phi.ll
--- a/llvm/test/CodeGen/Hexagon/swp-cse-phi.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-cse-phi.ll
@@ -2,20 +2,19 @@
 ; REQUIRES: asserts
 
 ; This test checks that we don't assert when the Phi value from the
-; loop is actually defined prior to the loop, e.g., from CSE.
 
-define fastcc void @f0() {
+define fastcc void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3) {
 b0:
-  br i1 undef, label %b10, label %b1
+  br i1 %c0, label %b10, label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b2:                                               ; preds = %b1
   br label %b8
 
 b3:                                               ; preds = %b1
-  br i1 undef, label %b4, label %b6
+  br i1 %c2, label %b4, label %b6
 
 b4:                                               ; preds = %b3
   %v0 = load i16, ptr undef, align 2
@@ -26,7 +25,7 @@
 
 b6:                                               ; preds = %b5, %b3
   %v1 = phi i16 [ %v9, %b5 ], [ 0, %b3 ]
-  br i1 undef, label %b10, label %b9
+  br i1 %c3, label %b10, label %b9
 
 b7:                                               ; preds = %b7, %b4
   %v2 = phi i16 [ 0, %b7 ], [ %v0, %b4 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-dag-phi1.ll b/llvm/test/CodeGen/Hexagon/swp-dag-phi1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-dag-phi1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-dag-phi1.ll
@@ -4,9 +4,9 @@
 ; This test check that a dependence is created between a Phi and it's uses.
 ; An assert occurs if the Phi dependences are not correct.
 
-define void @f0(ptr nocapture %a0, i32 %a1) #0 {
+define void @f0(ptr nocapture %a0, i32 %a1, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi float [ %v1, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-dep-neg-offset.ll b/llvm/test/CodeGen/Hexagon/swp-dep-neg-offset.ll
--- a/llvm/test/CodeGen/Hexagon/swp-dep-neg-offset.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-dep-neg-offset.ll
@@ -14,15 +14,15 @@
 @g0 = external global [1000000 x i8], align 8
 
 ; Function Attrs: nounwind
-define void @f0(i32 %a0, ptr %a1, ptr %a2) #0 {
+define void @f0(i32 %a0, ptr %a1, ptr %a2, i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 b0:
-  br i1 undef, label %b1, label %b7
+  br i1 %c0, label %b1, label %b7
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b6
+  br i1 %c1, label %b2, label %b6
 
 b2:                                               ; preds = %b5, %b1
-  br i1 undef, label %b3, label %b5
+  br i1 %c2, label %b3, label %b5
 
 b3:                                               ; preds = %b3, %b2
   %v0 = phi i32 [ %v17, %b3 ], [ 1, %b2 ]
@@ -51,7 +51,7 @@
   br label %b5
 
 b5:                                               ; preds = %b4, %b2
-  br i1 undef, label %b6, label %b2
+  br i1 %c3, label %b6, label %b2
 
 b6:                                               ; preds = %b5, %b1
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
@@ -10,10 +10,10 @@
 ; CHECK: = add([[REG1]],#8)
 
 ; Function Attrs: nounwind
-define ptr @f0(ptr nocapture readonly %a0, i32 %a1) #0 {
+define ptr @f0(ptr nocapture readonly %a0, i32 %a1, i1 %c0) #0 {
 b0:
   %v0 = alloca [129 x i32], align 8
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-phi13.ll
@@ -10,9 +10,9 @@
 ; CHECK: endloop0
 
 ; Function Attrs: nounwind
-define ptr @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3,  ptr %b) #0 {
+define ptr @f0(ptr nocapture readonly %a0, i32 %a1, i32 %a2, i32 %a3,  ptr %b, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-phi8.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-phi8.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-phi8.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-phi8.ll
@@ -11,12 +11,12 @@
 ; CHECK: sub([[REG:r([0-9]+)]],r{{[0-9]+}}):sat
 ; CHECK-NOT: sub([[REG]],r{{[0-9]+}}):sat
 
-define void @f0() {
+define void @f0(i1 %c0) {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   br label %b3
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
@@ -12,10 +12,10 @@
 ; CHECK: [[REG0]] = add(r{{[0-9]+}},#8)
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture readonly %a0, i32 %a1) #0 {
+define void @f0(ptr nocapture readonly %a0, i32 %a1, i1 %c0) #0 {
 b0:
   %v0 = alloca [129 x i32], align 8
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse.ll
@@ -4,18 +4,18 @@
 ; Test that the pipeliner doesn't ICE due because the PHI generation
 ; code in the epilog does not attempt to reuse an existing PHI.
 
-define void @test(ptr noalias %srcImg, i32 %width, ptr noalias %dstImg) {
+define void @test(ptr noalias %srcImg, i32 %width, ptr noalias %dstImg, i1 %c0, i1 %c1) {
 entry.split:
   %shr = lshr i32 %width, 1
   %incdec.ptr253 = getelementptr inbounds float, ptr %dstImg, i32 2
-  br i1 undef, label %for.body, label %for.end
+  br i1 %c0, label %for.body, label %for.end
 
 for.body:
   %dst.21518.reg2mem.0 = phi ptr [ null, %while.end712 ], [ %incdec.ptr253, %entry.split ]
   %dstEnd.01519 = phi ptr [ %add.ptr725, %while.end712 ], [ undef, %entry.split ]
   %add.ptr367 = getelementptr inbounds float, ptr %srcImg, i32 undef
   %dst.31487 = getelementptr inbounds float, ptr %dst.21518.reg2mem.0, i32 1
-  br i1 undef, label %while.body661.preheader, label %while.end712
+  br i1 %c1, label %while.body661.preheader, label %while.end712
 
 while.body661.preheader:
   %scevgep1941 = getelementptr float, ptr %add.ptr367, i32 1
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse2.ll
@@ -7,17 +7,17 @@
 ; differences.
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias %a0, ptr noalias %a1) #0 {
+define void @f0(ptr noalias %a0, ptr noalias %a1, i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
   %v0 = getelementptr inbounds float, ptr %a1, i32 2
-  br i1 undef, label %b1, label %b6
+  br i1 %c0, label %b1, label %b6
 
 b1:                                               ; preds = %b5, %b0
   %v1 = phi ptr [ undef, %b5 ], [ %v0, %b0 ]
   %v2 = phi ptr [ %v32, %b5 ], [ undef, %b0 ]
   %v3 = getelementptr inbounds float, ptr %a0, i32 undef
   %v4 = getelementptr inbounds float, ptr %v1, i32 1
-  br i1 undef, label %b2, label %b5
+  br i1 %c1, label %b2, label %b5
 
 b2:                                               ; preds = %b1
   %v5 = getelementptr float, ptr %v3, i32 1
@@ -57,7 +57,7 @@
   %v31 = fptrunc double %v30 to float
   store float %v31, ptr %v23, align 4, !tbaa !0
   %v32 = getelementptr inbounds float, ptr %v2, i32 undef
-  br i1 undef, label %b1, label %b6
+  br i1 %c2, label %b1, label %b6
 
 b6:                                               ; preds = %b5, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse3.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse3.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse3.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse3.ll
@@ -10,15 +10,15 @@
 declare i32 @llvm.hexagon.S2.asl.r.r.sat(i32, i32) #0
 
 ; Function Attrs: nounwind
-define void @f0() #1 {
+define void @f0(i1 %c0, i1 %c1) #1 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b2, %b1
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b3:                                               ; preds = %b3, %b2
   %v0 = phi i16 [ %v10, %b3 ], [ undef, %b2 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse4.ll b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse4.ll
--- a/llvm/test/CodeGen/Hexagon/swp-epilog-reuse4.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-epilog-reuse4.ll
@@ -1,7 +1,6 @@
 ; RUN: llc -march=hexagon -enable-pipeliner -hexagon-expand-condsets=0 < %s
 ; REQUIRES: asserts
 
-; Disable expand-condsets because it will assert on undefined registers.
 
 ; Another test that the pipeliner doesn't ICE when reusing a
 ; PHI in the epilog code.
@@ -15,7 +14,7 @@
 declare i32 @llvm.hexagon.A2.sxth(i32) #0
 
 ; Function Attrs: nounwind
-define void @f0() #1 {
+define void @f0(i1 %c0, i1 %c1) #1 {
 b0:
   %v0 = alloca [166 x i32], align 8
   br label %b1
@@ -25,11 +24,11 @@
   br i1 %v1, label %b2, label %b1
 
 b2:                                               ; preds = %b1
-  br i1 undef, label %b3, label %b4
+  br i1 %c0, label %b3, label %b4
 
 b3:                                               ; preds = %b3, %b2
   %v2 = add i32 0, 2
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b4:                                               ; preds = %b3, %b2
   %v3 = phi ptr [ undef, %b2 ], [ undef, %b3 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-exit-fixup.ll b/llvm/test/CodeGen/Hexagon/swp-exit-fixup.ll
--- a/llvm/test/CodeGen/Hexagon/swp-exit-fixup.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-exit-fixup.ll
@@ -4,9 +4,9 @@
 ; Make sure we fix up the Phis when we connect the last
 ; epilog block to the CFG.
 
-define void @f0(ptr nocapture %a0) #0 {
+define void @f0(ptr nocapture %a0, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6, i1 %c7) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   br label %b3
@@ -15,23 +15,23 @@
   unreachable
 
 b3:                                               ; preds = %b3, %b1
-  br i1 undef, label %b4, label %b3
+  br i1 %c1, label %b4, label %b3
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b6, label %b5
+  br i1 %c2, label %b6, label %b5
 
 b5:                                               ; preds = %b4
   store i16 4096, ptr %a0, align 2
   br label %b11
 
 b6:                                               ; preds = %b4
-  br i1 undef, label %b7, label %b8
+  br i1 %c3, label %b7, label %b8
 
 b7:                                               ; preds = %b7, %b6
   br label %b7
 
 b8:                                               ; preds = %b8, %b6
-  br i1 undef, label %b9, label %b8
+  br i1 %c4, label %b9, label %b8
 
 b9:                                               ; preds = %b8
   %v0 = icmp sgt i32 undef, 1
@@ -52,16 +52,16 @@
 
 b11:                                              ; preds = %b10, %b9, %b5
   %v10 = phi i1 [ false, %b9 ], [ false, %b5 ], [ %v0, %b10 ]
-  br i1 undef, label %b16, label %b12
+  br i1 %c5, label %b16, label %b12
 
 b12:                                              ; preds = %b11
-  br i1 undef, label %b13, label %b16
+  br i1 %c6, label %b13, label %b16
 
 b13:                                              ; preds = %b12
   br i1 %v10, label %b14, label %b15
 
 b14:                                              ; preds = %b14, %b13
-  br i1 undef, label %b15, label %b14
+  br i1 %c7, label %b15, label %b14
 
 b15:                                              ; preds = %b14, %b13
   br label %b16
diff --git a/llvm/test/CodeGen/Hexagon/swp-fix-last-use.ll b/llvm/test/CodeGen/Hexagon/swp-fix-last-use.ll
--- a/llvm/test/CodeGen/Hexagon/swp-fix-last-use.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-fix-last-use.ll
@@ -3,12 +3,12 @@
 
 ; We need to rename uses that occurs after the loop.
 
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b4
+  br i1 %c1, label %b2, label %b4
 
 b2:                                               ; preds = %b2, %b1
   %v0 = phi i32 [ %v1, %b2 ], [ 1, %b1 ]
@@ -23,7 +23,7 @@
   br i1 %v3, label %b5, label %b4
 
 b4:                                               ; preds = %b4, %b3, %b1
-  br i1 undef, label %b5, label %b4
+  br i1 %c2, label %b5, label %b4
 
 b5:                                               ; preds = %b4, %b3, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/swp-fix-last-use1.ll b/llvm/test/CodeGen/Hexagon/swp-fix-last-use1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-fix-last-use1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-fix-last-use1.ll
@@ -2,9 +2,9 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b4
+  br i1 %c0, label %b1, label %b4
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-intreglow8.ll b/llvm/test/CodeGen/Hexagon/swp-intreglow8.ll
--- a/llvm/test/CodeGen/Hexagon/swp-intreglow8.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-intreglow8.ll
@@ -7,9 +7,9 @@
 ; from IntRegsLow8 to IntRegs, which is incorrect.
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b6
+  br i1 %c0, label %b1, label %b6
 
 b1:                                               ; preds = %b0
   br label %b2
@@ -42,7 +42,7 @@
   br i1 %v20, label %b4, label %b3
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b5, label %b2
+  br i1 %c1, label %b5, label %b2
 
 b5:                                               ; preds = %b4
   unreachable
diff --git a/llvm/test/CodeGen/Hexagon/swp-kernel-last-use.ll b/llvm/test/CodeGen/Hexagon/swp-kernel-last-use.ll
--- a/llvm/test/CodeGen/Hexagon/swp-kernel-last-use.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-kernel-last-use.ll
@@ -11,12 +11,12 @@
 
 @g0 = external constant %s.0, align 1
 
-define void @f0(i8 zeroext %a0, i32 %a1, i32 %a2, i8 zeroext %a3, ptr nocapture %a4, ptr %a5, i8 zeroext %a6) #0 {
+define void @f0(i8 zeroext %a0, i32 %a1, i32 %a2, i8 zeroext %a3, ptr nocapture %a4, ptr %a5, i8 zeroext %a6, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #0 {
 b0:
-  br i1 undef, label %b1, label %b7
+  br i1 %c0, label %b1, label %b7
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b3
+  br i1 %c1, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   unreachable
@@ -29,7 +29,7 @@
   br label %b4
 
 b4:                                               ; preds = %b4, %b3
-  br i1 undef, label %b4, label %b8
+  br i1 %c2, label %b4, label %b8
 
 b5:                                               ; preds = %b10
   unreachable
@@ -63,10 +63,10 @@
   %v19 = shl i32 %v14, 2
   %v20 = or i32 0, %v19
   %v21 = or i32 %v20, %v18
-  br i1 undef, label %b9, label %b10
+  br i1 %c3, label %b9, label %b10
 
 b10:                                              ; preds = %b9
-  br i1 undef, label %b6, label %b5
+  br i1 %c4, label %b6, label %b5
 }
 
 declare void @f1(ptr, i32, i32, i32, i32)
diff --git a/llvm/test/CodeGen/Hexagon/swp-large-rec.ll b/llvm/test/CodeGen/Hexagon/swp-large-rec.ll
--- a/llvm/test/CodeGen/Hexagon/swp-large-rec.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-large-rec.ll
@@ -10,9 +10,9 @@
 ; STATS-NOT: 1 pipeliner   - Number of loops software pipelined
 
 ; Function Attrs: nounwind
-define void @f0(i32 %a0, i32 %a1, double %a2, double %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11) #0 {
+define void @f0(i32 %a0, i32 %a1, double %a2, double %a3, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b4
+  br i1 %c0, label %b1, label %b4
 
 b1:                                               ; preds = %b3, %b0
   br label %b2
@@ -50,7 +50,7 @@
 
 b3:                                               ; preds = %b2
   tail call void @f1(i32 %a1, ptr %a4, ptr %a5, ptr %a6, ptr %a7, ptr %a8, ptr %a9, ptr %a10, ptr %a11, i8 signext 1) #2
-  br i1 undef, label %b4, label %b1
+  br i1 %c1, label %b4, label %b1
 
 b4:                                               ; preds = %b3, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/swp-loop-carried.ll b/llvm/test/CodeGen/Hexagon/swp-loop-carried.ll
--- a/llvm/test/CodeGen/Hexagon/swp-loop-carried.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-loop-carried.ll
@@ -3,18 +3,18 @@
 
 ; A Phi that depends on another Phi is loop carried.
 
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b2:                                               ; preds = %b1
-  br i1 undef, label %b3, label %b8
+  br i1 %c1, label %b3, label %b8
 
 b3:                                               ; preds = %b2
-  br i1 undef, label %b4, label %b5
+  br i1 %c2, label %b4, label %b5
 
 b4:                                               ; preds = %b4, %b3
   %v0 = phi i32 [ %v5, %b4 ], [ 2, %b3 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-loopval.ll b/llvm/test/CodeGen/Hexagon/swp-loopval.ll
--- a/llvm/test/CodeGen/Hexagon/swp-loopval.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-loopval.ll
@@ -2,16 +2,15 @@
 ; REQUIRES: asserts
 
 ; Check that we correctly rename instructions that use a Phi's loop value,
-; and the Phi and loop value are defined after the instruction.
 
 %s.0 = type { [4 x i8], i16, i16, i32, [8 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %s.1], [4 x i8], i32, i32, [4 x i8], [14 x %s.2] }
 %s.1 = type { i32, i32 }
 %s.2 = type { [4 x i8] }
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture %a0) #0 {
+define void @f0(ptr nocapture %a0, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
@@ -23,10 +22,10 @@
   unreachable
 
 b4:                                               ; preds = %b9
-  br i1 undef, label %b7, label %b5
+  br i1 %c1, label %b7, label %b5
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b6, label %b7
+  br i1 %c2, label %b6, label %b7
 
 b6:                                               ; preds = %b6, %b5
   %v0 = phi i32 [ %v10, %b6 ], [ 0, %b5 ]
@@ -47,10 +46,10 @@
   ret void
 
 b8:                                               ; preds = %b8, %b2
-  br i1 undef, label %b9, label %b8
+  br i1 %c3, label %b9, label %b8
 
 b9:                                               ; preds = %b8
-  br i1 undef, label %b3, label %b4
+  br i1 %c4, label %b3, label %b4
 }
 
 attributes #0 = { nounwind "target-cpu"="hexagonv55" }
diff --git a/llvm/test/CodeGen/Hexagon/swp-maxstart.ll b/llvm/test/CodeGen/Hexagon/swp-maxstart.ll
--- a/llvm/test/CodeGen/Hexagon/swp-maxstart.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-maxstart.ll
@@ -15,11 +15,11 @@
 @g0 = external global %s.0, align 8
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
   %v0 = load i32, ptr getelementptr inbounds (%s.0, ptr @g0, i32 0, i32 1), align 8
   %v1 = ashr i32 %v0, 3
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v2 = phi i32 [ %v5, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-more-phi.ll b/llvm/test/CodeGen/Hexagon/swp-more-phi.ll
--- a/llvm/test/CodeGen/Hexagon/swp-more-phi.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-more-phi.ll
@@ -1,38 +1,37 @@
 ; RUN: llc -march=hexagon --enable-pipeliner -hexagon-expand-condsets=0 < %s
 ; REQUIRES: asserts
 
-; Disable expand-condsets because it will assert on undefined registers.
 
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
 
 b2:                                               ; preds = %b0
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b3:                                               ; preds = %b3, %b2
-  br i1 undef, label %b4, label %b3
+  br i1 %c2, label %b4, label %b3
 
 b4:                                               ; preds = %b3, %b2
   %v0 = ashr i32 undef, 25
   %v1 = mul nsw i32 %v0, 2
   %v2 = load i8, ptr undef, align 1
-  br i1 undef, label %b5, label %b10
+  br i1 %c3, label %b5, label %b10
 
 b5:                                               ; preds = %b4
-  br i1 undef, label %b6, label %b9
+  br i1 %c4, label %b6, label %b9
 
 b6:                                               ; preds = %b5
   br label %b7
 
 b7:                                               ; preds = %b7, %b6
-  br i1 undef, label %b7, label %b8
+  br i1 %c5, label %b7, label %b8
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b10, label %b9
+  br i1 %c6, label %b10, label %b9
 
 b9:                                               ; preds = %b9, %b8, %b5
   %v3 = phi i8 [ %v7, %b9 ], [ undef, %b8 ], [ %v2, %b5 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-multi-phi-refs.ll b/llvm/test/CodeGen/Hexagon/swp-multi-phi-refs.ll
--- a/llvm/test/CodeGen/Hexagon/swp-multi-phi-refs.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-multi-phi-refs.ll
@@ -8,14 +8,14 @@
 ;  v8 = phi(v2, v7)
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, ptr noalias nocapture %a3, i32 %a4) #0 {
+define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, ptr noalias nocapture %a3, i32 %a4, i1 %c0, i1 %c1) #0 {
 b0:
   %v0 = add i32 %a1, -1
   %v2 = getelementptr inbounds i8, ptr %a0, i32 undef
-  br i1 undef, label %b1, label %b4
+  br i1 %c0, label %b1, label %b4
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b1, label %b2
+  br i1 %c1, label %b1, label %b2
 
 b2:                                               ; preds = %b1
   %v4 = getelementptr inbounds i8, ptr %a0, i32 undef
diff --git a/llvm/test/CodeGen/Hexagon/swp-order-carried.ll b/llvm/test/CodeGen/Hexagon/swp-order-carried.ll
--- a/llvm/test/CodeGen/Hexagon/swp-order-carried.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-order-carried.ll
@@ -5,10 +5,10 @@
 ; we added a definition of a value after the use in a packet, which
 ; caused an assert.
 
-define void @f0(i32 %a0) {
+define void @f0(i32 %a0, i1 %c0) {
 b0:
   %v0 = ashr i32 %a0, 1
-  br i1 undef, label %b3, label %b1
+  br i1 %c0, label %b3, label %b1
 
 b1:                                               ; preds = %b1, %b0
   %v1 = phi i32 [ %v23, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-order-deps1.ll b/llvm/test/CodeGen/Hexagon/swp-order-deps1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-order-deps1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-order-deps1.ll
@@ -5,12 +5,12 @@
 ; updated when the instruction to insert has a def and use conflict.
 
 ; Function Attrs: nounwind
-define fastcc void @f0() #0 {
+define fastcc void @f0(i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b7, label %b1
+  br i1 %c0, label %b7, label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b4
+  br i1 %c1, label %b2, label %b4
 
 b2:                                               ; preds = %b1
   %v0 = load i16, ptr undef, align 2
diff --git a/llvm/test/CodeGen/Hexagon/swp-order-deps3.ll b/llvm/test/CodeGen/Hexagon/swp-order-deps3.ll
--- a/llvm/test/CodeGen/Hexagon/swp-order-deps3.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-order-deps3.ll
@@ -2,11 +2,11 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: noinline nounwind ssp
-define fastcc void @f0() #0 {
+define fastcc void @f0(i1 %c0) #0 {
 b0:
   %v0 = add i32 0, 39
   %v1 = and i32 %v0, -8
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v2 = phi i32 [ %v10, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-order-prec.ll b/llvm/test/CodeGen/Hexagon/swp-order-prec.ll
--- a/llvm/test/CodeGen/Hexagon/swp-order-prec.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-order-prec.ll
@@ -8,9 +8,9 @@
 %s.1 = type { i16, i16 }
 
 ; Function Attrs: nounwind optsize ssp
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ %v3, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-def-use.ll b/llvm/test/CodeGen/Hexagon/swp-phi-def-use.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-def-use.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-def-use.ll
@@ -17,7 +17,7 @@
 @g3 = external global i32, align 4
 @g4 = external global ptr, align 4
 
-define void @f0(ptr nocapture readonly %a0) #0 {
+define void @f0(ptr nocapture readonly %a0, i1 %c0) #0 {
 b0:
   %v0 = alloca [0 x i32], align 4
   %v1 = load i32, ptr @g0, align 4
@@ -79,7 +79,7 @@
   br label %b11
 
 b8:                                               ; preds = %b6
-  br i1 undef, label %b9, label %b11
+  br i1 %c0, label %b9, label %b11
 
 b9:                                               ; preds = %b8
   %v31 = load ptr, ptr @g4, align 4
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-dep.ll b/llvm/test/CodeGen/Hexagon/swp-phi-dep.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-dep.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-dep.ll
@@ -8,9 +8,9 @@
 ; CHECK-NOT: = addasl(r{{[0-9]+}},[[REG0]],#1)
 
 ; Function Attrs: nounwind
-define void @f0(i32 %a0, ptr nocapture %a1) #0 {
+define void @f0(i32 %a0, ptr nocapture %a1, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5, i1 %c6) #0 {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   unreachable
@@ -19,28 +19,28 @@
   br label %b3
 
 b3:                                               ; preds = %b4, %b2
-  br i1 undef, label %b4, label %b5
+  br i1 %c1, label %b4, label %b5
 
 b4:                                               ; preds = %b3
   br label %b3
 
 b5:                                               ; preds = %b3
-  br i1 undef, label %b6, label %b7
+  br i1 %c2, label %b6, label %b7
 
 b6:                                               ; preds = %b5
   unreachable
 
 b7:                                               ; preds = %b5
-  br i1 undef, label %b8, label %b12
+  br i1 %c3, label %b8, label %b12
 
 b8:                                               ; preds = %b7
-  br i1 undef, label %b9, label %b11
+  br i1 %c4, label %b9, label %b11
 
 b9:                                               ; preds = %b9, %b8
-  br i1 undef, label %b9, label %b10
+  br i1 %c5, label %b9, label %b10
 
 b10:                                              ; preds = %b9
-  br i1 undef, label %b12, label %b11
+  br i1 %c6, label %b12, label %b11
 
 b11:                                              ; preds = %b11, %b10, %b8
   %v0 = phi i32 [ %v6, %b11 ], [ undef, %b8 ], [ undef, %b10 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-order.ll b/llvm/test/CodeGen/Hexagon/swp-phi-order.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-order.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-order.ll
@@ -3,9 +3,9 @@
 
 %s.0 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, [49 x i8], [49 x i8], [25 x i8], [6 x i8], [29 x i8], i8, [6 x i8], [6 x i8] }
 
-define void @f0(ptr nocapture %a0) {
+define void @f0(ptr nocapture %a0, i1 %c0) {
 b0:
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ %v6, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll b/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-ref.ll
@@ -15,9 +15,9 @@
 ; CHECK: endloop0
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ %v7, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-ref1.ll b/llvm/test/CodeGen/Hexagon/swp-phi-ref1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-ref1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-ref1.ll
@@ -3,24 +3,23 @@
 
 ; Test that the SWP doesn't assert when generating new phis. In this example, a
 ; phi references another phi and phi as well as the phi loop value are all
-; defined in different stages.
 ;  v3 =             stage 2
 ;  v2 = phi(vb, v3) stage 1
 ;  v1 = phi(va, v2) stage 0
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   br label %b3
 
 b3:                                               ; preds = %b3, %b2
-  br i1 undef, label %b3, label %b4
+  br i1 %c1, label %b3, label %b4
 
 b4:                                               ; preds = %b4, %b3
   %v0 = phi i32 [ %v17, %b4 ], [ undef, %b3 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-phi-start.ll b/llvm/test/CodeGen/Hexagon/swp-phi-start.ll
--- a/llvm/test/CodeGen/Hexagon/swp-phi-start.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-phi-start.ll
@@ -12,13 +12,13 @@
 ; CHECK: }{{[ \t]*}}:endloop
 
 ; Function Attrs: nounwind
-define void @f0(i32 %a0, ptr nocapture %a1) #0 {
+define void @f0(i32 %a0, ptr nocapture %a1, i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   %v0 = add nsw i32 undef, -8
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b2:                                               ; preds = %b2, %b1, %b0
   %v1 = phi i32 [ %v7, %b2 ], [ undef, %b0 ], [ %v0, %b1 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-physreg.ll b/llvm/test/CodeGen/Hexagon/swp-physreg.ll
--- a/llvm/test/CodeGen/Hexagon/swp-physreg.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-physreg.ll
@@ -7,9 +7,9 @@
 @g0 = external global ptr, align 4
 
 ; Function Attrs: nounwind
-define i32 @f0(i32 %a0, ptr nocapture %a1) #0 {
+define i32 @f0(i32 %a0, ptr nocapture %a1, i1 %c0, i1 %c1, i1 %c2) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b0
   unreachable
@@ -18,7 +18,7 @@
   br label %b3
 
 b3:                                               ; preds = %b3, %b2
-  br i1 undef, label %b4, label %b3
+  br i1 %c1, label %b4, label %b3
 
 b4:                                               ; preds = %b3
   br label %b5
@@ -39,7 +39,7 @@
   br label %b7
 
 b7:                                               ; preds = %b7, %b6
-  br i1 undef, label %b8, label %b7
+  br i1 %c2, label %b8, label %b7
 
 b8:                                               ; preds = %b7
   ret i32 0
diff --git a/llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll b/llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
--- a/llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
@@ -2,16 +2,15 @@
 
 ; Test that we generate the correct name for a value in a prolog block. The
 ; pipeliner was using an incorrect value for an instruction in the 2nd prolog
-; block for a value defined by a Phi. The result was that an instruction in
 ; the 1st and 2nd prolog blocks contain the same operands.
 
 ; CHECK: vcmp.gt([[VREG:(v[0-9]+)]].uh,v{{[0-9]+}}.uh)
 ; CHECK-NOT: vcmp.gt([[VREG]].uh,v{{[0-9]+}}.uh)
 ; CHECK: loop0
 
-define void @f0(<64 x i32> %a0, <32 x i32> %a1, i32 %a2) #0 {
+define void @f0(<64 x i32> %a0, <32 x i32> %a1, i32 %a2, i1 %c0, i1 %c1) #0 {
 b0:
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   %v0 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %a0)
@@ -33,7 +32,7 @@
   br i1 %v9, label %b3, label %b4
 
 b4:                                               ; preds = %b3
-  br i1 undef, label %b5, label %b2
+  br i1 %c1, label %b5, label %b2
 
 b5:                                               ; preds = %b4, %b0
   ret void
diff --git a/llvm/test/CodeGen/Hexagon/swp-prolog-phi4.ll b/llvm/test/CodeGen/Hexagon/swp-prolog-phi4.ll
--- a/llvm/test/CodeGen/Hexagon/swp-prolog-phi4.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-prolog-phi4.ll
@@ -3,7 +3,7 @@
 ; Test that the name rewriter code doesn't chase the Phi operands for
 ; Phis that do not occur in the loop that is being pipelined.
 
-define void @test(i32 %srcStride) local_unnamed_addr #0 {
+define void @test(i32 %srcStride, i1 %c0) local_unnamed_addr #0 {
 entry:
   br label %for.body
 
@@ -12,7 +12,7 @@
   %src2.0390 = phi ptr [ undef, %entry ], [ %add.ptr3.pn, %for.end ]
   %src4.0394 = getelementptr inbounds i8, ptr %add.ptr3.pn, i32 %srcStride
   %sri414 = load i8, ptr undef, align 1
-  br i1 undef, label %for.body9.epil, label %for.body9.preheader.new
+  br i1 %c0, label %for.body9.epil, label %for.body9.preheader.new
 
 for.body9.preheader.new:
   br label %for.body9.epil
diff --git a/llvm/test/CodeGen/Hexagon/swp-regseq.ll b/llvm/test/CodeGen/Hexagon/swp-regseq.ll
--- a/llvm/test/CodeGen/Hexagon/swp-regseq.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-regseq.ll
@@ -3,9 +3,9 @@
 
 %s.0 = type { i64 }
 
-define i64 @f0(ptr nocapture %a0, i32 %a1) {
+define i64 @f0(ptr nocapture %a0, i32 %a1, i1 %c0) {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ %v6, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll b/llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll
--- a/llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-rename-dead-phi.ll
@@ -5,28 +5,28 @@
 ; is scheduled first. We need to rename register uses of the Phi
 ; that may occur after the loop.
 
-define void @f0() #0 {
+define void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) #0 {
 b0:
-  br i1 undef, label %b1, label %b12
+  br i1 %c0, label %b1, label %b12
 
 b1:                                               ; preds = %b0
   %v0 = load float, ptr undef, align 4
-  br i1 undef, label %b2, label %b5
+  br i1 %c1, label %b2, label %b5
 
 b2:                                               ; preds = %b1
-  br i1 undef, label %b3, label %b4
+  br i1 %c2, label %b3, label %b4
 
 b3:                                               ; preds = %b3, %b2
   br label %b3
 
 b4:                                               ; preds = %b4, %b2
-  br i1 undef, label %b5, label %b4
+  br i1 %c3, label %b5, label %b4
 
 b5:                                               ; preds = %b4, %b1
-  br i1 undef, label %b6, label %b9
+  br i1 %c4, label %b6, label %b9
 
 b6:                                               ; preds = %b5
-  br i1 undef, label %b7, label %b8
+  br i1 %c5, label %b7, label %b8
 
 b7:                                               ; preds = %b7, %b6
   br label %b7
diff --git a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-1.ll b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-1.ll
--- a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-1.ll
@@ -2,9 +2,9 @@
 ; REQUIRES: asserts
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-2.ll b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-2.ll
--- a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-2.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-2.ll
@@ -6,9 +6,9 @@
 ; number of stages is two or more.
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias nocapture %a0) #0 {
+define void @f0(ptr noalias nocapture %a0, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-4.ll b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-4.ll
--- a/llvm/test/CodeGen/Hexagon/swp-reuse-phi-4.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-reuse-phi-4.ll
@@ -37,10 +37,10 @@
 declare <16 x i32> @llvm.hexagon.V6.vshuffob(<16 x i32>, <16 x i32>) #0
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2) #1 {
+define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, i1 %c0) #1 {
 b0:
   %v0 = mul nsw i32 %a1, 2
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   %v1 = getelementptr inbounds i8, ptr %a0, i32 %v0
@@ -109,15 +109,15 @@
 }
 
 ; Function Attrs: nounwind
-define void @f1(i32 %a0, ptr %a1) #1 {
+define void @f1(i32 %a0, ptr %a1, i1 %c0, i1 %c1) #1 {
 b0:
   %v0 = ptrtoint ptr %a1 to i32
   %v1 = ashr i32 %a0, 1
   %v2 = tail call i32 @llvm.hexagon.A2.combine.ll(i32 undef, i32 undef)
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b1, label %b2
+  br i1 %c1, label %b1, label %b2
 
 b2:                                               ; preds = %b2, %b1, %b0
   %v3 = phi i64 [ %v11, %b2 ], [ undef, %b0 ], [ undef, %b1 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-stages.ll b/llvm/test/CodeGen/Hexagon/swp-stages.ll
--- a/llvm/test/CodeGen/Hexagon/swp-stages.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-stages.ll
@@ -2,7 +2,6 @@
 ; RUN:     -hexagon-expand-condsets=0 -pipeliner-max-stages=2 < %s
 ; REQUIRES: asserts
 
-; Disable expand-condsets because it will assert on undefined registers.
 
 ; Test that we generate pipelines with multiple stages correctly.
 
@@ -18,7 +17,7 @@
 %s.9 = type { i8, i32, i32, i32, [10 x i32], [10 x i32], [80 x i32], [80 x i32], [8 x i32], i32, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16 }
 
 ; Function Attrs: nounwind
-define fastcc void @f0(ptr %a0) #0 {
+define fastcc void @f0(ptr %a0, i1 %c0) #0 {
 b0:
   %v0 = alloca [40 x i32], align 8
   %v1 = getelementptr inbounds %s.0, ptr %a0, i32 0, i32 5
@@ -35,7 +34,7 @@
 b2:                                               ; preds = %b1, %b0
   %v7 = phi i32 [ %v6, %b1 ], [ undef, %b0 ]
   %v8 = shl i32 %v7, 1
-  br i1 undef, label %b3, label %b4
+  br i1 %c0, label %b3, label %b4
 
 b3:                                               ; preds = %b3, %b2
   %v9 = phi i32 [ %v34, %b3 ], [ %v5, %b2 ]
diff --git a/llvm/test/CodeGen/Hexagon/swp-tfri.ll b/llvm/test/CodeGen/Hexagon/swp-tfri.ll
--- a/llvm/test/CodeGen/Hexagon/swp-tfri.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-tfri.ll
@@ -1,29 +1,28 @@
 ; RUN: llc -march=hexagon -enable-pipeliner -hexagon-initial-cfg-cleanup=0 -stats -o /dev/null < %s 2>&1 -pipeliner-experimental-cg=true | FileCheck %s --check-prefix=STATS
 ; REQUIRES: asserts
 
-; Check that we handle the case when a value is first defined in the loop.
 
 ; STATS: 1 pipeliner        - Number of loops software pipelined
 
 ; Function Attrs: nounwind
-define fastcc void @f0() #0 {
+define fastcc void @f0(i1 %c0, i1 %c1, i1 %c2, i1 %c3) #0 {
 b0:
-  br i1 undef, label %b7, label %b1
+  br i1 %c0, label %b7, label %b1
 
 b1:                                               ; preds = %b0
-  br i1 undef, label %b2, label %b4
+  br i1 %c1, label %b2, label %b4
 
 b2:                                               ; preds = %b1
   %v0 = load i16, ptr undef, align 2
   %v1 = load i16, ptr undef, align 2
-  br i1 undef, label %b5, label %b3
+  br i1 %c2, label %b5, label %b3
 
 b3:                                               ; preds = %b5, %b2
   %v2 = phi i16 [ 0, %b2 ], [ %v14, %b5 ]
   br label %b4
 
 b4:                                               ; preds = %b3, %b1
-  br i1 undef, label %b7, label %b6
+  br i1 %c3, label %b7, label %b6
 
 b5:                                               ; preds = %b5, %b2
   %v3 = phi i16 [ %v5, %b5 ], [ undef, %b2 ]
diff --git a/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll b/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
--- a/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
+++ b/llvm/test/CodeGen/Hexagon/tail-dup-subreg-map.ll
@@ -14,7 +14,7 @@
 
 declare hidden fastcc void @foo(ptr noalias nocapture, i8 signext, i8 zeroext, i32, i64, i64) unnamed_addr #0
 
-define void @fred(ptr noalias nocapture sret(%struct.0) %agg.result, ptr byval(%struct.1) nocapture readonly align 8 %a, i32 %a0) #1 {
+define void @fred(ptr noalias nocapture sret(%struct.0) %agg.result, ptr byval(%struct.1) nocapture readonly align 8 %a, i32 %a0, i1 %c0, i1 %c1) #1 {
 entry:
   %0 = load i64, ptr undef, align 8
   switch i32 %a0, label %if.else [
@@ -26,10 +26,10 @@
   ret void
 
 if.then7:                                         ; preds = %entry
-  br i1 undef, label %if.then.i, label %if.else16.i
+  br i1 %c0, label %if.then.i, label %if.else16.i
 
 if.then.i:                                        ; preds = %if.then7
-  br i1 undef, label %if.then5.i, label %if.else.i
+  br i1 %c1, label %if.then5.i, label %if.else.i
 
 if.then5.i:                                       ; preds = %if.then.i
   %shl.i21 = shl i64 %0, 0
diff --git a/llvm/test/CodeGen/Hexagon/tied_oper.ll b/llvm/test/CodeGen/Hexagon/tied_oper.ll
--- a/llvm/test/CodeGen/Hexagon/tied_oper.ll
+++ b/llvm/test/CodeGen/Hexagon/tied_oper.ll
@@ -5,14 +5,14 @@
 target triple = "hexagon-unknown--elf"
 
 ; Function Attrs: nounwind
-define void @f0(ptr nocapture %a0) #0 {
+define void @f0(ptr nocapture %a0, i1 %c0) #0 {
 b0:
   br label %b1
 
 b1:                                               ; preds = %b5, %b0
   %v0 = phi ptr [ %a0, %b0 ], [ %v5, %b5 ]
   %v1 = phi i16 [ undef, %b0 ], [ %v10, %b5 ]
-  br i1 undef, label %b2, label %b3
+  br i1 %c0, label %b2, label %b3
 
 b2:                                               ; preds = %b1
   %v2 = getelementptr inbounds i16, ptr %v0, i32 1
diff --git a/llvm/test/CodeGen/Hexagon/trunc-mpy.ll b/llvm/test/CodeGen/Hexagon/trunc-mpy.ll
--- a/llvm/test/CodeGen/Hexagon/trunc-mpy.ll
+++ b/llvm/test/CodeGen/Hexagon/trunc-mpy.ll
@@ -5,13 +5,13 @@
 
 ; CHECK-LABEL: f0:
 ; CHECK-NOT:  r{{[0-9]+}}:{{[0-9]+}} = mpy(
-define void @f0(ptr nocapture readonly %a0, ptr nocapture %a1) #0 {
+define void @f0(ptr nocapture readonly %a0, ptr nocapture %a1, i1 %c0) #0 {
 b0:
   %v0 = getelementptr i32, ptr %a1, i32 448
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   %v1 = getelementptr inbounds i32, ptr %a0, i32 64
@@ -33,13 +33,13 @@
 
 ; CHECK-LABEL: f1:
 ; CHECK: r{{[0-9]+}} = mpy(
-define void @f1(i32 %a0, i32 %a1, ptr nocapture readonly %a2, ptr nocapture %a3) #0 {
+define void @f1(i32 %a0, i32 %a1, ptr nocapture readonly %a2, ptr nocapture %a3, i1 %c0) #0 {
 b0:
   %v0 = getelementptr i32, ptr %a3, i32 448
   br label %b1
 
 b1:                                               ; preds = %b1, %b0
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b2:                                               ; preds = %b1
   %v1 = getelementptr inbounds i32, ptr %a2, i32 64
diff --git a/llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll b/llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
--- a/llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
+++ b/llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
@@ -8,17 +8,17 @@
 %s.0 = type { [5 x [4 x i8]], i32, i32, i32, i32 }
 
 ; Function Attrs: nounwind
-define i32 @f0(ptr nocapture readonly %a0, ptr nocapture %a1, ptr nocapture readonly %a2, ptr nocapture readonly %a3, i32 %a4, i32 %a5, i32 %a6, ptr nocapture readonly %a7) #0 {
+define i32 @f0(ptr nocapture readonly %a0, ptr nocapture %a1, ptr nocapture readonly %a2, ptr nocapture readonly %a3, i32 %a4, i32 %a5, i32 %a6, ptr nocapture readonly %a7, i1 %c0, i1 %c1) #0 {
 b0:
   %v0 = alloca i8, i32 %a4, align 128
-  br i1 undef, label %b1, label %b5
+  br i1 %c0, label %b1, label %b5
 
 b1:                                               ; preds = %b0
   %v1 = icmp sgt i32 %a5, 2
   br label %b2
 
 b2:                                               ; preds = %b3, %b2, %b1
-  br i1 undef, label %b3, label %b2
+  br i1 %c1, label %b3, label %b2
 
 b3:                                               ; preds = %b2
   call void @f1(ptr undef, ptr undef, ptr nonnull %v0, i32 %a4, i32 %a5, ptr %a7)
diff --git a/llvm/test/CodeGen/Hexagon/v60-cur.ll b/llvm/test/CodeGen/Hexagon/v60-cur.ll
--- a/llvm/test/CodeGen/Hexagon/v60-cur.ll
+++ b/llvm/test/CodeGen/Hexagon/v60-cur.ll
@@ -5,9 +5,9 @@
 ; CHECK: v{{[0-9]*}}.cur
 
 ; Function Attrs: nounwind
-define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, ptr %a3, ptr %a4) #0 {
+define void @f0(ptr noalias nocapture readonly %a0, i32 %a1, i32 %a2, ptr %a3, ptr %a4, i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/v6vec_zero.ll b/llvm/test/CodeGen/Hexagon/v6vec_zero.ll
--- a/llvm/test/CodeGen/Hexagon/v6vec_zero.ll
+++ b/llvm/test/CodeGen/Hexagon/v6vec_zero.ll
@@ -5,9 +5,9 @@
 ; generating a v16i32 constant pool node.
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b2
+  br i1 %c0, label %b1, label %b2
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi i32 [ 0, %b1 ], [ 0, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/vassign-to-combine.ll b/llvm/test/CodeGen/Hexagon/vassign-to-combine.ll
--- a/llvm/test/CodeGen/Hexagon/vassign-to-combine.ll
+++ b/llvm/test/CodeGen/Hexagon/vassign-to-combine.ll
@@ -16,11 +16,11 @@
 declare <64 x i32> @llvm.hexagon.V6.vaddubh.128B(<32 x i32>, <32 x i32>) #0
 declare <64 x i32> @llvm.hexagon.V6.vmpyub.128B(<32 x i32>, i32) #0
 
-define void @f0(ptr %a0, ptr %a1) local_unnamed_addr #1 {
+define void @f0(ptr %a0, ptr %a1, i1 %c0) local_unnamed_addr #1 {
 b0:
   %v0 = load <32 x i32>, ptr %a0, align 128
   %v1 = load <32 x i32>, ptr %a1, align 128
-  br i1 undef, label %b2, label %b1
+  br i1 %c0, label %b2, label %b1
 
 b1:                                               ; preds = %b0
   %v2 = tail call <32 x i32> @llvm.hexagon.V6.vlalignbi.128B(<32 x i32> %v0, <32 x i32> %v1, i32 1)
diff --git a/llvm/test/CodeGen/Hexagon/vcombine128_to_req_seq.ll b/llvm/test/CodeGen/Hexagon/vcombine128_to_req_seq.ll
--- a/llvm/test/CodeGen/Hexagon/vcombine128_to_req_seq.ll
+++ b/llvm/test/CodeGen/Hexagon/vcombine128_to_req_seq.ll
@@ -29,9 +29,9 @@
 
 ; CHECK-LABEL: f1:
 ; CHECK-NOT: vcombine
-define void @f1() #0 {
+define void @f1(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b1, %b0
   %v0 = phi <64 x i32> [ %v6, %b1 ], [ undef, %b0 ]
diff --git a/llvm/test/CodeGen/Hexagon/vect-zero_extend.ll b/llvm/test/CodeGen/Hexagon/vect-zero_extend.ll
--- a/llvm/test/CodeGen/Hexagon/vect-zero_extend.ll
+++ b/llvm/test/CodeGen/Hexagon/vect-zero_extend.ll
@@ -5,9 +5,9 @@
 target triple = "hexagon-unknown-linux-gnu"
 
 ; Function Attrs: nounwind
-define void @f0() #0 {
+define void @f0(i1 %c0) #0 {
 b0:
-  br i1 undef, label %b1, label %b3
+  br i1 %c0, label %b1, label %b3
 
 b1:                                               ; preds = %b0
   br label %b2
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-bitcast-1.ll b/llvm/test/CodeGen/Hexagon/vect/vect-bitcast-1.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-bitcast-1.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-bitcast-1.ll
@@ -5,7 +5,7 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-a0:0-n32"
 target triple = "hexagon-unknown-linux-gnu"
 
-define void @foo() nounwind {
+define void @foo(i1 %c0) nounwind {
 entry:
   br label %while.body
 
@@ -23,7 +23,7 @@
   unreachable
 
 if.else:                                          ; preds = %lab_ci.exit
-  br i1 undef, label %if.then12, label %if.else17
+  br i1 %c0, label %if.then12, label %if.else17
 
 if.then12:                                        ; preds = %if.else
   br label %while.body
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-bitcast.ll b/llvm/test/CodeGen/Hexagon/vect/vect-bitcast.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-bitcast.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-bitcast.ll
@@ -5,18 +5,18 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
 target triple = "hexagon"
 
-define void @foo() nounwind {
+define void @foo(i1 %c0, i1 %c1) nounwind {
 entry:
   br label %while.body
 
 while.body:                                       ; preds = %if.then155, %if.then12, %if.then, %entry
-  br i1 undef, label %if.then, label %if.else
+  br i1 %c0, label %if.then, label %if.else
 
 if.then:                                          ; preds = %while.body
   br label %while.body
 
 if.else:                                          ; preds = %while.body
-  br i1 undef, label %if.then12, label %if.else17
+  br i1 %c1, label %if.then12, label %if.else17
 
 if.then12:                                        ; preds = %if.else
   br label %while.body
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-illegal-type.ll b/llvm/test/CodeGen/Hexagon/vect/vect-illegal-type.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-illegal-type.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-illegal-type.ll
@@ -7,18 +7,18 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-a0:0-n32"
 target triple = "hexagon-unknown-linux-gnu"
 
-define void @foo() nounwind {
+define void @foo(i1 %c0, i1 %c1, i1 %c2) nounwind {
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c0, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body
   br label %for.body71
 
 for.body71:                                       ; preds = %for.body71, %for.end
-  br i1 undef, label %for.end96, label %for.body71
+  br i1 %c1, label %for.end96, label %for.body71
 
 for.end96:                                        ; preds = %for.body71
   switch i32 undef, label %sw.epilog [
@@ -33,7 +33,7 @@
   br label %for.body664
 
 for.body664:                                      ; preds = %for.body664, %for.cond591
-  br i1 undef, label %for.end670, label %for.body664
+  br i1 %c2, label %for.end670, label %for.body664
 
 for.end670:                                       ; preds = %for.body664
   br label %sw.epilog
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-load.ll b/llvm/test/CodeGen/Hexagon/vect/vect-load.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-load.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-load.ll
@@ -8,15 +8,15 @@
 %struct.ext_hdrs.10.65.142.274.307.318.329.681.692.703.714.725.736.758.791.802.846.857.868.879.890.901.945.956.958 = type { i8, i8, i8, i8, i8, i8, i16, i32, [8 x %struct.hcdc_ext_vec.9.64.141.273.306.317.328.680.691.702.713.724.735.757.790.801.845.856.867.878.889.900.944.955.957] }
 %struct.hcdc_ext_vec.9.64.141.273.306.317.328.680.691.702.713.724.735.757.790.801.845.856.867.878.889.900.944.955.957 = type { i8, i8, i16 }
 
-define void @foo(ptr %hc_ext_info) nounwind {
+define void @foo(ptr %hc_ext_info, i1 %c0, i1 %c1, i1 %c2, i1 %c3) nounwind {
 entry:
-  br i1 undef, label %if.end, label %if.then
+  br i1 %c0, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   unreachable
 
 if.end:                                           ; preds = %entry
-  br i1 undef, label %if.end5, label %if.then3
+  br i1 %c1, label %if.end5, label %if.then3
 
 if.then3:                                         ; preds = %if.end
   br label %if.end5
@@ -51,13 +51,13 @@
   unreachable
 
 if.then195:                                       ; preds = %while.body
-  br i1 undef, label %if.end274, label %if.then202
+  br i1 %c2, label %if.end274, label %if.then202
 
 if.then202:                                       ; preds = %if.then195
   br label %while.body222
 
 while.body222:                                    ; preds = %while.body222, %if.then202
-  br i1 undef, label %if.end240, label %while.body222
+  br i1 %c3, label %if.end240, label %while.body222
 
 if.end240:                                        ; preds = %while.body222
   %_p_vec_full100 = load <2 x i8>, ptr undef, align 8
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-store-v2i16.ll b/llvm/test/CodeGen/Hexagon/vect/vect-store-v2i16.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-store-v2i16.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-store-v2i16.ll
@@ -4,7 +4,7 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-a0:0-n32"
 target triple = "hexagon-unknown-linux-gnu"
 
-define void @foobar() nounwind {
+define void @foobar(i1 %c0, i1 %c1, i1 %c2, i1 %c3) nounwind {
 entry:
   br label %for.cond7.preheader.single_entry.i
 
@@ -16,19 +16,19 @@
   br label %for.body.i428
 
 for.body.i428:                                    ; preds = %for.body.i428, %foo_32.exit
-  br i1 undef, label %foo_12.exit, label %for.body.i428
+  br i1 %c0, label %foo_12.exit, label %for.body.i428
 
 foo_12.exit:                            ; preds = %for.body.i428
   br label %for.body.i.i
 
 for.body.i.i:                                     ; preds = %for.body.i.i, %foo_12.exit
-  br i1 undef, label %foo_14.exit, label %for.body.i.i
+  br i1 %c1, label %foo_14.exit, label %for.body.i.i
 
 foo_14.exit:                         ; preds = %for.body.i.i
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %foo_14.exit
-  br i1 undef, label %for.end, label %for.body
+  br i1 %c2, label %for.end, label %for.body
 
 for.end:                                          ; preds = %for.body
   %storemerge294 = select i1 undef, i32 32767, i32 undef
@@ -46,6 +46,6 @@
   %shr100293p_vec = lshr <2 x i32> %mulp_vec, <i32 15, i32 15>
   %1 = trunc <2 x i32> %shr100293p_vec to <2 x i16>
   store <2 x i16> %1, ptr undef, align 4
-  br i1 undef, label %polly.loop_body377, label %polly.loop_after378
+  br i1 %c3, label %polly.loop_body377, label %polly.loop_after378
 }
 
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-truncate.ll b/llvm/test/CodeGen/Hexagon/vect/vect-truncate.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-truncate.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-truncate.ll
@@ -5,12 +5,12 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-a0:0-n32"
 target triple = "hexagon-unknown-linux-gnu"
 
-define void @Autocorr() nounwind {
+define void @Autocorr(i1 %c0, i1 %c1, i1 %c2) nounwind {
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
-  br i1 undef, label %polly.loop_header43, label %for.body
+  br i1 %c0, label %polly.loop_header43, label %for.body
 
 do.cond:                                          ; preds = %polly.loop_header
   unreachable
@@ -30,10 +30,10 @@
   br label %polly.loop_header
 
 polly.loop_after45:                               ; preds = %polly.loop_header43
-  br i1 undef, label %polly.loop_header, label %do.end
+  br i1 %c1, label %polly.loop_header, label %do.end
 
 polly.loop_header43:                              ; preds = %polly.loop_body44, %for.body
-  br i1 undef, label %polly.loop_body44, label %polly.loop_after45
+  br i1 %c2, label %polly.loop_body44, label %polly.loop_after45
 
 polly.loop_body44:                                ; preds = %polly.loop_header43
   br label %polly.loop_header43
diff --git a/llvm/test/CodeGen/Hexagon/vect/vect-zeroextend.ll b/llvm/test/CodeGen/Hexagon/vect/vect-zeroextend.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vect-zeroextend.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vect-zeroextend.ll
@@ -5,9 +5,9 @@
 target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-a0:0-n32"
 target triple = "hexagon-unknown-linux-gnu"
 
-define void @foo() nounwind {
+define void @foo(i1 %c0) nounwind {
 entry:
-  br i1 undef, label %for.cond30.preheader.lr.ph, label %for.end425
+  br i1 %c0, label %for.cond30.preheader.lr.ph, label %for.end425
 
 for.cond30.preheader.lr.ph:                       ; preds = %entry
   br label %for.cond37.preheader
diff --git a/llvm/test/CodeGen/Hexagon/vect/vsplat-v8i8.ll b/llvm/test/CodeGen/Hexagon/vect/vsplat-v8i8.ll
--- a/llvm/test/CodeGen/Hexagon/vect/vsplat-v8i8.ll
+++ b/llvm/test/CodeGen/Hexagon/vect/vsplat-v8i8.ll
@@ -8,7 +8,7 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define i32 @fred() #0 {
+define i32 @fred(i1 %c0) #0 {
 b0:
   br label %b1
 
@@ -25,7 +25,7 @@
   %v9 = shufflevector <16 x i8> %v8, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
   %v10 = xor <16 x i8> %v8, %v9
   %v11 = extractelement <16 x i8> %v10, i32 0
-  br i1 undef, label %b14, label %b12
+  br i1 %c0, label %b14, label %b12
 
 b12:                                              ; preds = %b4
   %v13 = xor i8 undef, %v11
diff --git a/llvm/test/CodeGen/Hexagon/vselect-pseudo.ll b/llvm/test/CodeGen/Hexagon/vselect-pseudo.ll
--- a/llvm/test/CodeGen/Hexagon/vselect-pseudo.ll
+++ b/llvm/test/CodeGen/Hexagon/vselect-pseudo.ll
@@ -4,7 +4,7 @@
 target triple = "hexagon"
 
 ; Function Attrs: nounwind
-define void @fred() #0 {
+define void @fred(i1 %c0) #0 {
 entry:
   br label %for.body9.us
 
@@ -17,7 +17,7 @@
   %3 = tail call <32 x i32> @llvm.hexagon.V6.vshuffvdd(<16 x i32> undef, <16 x i32> %2, i32 62)
   %4 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %3)
   store <16 x i32> %4, ptr undef, align 64
-  br i1 undef, label %for.body9.us, label %for.body43.us.preheader
+  br i1 %c0, label %for.body9.us, label %for.body43.us.preheader
 
 for.body43.us.preheader:                          ; preds = %for.body9.us
   ret void