diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -802,6 +802,9 @@ setOperationAction({ISD::VECTOR_REVERSE, ISD::VECTOR_SPLICE}, VT, Custom); setOperationAction(FloatingPointVPOps, VT, Custom); + setOperationAction({ISD::STRICT_FADD, ISD::STRICT_FSUB, ISD::STRICT_FMUL, + ISD::STRICT_FDIV, ISD::STRICT_FMA}, + VT, Legal); }; // Sets common extload/truncstore actions on RVV floating-point vector diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td @@ -469,22 +469,25 @@ foreach vtiToWti = AllWidenableFloatVectors in { defvar vti = vtiToWti.Vti; defvar wti = vtiToWti.Wti; - def : Pat<(fma (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs1), - (vti.Mask true_mask), (XLenVT srcvalue))), - (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue))), - (wti.Vector wti.RegClass:$rd)), + def : Pat<(any_fma (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs1), + (vti.Mask true_mask), + (XLenVT srcvalue))), + (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue))), + (wti.Vector wti.RegClass:$rd)), (!cast(instruction_name#"_VV_"#vti.LMul.MX) wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (wti.Vector (SplatFPOp - (fpext_oneuse vti.ScalarRegClass:$rs1))), - (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue))), - (wti.Vector wti.RegClass:$rd)), + def : Pat<(any_fma (wti.Vector (SplatFPOp + (fpext_oneuse vti.ScalarRegClass:$rs1))), + (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue))), + (wti.Vector wti.RegClass:$rd)), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; @@ -495,27 +498,31 @@ foreach vtiToWti = AllWidenableFloatVectors in { defvar vti = vtiToWti.Vti; defvar wti = vtiToWti.Wti; - def : Pat<(fma (fneg (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs1), - (vti.Mask true_mask), (XLenVT srcvalue)))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - (fneg wti.RegClass:$rd)), + def : Pat<(any_fma (fneg (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs1), + (vti.Mask true_mask), + (XLenVT srcvalue)))), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + (fneg wti.RegClass:$rd)), (!cast(instruction_name#"_VV_"#vti.LMul.MX) wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)), - (fneg (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)))), - (fneg wti.RegClass:$rd)), + def : Pat<(any_fma (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)), + (fneg (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)))), + (fneg wti.RegClass:$rd)), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (fneg (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - (fneg wti.RegClass:$rd)), + def : Pat<(any_fma (fneg (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + (fneg wti.RegClass:$rd)), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; @@ -526,19 +533,22 @@ foreach vtiToWti = AllWidenableFloatVectors in { defvar vti = vtiToWti.Vti; defvar wti = vtiToWti.Wti; - def : Pat<(fma (wti.Vector (riscv_fpextend_vl_oneuse + def : Pat<(any_fma (wti.Vector (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs1), (vti.Mask true_mask), (XLenVT srcvalue))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - (fneg wti.RegClass:$rd)), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + (fneg wti.RegClass:$rd)), (!cast(instruction_name#"_VV_"#vti.LMul.MX) wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - (fneg wti.RegClass:$rd)), + def : Pat<(any_fma (wti.Vector (SplatFPOp + (fpext_oneuse vti.ScalarRegClass:$rs1))), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + (fneg wti.RegClass:$rd)), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; @@ -549,27 +559,32 @@ foreach vtiToWti = AllWidenableFloatVectors in { defvar vti = vtiToWti.Vti; defvar wti = vtiToWti.Wti; - def : Pat<(fma (fneg (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs1), - (vti.Mask true_mask), (XLenVT srcvalue)))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - wti.RegClass:$rd), + def : Pat<(any_fma (fneg (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs1), + (vti.Mask true_mask), + (XLenVT srcvalue)))), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + wti.RegClass:$rd), (!cast(instruction_name#"_VV_"#vti.LMul.MX) wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1))), - (fneg (wti.Vector (riscv_fpextend_vl_oneuse - (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)))), - wti.RegClass:$rd), + def : Pat<(any_fma (wti.Vector (SplatFPOp + (fpext_oneuse vti.ScalarRegClass:$rs1))), + (fneg (wti.Vector (riscv_fpextend_vl_oneuse + (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)))), + wti.RegClass:$rd), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fma (fneg (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))), - (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), - (vti.Mask true_mask), (XLenVT srcvalue)), - wti.RegClass:$rd), + def : Pat<(any_fma (fneg (wti.Vector (SplatFPOp (fpext_oneuse vti.ScalarRegClass:$rs1)))), + (riscv_fpextend_vl_oneuse (vti.Vector vti.RegClass:$rs2), + (vti.Mask true_mask), + (XLenVT srcvalue)), + wti.RegClass:$rd), (!cast(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX) wti.RegClass:$rd, vti.ScalarRegClass:$rs1, vti.RegClass:$rs2, vti.AVL, vti.Log2SEW, TAIL_AGNOSTIC)>; @@ -827,79 +842,88 @@ // 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions defm : VPatBinaryFPSDNode_VV_VF; +defm : VPatBinaryFPSDNode_VV_VF; defm : VPatBinaryFPSDNode_VV_VF; +defm : VPatBinaryFPSDNode_VV_VF; defm : VPatBinaryFPSDNode_R_VF; +defm : VPatBinaryFPSDNode_R_VF; // 13.3. Vector Widening Floating-Point Add/Subtract Instructions defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF; +defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF; defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF; +defm : VPatWidenBinaryFPSDNode_VV_VF_WV_WF; // 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions defm : VPatBinaryFPSDNode_VV_VF; +defm : VPatBinaryFPSDNode_VV_VF; defm : VPatBinaryFPSDNode_VV_VF; +defm : VPatBinaryFPSDNode_VV_VF; defm : VPatBinaryFPSDNode_R_VF; +defm : VPatBinaryFPSDNode_R_VF; // 13.5. Vector Widening Floating-Point Multiply Instructions defm : VPatWidenBinaryFPSDNode_VV_VF; +defm : VPatWidenBinaryFPSDNode_VV_VF; // 13.6 Vector Single-Width Floating-Point Fused Multiply-Add Instructions. foreach fvti = AllFloatVectors in { // NOTE: We choose VFMADD because it has the most commuting freedom. So it // works best with how TwoAddressInstructionPass tries commuting. defvar suffix = fvti.LMul.MX; - def : Pat<(fvti.Vector (fma fvti.RegClass:$rs1, fvti.RegClass:$rd, - fvti.RegClass:$rs2)), + def : Pat<(fvti.Vector (any_fma fvti.RegClass:$rs1, fvti.RegClass:$rd, + fvti.RegClass:$rs2)), (!cast("PseudoVFMADD_VV_"# suffix) fvti.RegClass:$rd, fvti.RegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma fvti.RegClass:$rs1, fvti.RegClass:$rd, - (fneg fvti.RegClass:$rs2))), + def : Pat<(fvti.Vector (any_fma fvti.RegClass:$rs1, fvti.RegClass:$rd, + (fneg fvti.RegClass:$rs2))), (!cast("PseudoVFMSUB_VV_"# suffix) fvti.RegClass:$rd, fvti.RegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (fneg fvti.RegClass:$rs1), fvti.RegClass:$rd, - (fneg fvti.RegClass:$rs2))), + def : Pat<(fvti.Vector (any_fma (fneg fvti.RegClass:$rs1), fvti.RegClass:$rd, + (fneg fvti.RegClass:$rs2))), (!cast("PseudoVFNMADD_VV_"# suffix) fvti.RegClass:$rd, fvti.RegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (fneg fvti.RegClass:$rs1), fvti.RegClass:$rd, - fvti.RegClass:$rs2)), + def : Pat<(fvti.Vector (any_fma (fneg fvti.RegClass:$rs1), fvti.RegClass:$rd, + fvti.RegClass:$rs2)), (!cast("PseudoVFNMSUB_VV_"# suffix) fvti.RegClass:$rd, fvti.RegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; // The choice of VFMADD here is arbitrary, vfmadd.vf and vfmacc.vf are equally // commutable. - def : Pat<(fvti.Vector (fma (SplatFPOp fvti.ScalarRegClass:$rs1), - fvti.RegClass:$rd, fvti.RegClass:$rs2)), + def : Pat<(fvti.Vector (any_fma (SplatFPOp fvti.ScalarRegClass:$rs1), + fvti.RegClass:$rd, fvti.RegClass:$rs2)), (!cast("PseudoVFMADD_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (SplatFPOp fvti.ScalarRegClass:$rs1), - fvti.RegClass:$rd, (fneg fvti.RegClass:$rs2))), + def : Pat<(fvti.Vector (any_fma (SplatFPOp fvti.ScalarRegClass:$rs1), + fvti.RegClass:$rd, (fneg fvti.RegClass:$rs2))), (!cast("PseudoVFMSUB_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (SplatFPOp fvti.ScalarRegClass:$rs1), - (fneg fvti.RegClass:$rd), (fneg fvti.RegClass:$rs2))), + def : Pat<(fvti.Vector (any_fma (SplatFPOp fvti.ScalarRegClass:$rs1), + (fneg fvti.RegClass:$rd), (fneg fvti.RegClass:$rs2))), (!cast("PseudoVFNMADD_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (SplatFPOp fvti.ScalarRegClass:$rs1), - (fneg fvti.RegClass:$rd), fvti.RegClass:$rs2)), + def : Pat<(fvti.Vector (any_fma (SplatFPOp fvti.ScalarRegClass:$rs1), + (fneg fvti.RegClass:$rd), fvti.RegClass:$rs2)), (!cast("PseudoVFNMSUB_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; // The splat might be negated. - def : Pat<(fvti.Vector (fma (fneg (SplatFPOp fvti.ScalarRegClass:$rs1)), - fvti.RegClass:$rd, (fneg fvti.RegClass:$rs2))), + def : Pat<(fvti.Vector (any_fma (fneg (SplatFPOp fvti.ScalarRegClass:$rs1)), + fvti.RegClass:$rd, (fneg fvti.RegClass:$rs2))), (!cast("PseudoVFNMADD_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; - def : Pat<(fvti.Vector (fma (fneg (SplatFPOp fvti.ScalarRegClass:$rs1)), - fvti.RegClass:$rd, fvti.RegClass:$rs2)), + def : Pat<(fvti.Vector (any_fma (fneg (SplatFPOp fvti.ScalarRegClass:$rs1)), + fvti.RegClass:$rd, fvti.RegClass:$rs2)), (!cast("PseudoVFNMSUB_V" # fvti.ScalarSuffix # "_" # suffix) fvti.RegClass:$rd, fvti.ScalarRegClass:$rs1, fvti.RegClass:$rs2, fvti.AVL, fvti.Log2SEW, TAIL_AGNOSTIC)>; diff --git a/llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll @@ -0,0 +1,365 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fadd.nxv1f16(, , metadata, metadata) +define @vfadd_vv_nxv1f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv1f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv1f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv1f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv1f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv2f16(, , metadata, metadata) +define @vfadd_vv_nxv2f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv2f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv2f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv2f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv2f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv4f16(, , metadata, metadata) +define @vfadd_vv_nxv4f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv4f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv4f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv4f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv4f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv8f16(, , metadata, metadata) +define @vfadd_vv_nxv8f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv8f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv8f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv8f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv16f16(, , metadata, metadata) +define @vfadd_vv_nxv16f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv16f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv16f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv16f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv16f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv32f16(, , metadata, metadata) +define @vfadd_vv_nxv32f16( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv32f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv32f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv32f16( %va, half %b) { +; CHECK-LABEL: vfadd_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv32f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv1f32(, , metadata, metadata) +define @vfadd_vv_nxv1f32( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv1f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv1f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv1f32( %va, float %b) { +; CHECK-LABEL: vfadd_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv1f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv2f32(, , metadata, metadata) +define @vfadd_vv_nxv2f32( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv2f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv2f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv2f32( %va, float %b) { +; CHECK-LABEL: vfadd_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv2f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv4f32(, , metadata, metadata) +define @vfadd_vv_nxv4f32( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv4f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv4f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv4f32( %va, float %b) { +; CHECK-LABEL: vfadd_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv4f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv8f32(, , metadata, metadata) +define @vfadd_vv_nxv8f32( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv8f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv8f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfadd_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv8f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv16f32(, , metadata, metadata) +define @vfadd_vv_nxv16f32( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv16f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv16f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv16f32( %va, float %b) { +; CHECK-LABEL: vfadd_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv16f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv1f64(, , metadata, metadata) +define @vfadd_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv1f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv1f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv1f64( %va, double %b) { +; CHECK-LABEL: vfadd_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv2f64(, , metadata, metadata) +define @vfadd_vv_nxv2f64( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv2f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv2f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv2f64( %va, double %b) { +; CHECK-LABEL: vfadd_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv2f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv4f64(, , metadata, metadata) +define @vfadd_vv_nxv4f64( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv4f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv4f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv4f64( %va, double %b) { +; CHECK-LABEL: vfadd_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv4f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fadd.nxv8f64(, , metadata, metadata) +define @vfadd_vv_nxv8f64( %va, %vb) { +; CHECK-LABEL: vfadd_vv_nxv8f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfadd.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fadd.nxv8f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfadd_vf_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfadd_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfadd.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fadd.nxv8f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll @@ -0,0 +1,401 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fdiv.nxv1f16(, , metadata, metadata) +define @vfdiv_vv_nxv1f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv1f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv1f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv1f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv1f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv2f16(, , metadata, metadata) +define @vfdiv_vv_nxv2f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv2f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv2f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv2f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv2f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv4f16(, , metadata, metadata) +define @vfdiv_vv_nxv4f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv4f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv4f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv4f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv4f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv8f16(, , metadata, metadata) +define @vfdiv_vv_nxv8f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv8f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv8f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_fv_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfdiv_fv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfrdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f16( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv16f16(, , metadata, metadata) +define @vfdiv_vv_nxv16f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv16f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv16f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv16f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv16f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv32f16(, , metadata, metadata) +define @vfdiv_vv_nxv32f16( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv32f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv32f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv32f16( %va, half %b) { +; CHECK-LABEL: vfdiv_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv32f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv1f32(, , metadata, metadata) +define @vfdiv_vv_nxv1f32( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv1f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv1f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv1f32( %va, float %b) { +; CHECK-LABEL: vfdiv_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv1f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv2f32(, , metadata, metadata) +define @vfdiv_vv_nxv2f32( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv2f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv2f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv2f32( %va, float %b) { +; CHECK-LABEL: vfdiv_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv2f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv4f32(, , metadata, metadata) +define @vfdiv_vv_nxv4f32( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv4f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv4f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv4f32( %va, float %b) { +; CHECK-LABEL: vfdiv_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv4f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv8f32(, , metadata, metadata) +define @vfdiv_vv_nxv8f32( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv8f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv8f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfdiv_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_fv_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfdiv_fv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfrdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f32( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv16f32(, , metadata, metadata) +define @vfdiv_vv_nxv16f32( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv16f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv16f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv16f32( %va, float %b) { +; CHECK-LABEL: vfdiv_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv16f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv1f64(, , metadata, metadata) +define @vfdiv_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv1f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv1f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv1f64( %va, double %b) { +; CHECK-LABEL: vfdiv_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv2f64(, , metadata, metadata) +define @vfdiv_vv_nxv2f64( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv2f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv2f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv2f64( %va, double %b) { +; CHECK-LABEL: vfdiv_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv2f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv4f64(, , metadata, metadata) +define @vfdiv_vv_nxv4f64( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv4f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv4f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv4f64( %va, double %b) { +; CHECK-LABEL: vfdiv_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv4f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fdiv.nxv8f64(, , metadata, metadata) +define @vfdiv_vv_nxv8f64( %va, %vb) { +; CHECK-LABEL: vfdiv_vv_nxv8f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfdiv.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fdiv.nxv8f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_vf_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfdiv_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfdiv_fv_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfdiv_fv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfrdiv.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fdiv.nxv8f64( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll @@ -0,0 +1,371 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +; This tests a mix of vfmacc and vfmadd by using different operand orders to +; trigger commuting in TwoAddressInstructionPass. + +declare @llvm.experimental.constrained.fma.v1f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv1f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v1f16( %va, %vb, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv1f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v1f16( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv2f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v10, v9 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v2f16( %va, %vc, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv2f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v2f16( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv4f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v4f16( %vb, %va, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv4f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v4f16( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv8f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmacc.vv v8, v12, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %vc, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv8f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv16f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v16, v12 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v16f16( %vc, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv16f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v16f16( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v32f16(, , , metadata, metadata) + +define @vfmadd_vv_nxv32f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re16.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmacc.vv v8, v16, v24 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v32f16( %vc, %vb, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv32f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmadd_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v32f16( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f32(, , , metadata, metadata) + +define @vfmadd_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %vb, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv1f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmadd_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f32(, , , metadata, metadata) + +define @vfmadd_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v10, v9 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v2f32( %va, %vc, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv2f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmadd_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v2f32( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f32(, , , metadata, metadata) + +define @vfmadd_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v10, v12 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v4f32( %vb, %va, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv4f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmadd_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v4f32( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f32(, , , metadata, metadata) + +define @vfmadd_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmacc.vv v8, v16, v12 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %vc, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv8f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmadd_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f32(, , , metadata, metadata) + +define @vfmadd_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re32.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v24, v16 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v16f32( %vc, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv16f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmadd_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v16f32( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f64(, , , metadata, metadata) + +define @vfmadd_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v1f64( %va, %vb, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv1f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmadd_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v1f64( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f64(, , , metadata, metadata) + +define @vfmadd_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v12, v10 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v2f64( %va, %vc, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv2f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmadd_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v2f64( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f64(, , , metadata, metadata) + +define @vfmadd_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmadd.vv v8, v12, v16 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v4f64( %vb, %va, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv4f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmadd_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmadd.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v4f64( %va, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f64(, , , metadata, metadata) + +define @vfmadd_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmadd_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re64.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmacc.vv v8, v16, v24 +; CHECK-NEXT: ret + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %vc, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmadd_vf_nxv8f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmadd_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %splat, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll @@ -0,0 +1,401 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +; This tests a mix of vfmsac and vfmsub by using different operand orders to +; trigger commuting in TwoAddressInstructionPass. + +declare @llvm.experimental.constrained.fma.v1f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv1f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v1f16( %va, %vb, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv1f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f16( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv2f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f16( %va, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv2f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f16( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv4f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f16( %vb, %va, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv4f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f16( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv8f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmsac.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv8f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv16f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f16( %vc, %va, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv16f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f16( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v32f16(, , , metadata, metadata) + +define @vfmsub_vv_nxv32f16( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re16.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmsac.vv v8, v16, v24 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v32f16( %vc, %vb, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv32f16( %va, %vb, half %c) { +; CHECK-LABEL: vfmsub_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v32f16( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f32(, , , metadata, metadata) + +define @vfmsub_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %vb, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv1f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmsub_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f32(, , , metadata, metadata) + +define @vfmsub_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f32( %va, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv2f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmsub_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f32( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f32(, , , metadata, metadata) + +define @vfmsub_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v10, v12 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f32( %vb, %va, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv4f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmsub_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f32( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f32(, , , metadata, metadata) + +define @vfmsub_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmsac.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv8f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmsub_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f32(, , , metadata, metadata) + +define @vfmsub_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re32.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v24, v16 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f32( %vc, %va, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv16f32( %va, %vb, float %c) { +; CHECK-LABEL: vfmsub_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f32( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f64(, , , metadata, metadata) + +define @vfmsub_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v1f64( %va, %vb, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv1f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmsub_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f64( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f64(, , , metadata, metadata) + +define @vfmsub_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f64( %va, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv2f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmsub_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f64( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f64(, , , metadata, metadata) + +define @vfmsub_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmsub.vv v8, v12, v16 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f64( %vb, %va, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv4f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmsub_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmsub.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f64( %va, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f64(, , , metadata, metadata) + +define @vfmsub_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfmsub_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re64.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmsac.vv v8, v16, v24 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %vc, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfmsub_vf_nxv8f64( %va, %vb, double %c) { +; CHECK-LABEL: vfmsub_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %splat, %neg,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll @@ -0,0 +1,365 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fmul.nxv1f16(, , metadata, metadata) +define @vfmul_vv_nxv1f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv1f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv1f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv1f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv1f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv2f16(, , metadata, metadata) +define @vfmul_vv_nxv2f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv2f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv2f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv2f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv2f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv4f16(, , metadata, metadata) +define @vfmul_vv_nxv4f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv4f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv4f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv4f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv4f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv8f16(, , metadata, metadata) +define @vfmul_vv_nxv8f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv8f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv8f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv8f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv16f16(, , metadata, metadata) +define @vfmul_vv_nxv16f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv16f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv16f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv16f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv16f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv32f16(, , metadata, metadata) +define @vfmul_vv_nxv32f16( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv32f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv32f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv32f16( %va, half %b) { +; CHECK-LABEL: vfmul_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv32f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv1f32(, , metadata, metadata) +define @vfmul_vv_nxv1f32( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv1f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv1f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv1f32( %va, float %b) { +; CHECK-LABEL: vfmul_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv1f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv2f32(, , metadata, metadata) +define @vfmul_vv_nxv2f32( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv2f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv2f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv2f32( %va, float %b) { +; CHECK-LABEL: vfmul_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv2f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv4f32(, , metadata, metadata) +define @vfmul_vv_nxv4f32( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv4f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv4f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv4f32( %va, float %b) { +; CHECK-LABEL: vfmul_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv4f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv8f32(, , metadata, metadata) +define @vfmul_vv_nxv8f32( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv8f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv8f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfmul_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv8f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv16f32(, , metadata, metadata) +define @vfmul_vv_nxv16f32( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv16f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv16f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv16f32( %va, float %b) { +; CHECK-LABEL: vfmul_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv16f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv1f64(, , metadata, metadata) +define @vfmul_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv1f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv1f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv1f64( %va, double %b) { +; CHECK-LABEL: vfmul_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv2f64(, , metadata, metadata) +define @vfmul_vv_nxv2f64( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv2f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv2f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv2f64( %va, double %b) { +; CHECK-LABEL: vfmul_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv2f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv4f64(, , metadata, metadata) +define @vfmul_vv_nxv4f64( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv4f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv4f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv4f64( %va, double %b) { +; CHECK-LABEL: vfmul_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv4f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fmul.nxv8f64(, , metadata, metadata) +define @vfmul_vv_nxv8f64( %va, %vb) { +; CHECK-LABEL: vfmul_vv_nxv8f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmul.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fmul.nxv8f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfmul_vf_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfmul_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfmul.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fmul.nxv8f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll @@ -0,0 +1,431 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +; This tests a mix of vfnmacc and vfnmadd by using different operand orders to +; trigger commuting in TwoAddressInstructionPass. + +declare @llvm.experimental.constrained.fma.v1f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %va + %neg2 = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v1f16( %neg, %vb, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f16( %neg, %splat, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f16( %neg, %vc, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f16( %splat, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f16( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f16( %va, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfnmacc.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f16( %neg, %vc, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfnmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv16f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %vc + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f16( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv16f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f16( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v32f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv32f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re16.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v24, v16 +; CHECK-NEXT: ret + %neg = fneg %vc + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v32f16( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv32f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v32f16( %neg, %vb, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f32( %neg, %splat, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vc + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f32( %va, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f32( %splat, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v10, v12 +; CHECK-NEXT: ret + %neg = fneg %va + %neg2 = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f32( %vb, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f32( %va, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfnmacc.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %vc + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfnmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re32.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v24, v16 +; CHECK-NEXT: ret + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f32( %vc, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv16f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v16f32( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfnmacc.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v1f64( %vc, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f64( %neg, %splat, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f64( %neg, %vc, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v2f64( %splat, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfnmadd.vv v8, v12, v16 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v4f64( %neg, %va, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfnmadd.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f64( %va, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re64.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfnmacc.vv v8, v16, v24 +; CHECK-NEXT: ret + %neg = fneg %vb + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f64( %neg, %vc, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %neg2 = fneg %va + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %neg, %neg2,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll @@ -0,0 +1,401 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +; This tests a mix of vfnmsac and vfnmsub by using different operand orders to +; trigger commuting in TwoAddressInstructionPass. + +declare @llvm.experimental.constrained.fma.v1f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v1f16( %neg, %vb, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v1f16( %neg, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f16( %neg, %vc, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f16( %splat, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f16( %neg, %va, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v4f16( %va, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfnmsac.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v8f16( %neg, %vc, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfnmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v8f16( %vb, %neg, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv16f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v16f16( %neg, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv16f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v16f16( %neg, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v32f16(, , , metadata, metadata) + +define @vfnmsub_vv_nxv32f16( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re16.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v24, v16 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v32f16( %neg, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv32f16( %va, %vb, half %c) { +; CHECK-LABEL: vfnmsub_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v32f16( %neg, %vb, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v9, v10 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f32( %va, %neg, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v1f32( %neg, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v2f32( %va, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f32( %splat, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v10, v12 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v4f32( %vb, %neg, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v4f32( %va, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfnmsac.vv v8, v16, v12 +; CHECK-NEXT: ret + %neg = fneg %vc + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %neg, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfnmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v8f32( %vb, %neg, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v16f32(, , , metadata, metadata) + +define @vfnmsub_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re32.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v24, v16 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v16f32( %vc, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv16f32( %va, %vb, float %c) { +; CHECK-LABEL: vfnmsub_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v16f32( %neg, %va, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v1f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfnmsac.vv v8, v10, v9 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v1f64( %vc, %neg, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv1f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v1f64( %neg, %splat, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v2f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v12, v10 +; CHECK-NEXT: ret + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f64( %neg, %vc, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv2f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %va + %vd = call @llvm.experimental.constrained.fma.v2f64( %splat, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v4f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfnmsub.vv v8, v12, v16 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v4f64( %neg, %va, %vc,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv4f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfnmsub.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v4f64( %va, %neg, %vb,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +declare @llvm.experimental.constrained.fma.v8f64(, , , metadata, metadata) + +define @vfnmsub_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfnmsub_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vl8re64.v v24, (a0) +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfnmsac.vv v8, v16, v24 +; CHECK-NEXT: ret + %neg = fneg %vb + %vd = call @llvm.experimental.constrained.fma.v8f64( %neg, %vc, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfnmsub_vf_nxv8f64( %va, %vb, double %c) { +; CHECK-LABEL: vfnmsub_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, double %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %neg = fneg %splat + %vd = call @llvm.experimental.constrained.fma.v8f64( %vb, %neg, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll @@ -0,0 +1,401 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fsub.nxv1f16(, , metadata, metadata) +define @vfsub_vv_nxv1f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv1f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv1f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv1f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv1f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv1f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv2f16(, , metadata, metadata) +define @vfsub_vv_nxv2f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv2f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv2f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv2f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv2f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv2f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv4f16(, , metadata, metadata) +define @vfsub_vv_nxv4f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv4f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv4f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv4f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv4f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv4f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv8f16(, , metadata, metadata) +define @vfsub_vv_nxv8f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv8f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv8f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_fv_nxv8f16( %va, half %b) { +; CHECK-LABEL: vfsub_fv_nxv8f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfrsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f16( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv16f16(, , metadata, metadata) +define @vfsub_vv_nxv16f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv16f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv16f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv16f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv16f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv16f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv32f16(, , metadata, metadata) +define @vfsub_vv_nxv32f16( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv32f16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv32f16( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv32f16( %va, half %b) { +; CHECK-LABEL: vfsub_vf_nxv32f16: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, half %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv32f16( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv1f32(, , metadata, metadata) +define @vfsub_vv_nxv1f32( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv1f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv1f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv1f32( %va, float %b) { +; CHECK-LABEL: vfsub_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv1f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv2f32(, , metadata, metadata) +define @vfsub_vv_nxv2f32( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv2f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv2f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv2f32( %va, float %b) { +; CHECK-LABEL: vfsub_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv2f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv4f32(, , metadata, metadata) +define @vfsub_vv_nxv4f32( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv4f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv4f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv4f32( %va, float %b) { +; CHECK-LABEL: vfsub_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv4f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv8f32(, , metadata, metadata) +define @vfsub_vv_nxv8f32( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv8f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv8f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfsub_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_fv_nxv8f32( %va, float %b) { +; CHECK-LABEL: vfsub_fv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfrsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f32( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv16f32(, , metadata, metadata) +define @vfsub_vv_nxv16f32( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv16f32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv16f32( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv16f32( %va, float %b) { +; CHECK-LABEL: vfsub_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv16f32( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv1f64(, , metadata, metadata) +define @vfsub_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv1f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v9 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv1f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv1f64( %va, double %b) { +; CHECK-LABEL: vfsub_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv2f64(, , metadata, metadata) +define @vfsub_vv_nxv2f64( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv2f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v10 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv2f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv2f64( %va, double %b) { +; CHECK-LABEL: vfsub_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv2f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv4f64(, , metadata, metadata) +define @vfsub_vv_nxv4f64( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv4f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v12 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv4f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv4f64( %va, double %b) { +; CHECK-LABEL: vfsub_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv4f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +declare @llvm.experimental.constrained.fsub.nxv8f64(, , metadata, metadata) +define @vfsub_vv_nxv8f64( %va, %vb) { +; CHECK-LABEL: vfsub_vv_nxv8f64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfsub.vv v8, v8, v16 +; CHECK-NEXT: ret +entry: + %vc = call @llvm.experimental.constrained.fsub.nxv8f64( %va, %vb, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_vf_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfsub_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} + +define @vfsub_fv_nxv8f64( %va, double %b) { +; CHECK-LABEL: vfsub_fv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma +; CHECK-NEXT: vfrsub.vf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, double %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = call @llvm.experimental.constrained.fsub.nxv8f64( %splat, %va, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vc +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfwadd-constrained-sdnode.ll @@ -0,0 +1,86 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fadd.nxv1f64(, , metadata, metadata) +define @vfwadd_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfwadd_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.vv v10, v8, v9 +; CHECK-NEXT: vmv1r.v v8, v10 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve = call @llvm.experimental.constrained.fadd.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwadd_vf_nxv1f64( %va, float %b) { +; CHECK-LABEL: vfwadd_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve = call @llvm.experimental.constrained.fadd.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwadd_vf_nxv1f64_2( %va, float %b) { +; CHECK-LABEL: vfwadd_vf_nxv1f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve = call @llvm.experimental.constrained.fadd.nxv1f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwadd_wv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfwadd_wv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.wv v8, v8, v9 +; CHECK-NEXT: ret + %vc = fpext %vb to + %vd = call @llvm.experimental.constrained.fadd.nxv1f64( %va, %vc, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfwadd_wf_nxv1f64( %va, float %b) { +; CHECK-LABEL: vfwadd_wf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.wf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %splat to + %vd = call @llvm.experimental.constrained.fadd.nxv1f64( %va, %vc, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfwadd_wf_nxv1f64_2( %va, float %b) { +; CHECK-LABEL: vfwadd_wf_nxv1f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwadd.wf v8, v8, fa0 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fadd.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwmacc-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfwmacc-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfwmacc-constrained-sdnode.ll @@ -0,0 +1,1312 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fma.v1f32(, , , metadata, metadata) + +define @vfwmacc_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v1f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmacc_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v1f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v1f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v1f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v1f32( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v1f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmsac_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v1f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv1f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v1f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v1f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv1f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv1f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v1f32( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v2f32(, , , metadata, metadata) + +define @vfwmacc_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v2f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmacc_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v2f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v2f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v2f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v2f32( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v2f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmsac_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v2f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv2f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v2f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v2f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv2f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv2f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v2f32( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + + +declare @llvm.experimental.constrained.fma.v4f32(, , , metadata, metadata) + +define @vfwmacc_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v4f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmacc_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v4f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v4f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v4f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v4f32( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v4f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmsac_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v4f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv4f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v4f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v4f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv4f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv4f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v4f32( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v8f32(, , , metadata, metadata) + +define @vfwmacc_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v8f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmacc_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v8f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v8f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v8f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v8f32( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v8f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmsac_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v8f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv8f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v8f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v8f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv8f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv8f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v8f32( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v16f32(, , , metadata, metadata) + +define @vfwmacc_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v16f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmacc_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v16f32( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v16f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v16f32( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v16f32( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v16f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwmsac_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v16f32( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv16f32( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v16f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v16f32( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv16f32( %va, %vb, half %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv16f32: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, half %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v16f32( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v1f64(, , , metadata, metadata) + +define @vfwmacc_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v1f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmacc_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v1f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v1f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v1f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v1f64( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v1f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmsac_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v1f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv1f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v9, v10 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v1f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v1f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv1f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v1f64( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v2f64(, , , metadata, metadata) + +define @vfwmacc_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v2f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmacc_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v2f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v2f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v2f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v2f64( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v2f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmsac_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v2f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv2f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v10, v11 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v2f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v2f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv2f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v2f64( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + + +declare @llvm.experimental.constrained.fma.v4f64(, , , metadata, metadata) + +define @vfwmacc_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v4f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmacc_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v4f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v4f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v4f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v4f64( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v4f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmsac_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v4f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv4f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v12, v14 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v4f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v4f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv4f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v4f64( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +declare @llvm.experimental.constrained.fma.v8f64(, , , metadata, metadata) + +define @vfwmacc_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmacc_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmacc.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = call @llvm.experimental.constrained.fma.v8f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwmacc_vf_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmacc_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = call @llvm.experimental.constrained.fma.v8f64( %vd, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vf +} + +define @vfwnmacc_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmacc_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v8f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_vf_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %vd + %vh = call @llvm.experimental.constrained.fma.v8f64( %vg, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwnmacc_fv_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmacc_fv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmacc.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = fneg %ve + %vh = call @llvm.experimental.constrained.fma.v8f64( %vd, %vg, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vh +} + +define @vfwmsac_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwmsac_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmsac.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v8f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwmsac_vf_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwmsac_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %va + %vg = call @llvm.experimental.constrained.fma.v8f64( %vd, %ve, %vf,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vv_nxv8f64( %va, %vb, %vc) { +; CHECK-LABEL: vfwnmsac_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vv v8, v16, v20 +; CHECK-NEXT: ret + %vd = fpext %vb to + %ve = fpext %vc to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v8f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_vf_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %vd + %vg = call @llvm.experimental.constrained.fma.v8f64( %vf, %ve, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} + +define @vfwnmsac_fv_nxv8f64( %va, %vb, float %c) { +; CHECK-LABEL: vfwnmsac_fv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwnmsac.vf v8, fa0, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %c, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = fpext %vb to + %ve = fpext %splat to + %vf = fneg %ve + %vg = call @llvm.experimental.constrained.fma.v8f64( %vd, %vf, %va,metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vg +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwmul-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfwmul-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfwmul-constrained-sdnode.ll @@ -0,0 +1,181 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fmul.nxv1f64(, , metadata, metadata) +define @vfwmul_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfwmul_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmul.vv v10, v8, v9 +; CHECK-NEXT: vmv1r.v v8, v10 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve =call @llvm.experimental.constrained.fmul.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv1f64( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmul.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve =call @llvm.experimental.constrained.fmul.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv1f64_2( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv1f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwmul.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve =call @llvm.experimental.constrained.fmul.nxv1f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +declare @llvm.experimental.constrained.fmul.nxv2f64(, , metadata, metadata) +define @vfwmul_vv_nxv2f64( %va, %vb) { +; CHECK-LABEL: vfwmul_vv_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmul.vv v10, v8, v9 +; CHECK-NEXT: vmv2r.v v8, v10 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve =call @llvm.experimental.constrained.fmul.nxv2f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv2f64( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv2f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmul.vf v10, v8, fa0 +; CHECK-NEXT: vmv2r.v v8, v10 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve =call @llvm.experimental.constrained.fmul.nxv2f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv2f64_2( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv2f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma +; CHECK-NEXT: vfwmul.vf v10, v8, fa0 +; CHECK-NEXT: vmv2r.v v8, v10 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve =call @llvm.experimental.constrained.fmul.nxv2f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +declare @llvm.experimental.constrained.fmul.nxv4f64(, , metadata, metadata) +define @vfwmul_vv_nxv4f64( %va, %vb) { +; CHECK-LABEL: vfwmul_vv_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmul.vv v12, v8, v10 +; CHECK-NEXT: vmv4r.v v8, v12 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve =call @llvm.experimental.constrained.fmul.nxv4f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv4f64( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv4f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmul.vf v12, v8, fa0 +; CHECK-NEXT: vmv4r.v v8, v12 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve =call @llvm.experimental.constrained.fmul.nxv4f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv4f64_2( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv4f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma +; CHECK-NEXT: vfwmul.vf v12, v8, fa0 +; CHECK-NEXT: vmv4r.v v8, v12 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve =call @llvm.experimental.constrained.fmul.nxv4f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +declare @llvm.experimental.constrained.fmul.nxv8f64(, , metadata, metadata) +define @vfwmul_vv_nxv8f64( %va, %vb) { +; CHECK-LABEL: vfwmul_vv_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmul.vv v16, v8, v12 +; CHECK-NEXT: vmv8r.v v8, v16 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve =call @llvm.experimental.constrained.fmul.nxv8f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv8f64( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv8f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmul.vf v16, v8, fa0 +; CHECK-NEXT: vmv8r.v v8, v16 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve =call @llvm.experimental.constrained.fmul.nxv8f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwmul_vf_nxv8f64_2( %va, float %b) { +; CHECK-LABEL: vfwmul_vf_nxv8f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma +; CHECK-NEXT: vfwmul.vf v16, v8, fa0 +; CHECK-NEXT: vmv8r.v v8, v16 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve =call @llvm.experimental.constrained.fmul.nxv8f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vfwsub-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/vfwsub-constrained-sdnode.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/vfwsub-constrained-sdnode.ll @@ -0,0 +1,86 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \ +; RUN: -verify-machineinstrs < %s | FileCheck %s + +declare @llvm.experimental.constrained.fsub.nxv1f64(, , metadata, metadata) +define @vfwsub_vv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfwsub_vv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.vv v10, v8, v9 +; CHECK-NEXT: vmv1r.v v8, v10 +; CHECK-NEXT: ret + %vc = fpext %va to + %vd = fpext %vb to + %ve = call @llvm.experimental.constrained.fsub.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwsub_vf_nxv1f64( %va, float %b) { +; CHECK-LABEL: vfwsub_vf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %vd = fpext %splat to + %ve = call @llvm.experimental.constrained.fsub.nxv1f64( %vc, %vd, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwsub_vf_nxv1f64_2( %va, float %b) { +; CHECK-LABEL: vfwsub_vf_nxv1f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.vf v9, v8, fa0 +; CHECK-NEXT: vmv1r.v v8, v9 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %va to + %ve = call @llvm.experimental.constrained.fsub.nxv1f64( %vc, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %ve +} + +define @vfwsub_wv_nxv1f64( %va, %vb) { +; CHECK-LABEL: vfwsub_wv_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.wv v8, v8, v9 +; CHECK-NEXT: ret + %vc = fpext %vb to + %vd = call @llvm.experimental.constrained.fsub.nxv1f64( %va, %vc, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfwsub_wf_nxv1f64( %va, float %b) { +; CHECK-LABEL: vfwsub_wf_nxv1f64: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.wf v8, v8, fa0 +; CHECK-NEXT: ret + %head = insertelement poison, float %b, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vc = fpext %splat to + %vd = call @llvm.experimental.constrained.fsub.nxv1f64( %va, %vc, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +} + +define @vfwsub_wf_nxv1f64_2( %va, float %b) { +; CHECK-LABEL: vfwsub_wf_nxv1f64_2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma +; CHECK-NEXT: vfwsub.wf v8, v8, fa0 +; CHECK-NEXT: ret + %fpext = fpext float %b to double + %head = insertelement poison, double %fpext, i32 0 + %splat = shufflevector %head, poison, zeroinitializer + %vd = call @llvm.experimental.constrained.fsub.nxv1f64( %va, %splat, metadata !"round.dynamic", metadata !"fpexcept.ignore") + ret %vd +}