diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -483,6 +483,9 @@
   if (Instruction *Logic = foldShiftOfShiftedBinOp(I, Builder))
     return Logic;
 
+  if (match(Op1, m_Or(m_Value(), m_SpecificInt(BitWidth - 1))))
+    return replaceOperand(I, 1, ConstantInt::get(Ty, BitWidth - 1));
+
   return nullptr;
 }
 
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -2071,8 +2071,7 @@
 ; shift (X, amt | bitwidth - 1) -> shift (X, bitwidth - 1)
 define i6 @shl_or7_eq_shl7(i6 %x, i6 %c) {
 ; CHECK-LABEL: @shl_or7_eq_shl7(
-; CHECK-NEXT:    [[AMT:%.*]] = or i6 [[C:%.*]], 5
-; CHECK-NEXT:    [[Y:%.*]] = shl nsw i6 [[X:%.*]], [[AMT]]
+; CHECK-NEXT:    [[Y:%.*]] = shl nsw i6 [[X:%.*]], 5
 ; CHECK-NEXT:    ret i6 [[Y]]
 ;
   %amt = or i6 %c, 5
@@ -2083,8 +2082,7 @@
 
 define <2 x i8> @lshr_vec_or7_eq_shl7(<2 x i8> %x, <2 x i8> %c) {
 ; CHECK-LABEL: @lshr_vec_or7_eq_shl7(
-; CHECK-NEXT:    [[AMT:%.*]] = or <2 x i8> [[C:%.*]], <i8 7, i8 7>
-; CHECK-NEXT:    [[Y:%.*]] = lshr exact <2 x i8> [[X:%.*]], [[AMT]]
+; CHECK-NEXT:    [[Y:%.*]] = lshr exact <2 x i8> [[X:%.*]], <i8 7, i8 7>
 ; CHECK-NEXT:    ret <2 x i8> [[Y]]
 ;
   %amt = or <2 x i8> %c, <i8 7, i8 7>
@@ -2095,8 +2093,7 @@
 
 define <2 x i8> @ashr_vec_or7_eq_ashr7(<2 x i8> %x, <2 x i8> %c) {
 ; CHECK-LABEL: @ashr_vec_or7_eq_ashr7(
-; CHECK-NEXT:    [[AMT:%.*]] = or <2 x i8> [[C:%.*]], <i8 7, i8 7>
-; CHECK-NEXT:    [[Y:%.*]] = ashr <2 x i8> [[X:%.*]], [[AMT]]
+; CHECK-NEXT:    [[Y:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 7, i8 7>
 ; CHECK-NEXT:    ret <2 x i8> [[Y]]
 ;
   %amt = or <2 x i8> %c, <i8 7, i8 7>