diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -980,7 +980,8 @@
 
   /// Tests whether the target uses emulated TLS as default.
   bool hasDefaultEmulatedTLS() const {
-    return isAndroid() || isOSOpenBSD() || isWindowsCygwinEnvironment();
+    return isAndroid() || isOSOpenBSD() || isWindowsCygwinEnvironment() ||
+           isOHOSFamily();
   }
 
   /// Tests whether the target uses -data-sections as default.
diff --git a/llvm/test/CodeGen/AArch64/emutls_generic.ll b/llvm/test/CodeGen/AArch64/emutls_generic.ll
--- a/llvm/test/CodeGen/AArch64/emutls_generic.ll
+++ b/llvm/test/CodeGen/AArch64/emutls_generic.ll
@@ -8,6 +8,12 @@
 ; RUN:     | FileCheck -check-prefix=ARM_64 %s
 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-apple-darwin -O3 \
 ; RUN:     | FileCheck -check-prefix=DARWIN %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
 
 ; RUN: llc < %s -mtriple=aarch64-linux-android -relocation-model=pic \
 ; RUN:     | FileCheck -check-prefix=ARM_64 %s
@@ -18,6 +24,12 @@
 ; aarch64-windows-gnu needs explicit -emulated-tls
 ; RUN: llc < %s -mtriple=aarch64-apple-darwin -O3 \
 ; RUN:     | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=aarch64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -mtriple=aarch64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -mtriple=aarch64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
 
 ; NoEMU-NOT: __emutls
 
diff --git a/llvm/test/CodeGen/ARM/emutls.ll b/llvm/test/CodeGen/ARM/emutls.ll
--- a/llvm/test/CodeGen/ARM/emutls.ll
+++ b/llvm/test/CodeGen/ARM/emutls.ll
@@ -2,7 +2,12 @@
 ; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
 ; RUN: llc -mtriple=arm-linux-android \
 ; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
-
+; RUN: llc -emulated-tls -mtriple=arm-linux-ohos \
+; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
+; RUN: llc -mtriple=arm-linux-ohos \
+; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
+; RUN: llc -mtriple=arm-liteos-ohos \
+; RUN:     -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
 ; Copied from X86/emutls.ll
 
 ; Use my_emutls_get_address like __emutls_get_address.
diff --git a/llvm/test/CodeGen/RISCV/emutls.ll b/llvm/test/CodeGen/RISCV/emutls.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/emutls.ll
@@ -0,0 +1,307 @@
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-gnu | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos | FileCheck -check-prefix=RISCV64 %s
+
+; RUN: llc < %s -mtriple=riscv64-linux-gnu | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos | FileCheck -check-prefix=RISCV64 %s
+
+; Copied from X86/emutls.ll
+
+; NoEMU-NOT: __emutls
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define dso_local i32 @my_get_xyz() {
+; RISCV64-LABEL: my_get_xyz:
+; RISCV64:         lui a0, %hi(my_emutls_v_xyz)
+; RISCV64-NEXT:    addi a0, a0, %lo(my_emutls_v_xyz)
+; RISCV64-NEXT:    call my_emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i1 = dso_local thread_local global i32 15
+@i2 = external thread_local global i32
+@i3 = internal thread_local global i32 15
+@i4 = hidden thread_local global i32 15
+@i5 = external hidden thread_local global i32
+@s1 = dso_local thread_local global i16 15
+@b1 = dso_local thread_local global i8 0
+
+define dso_local i32 @f1() {
+; RISCV64-LABEL: f1:
+; RISCV64:         lui a0, %hi(__emutls_v.i1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i1
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f2() {
+; RISCV64-LABEL: f2:
+; RISCV64:         lui a0, %hi(__emutls_v.i1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i1
+}
+
+define dso_local i32 @f3() nounwind {
+; RISCV64-LABEL: f3:
+; RISCV64:         lui a0, %hi(__emutls_v.i2)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i2)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f4() {
+; RISCV64-LABEL: f4:
+; RISCV64:         lui a0, %hi(__emutls_v.i2)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i2)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i2
+}
+
+define dso_local i32 @f5() nounwind {
+; RISCV64-LABEL: f5:
+; RISCV64:         lui a0, %hi(__emutls_v.i3)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i3)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f6() {
+; RISCV64-LABEL: f6:
+; RISCV64:         lui a0, %hi(__emutls_v.i3)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i3)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i3
+}
+
+define dso_local i32 @f7() {
+; RISCV64-LABEL: f7:
+; RISCV64:         lui a0, %hi(__emutls_v.i4)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i4)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i4
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f8() {
+; RISCV64-LABEL: f8:
+; RISCV64:         lui a0, %hi(__emutls_v.i4)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i4)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i4
+}
+
+define dso_local i32 @f9() {
+; RISCV64-LABEL: f9:
+; RISCV64:         lui a0, %hi(__emutls_v.i5)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i5)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lw a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i32, i32* @i5
+  ret i32 %tmp1
+}
+
+define dso_local i32* @f10() {
+; RISCV64-LABEL: f10:
+; RISCV64:         lui a0, %hi(__emutls_v.i5)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.i5)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  ret i32* @i5
+}
+
+define dso_local i16 @f11() {
+; RISCV64-LABEL: f11:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lh a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  ret i16 %tmp1
+}
+
+define dso_local i32 @f12sext() {
+; RISCV64-LABEL: f12sext:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lh a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = sext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i32 @f12zext() {
+; RISCV64-LABEL: f12zext:
+; RISCV64:         lui a0, %hi(__emutls_v.s1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.s1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lhu a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = zext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i8 @f13() {
+; RISCV64-LABEL: f13:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lb a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  ret i8 %tmp1
+}
+
+define dso_local i32 @f14sext() {
+; RISCV64-LABEL: f14sext:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lb a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = sext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define dso_local i32 @f14zext() {
+; RISCV64-LABEL: f14zext:
+; RISCV64:         lui a0, %hi(__emutls_v.b1)
+; RISCV64-NEXT:    addi a0, a0, %lo(__emutls_v.b1)
+; RISCV64-NEXT:    call __emutls_get_address@plt
+; RISCV64-NEXT:    lbu a0, 0(a0)
+; RISCV64-NEXT:    ld ra, 8(sp)
+; RISCV64-NEXT:    addi sp, sp, 16
+; RISCV64-NEXT:    ret
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = zext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
+
+; RISCV64-LABEL: __emutls_v.i1:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i1
+
+; RISCV64-LABEL: __emutls_t.i1:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-NOT:   __emutls_v.i2
+
+; RISCV64-LABEL: __emutls_v.i3:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i3
+
+; RISCV64-LABEL: __emutls_t.i3:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-LABEL: __emutls_v.i4:
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 4
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.i4
+
+; RISCV64-LABEL: __emutls_t.i4:
+; RISCV64-NEXT: .word 15
+
+; RISCV64-NOT:   __emutls_v.i5:
+; RISCV64:      .hidden __emutls_v.i5
+; RISCV64-NOT:   __emutls_v.i5:
+
+; RISCV64-LABEL: __emutls_v.s1:
+; RISCV64-NEXT: .quad 2
+; RISCV64-NEXT: .quad 2
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad __emutls_t.s1
+
+; RISCV64-LABEL: __emutls_t.s1:
+; RISCV64-NEXT: .half 15
+
+; RISCV64-LABEL: __emutls_v.b1:
+; RISCV64-NEXT: .quad 1
+; RISCV64-NEXT: .quad 1
+; RISCV64-NEXT: .quad 0
+; RISCV64-NEXT: .quad 0
+
+; RISCV64-NOT:  __emutls_t.b1
diff --git a/llvm/test/CodeGen/RISCV/emutls_generic.ll b/llvm/test/CodeGen/RISCV/emutls_generic.ll
new file mode 100644
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/emutls_generic.ll
@@ -0,0 +1,75 @@
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-gnu -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -emulated-tls -mtriple=riscv64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+
+; RUN: llc < %s -mtriple=riscv64-linux-gnu -O3 \
+; RUN:     | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -relocation-model=pic -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+; RUN: llc < %s -mtriple=riscv64-linux-ohos -O3 \
+; RUN:     | FileCheck -check-prefix=RISCV64 %s
+
+; NoEMU-NOT: __emutls
+
+; Make sure that TLS symbols are emitted in expected order.
+
+@external_x = external thread_local global i32, align 8
+@external_y = thread_local global i8 7, align 2
+@internal_y = internal thread_local global i64 9, align 16
+
+define i32* @get_external_x() {
+entry:
+  ret i32* @external_x
+}
+
+define i8* @get_external_y() {
+entry:
+  ret i8* @external_y
+}
+
+define i64* @get_internal_y() {
+entry:
+  ret i64* @internal_y
+}
+
+; RISCV64-LABEL:  get_external_x:
+; RISCV64:      __emutls_v.external_x
+; RISCV64:      __emutls_get_address
+; RISCV64-LABEL:  get_external_y:
+; RISCV64:      __emutls_v.external_y
+; RISCV64:      __emutls_get_address
+; RISCV64-LABEL:  get_internal_y:
+; RISCV64:      __emutls_v.internal_y
+; RISCV64:      __emutls_get_address
+; RISCV64-NOT:   __emutls_t.external_x
+; RISCV64-NOT:   __emutls_v.external_x:
+; RISCV64:        .data{{$}}
+; RISCV64:        .globl __emutls_v.external_y
+; RISCV64:        .p2align 3
+; RISCV64-LABEL:  __emutls_v.external_y:
+; RISCV64-NEXT:   .quad 1
+; RISCV64-NEXT:   .quad 2
+; RISCV64-NEXT:   .quad 0
+; RISCV64-NEXT:   .quad __emutls_t.external_y
+; RISCV64-NOT:    __emutls_v.external_x:
+; RISCV64:        .section .r{{o?}}data,
+; RISCV64-LABEL:  __emutls_t.external_y:
+; RISCV64-NEXT:   .byte 7
+; RISCV64:        .data{{$}}
+; RISCV64-NOT:    .globl __emutls_v
+; RISCV64:        .p2align 3
+; RISCV64-LABEL:  __emutls_v.internal_y:
+; RISCV64-NEXT:   .quad 8
+; RISCV64-NEXT:   .quad 16
+; RISCV64-NEXT:   .quad 0
+; RISCV64-NEXT:   .quad __emutls_t.internal_y
+; RISCV64:        .section .r{{o?}}data,
+; RISCV64-LABEL:  __emutls_t.internal_y:
+; RISCV64-NEXT:   .quad 9
diff --git a/llvm/test/CodeGen/X86/emutls-pic.ll b/llvm/test/CodeGen/X86/emutls-pic.ll
--- a/llvm/test/CodeGen/X86/emutls-pic.ll
+++ b/llvm/test/CodeGen/X86/emutls-pic.ll
@@ -2,11 +2,15 @@
 ; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
 ; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X64 %s
 
 ; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
 ; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
 ; RUN: llc < %s -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mtriple=i386-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mtriple=x86_64-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X64 %s
 
 ; NoEMU-NOT: __emutls
 
diff --git a/llvm/test/CodeGen/X86/emutls-pie.ll b/llvm/test/CodeGen/X86/emutls-pie.ll
--- a/llvm/test/CodeGen/X86/emutls-pie.ll
+++ b/llvm/test/CodeGen/X86/emutls-pie.ll
@@ -6,6 +6,10 @@
 ; RUN:   | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
 ; RUN:   | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-ohos -relocation-model=pic \
+; RUN:   | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-ohos -relocation-model=pic \
+; RUN:   | FileCheck -check-prefix=X64 %s
 
 ; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
 ; RUN:   | FileCheck -check-prefix=NoEMU %s
@@ -15,6 +19,10 @@
 ; RUN:   | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
 ; RUN:   | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-ohos -relocation-model=pic \
+; RUN:   | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-ohos -relocation-model=pic \
+; RUN:   | FileCheck -check-prefix=X64 %s
 
 ; NoEMU-NOT: __emutls
 
diff --git a/llvm/test/CodeGen/X86/emutls.ll b/llvm/test/CodeGen/X86/emutls.ll
--- a/llvm/test/CodeGen/X86/emutls.ll
+++ b/llvm/test/CodeGen/X86/emutls.ll
@@ -2,11 +2,15 @@
 ; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
 ; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -emulated-tls -mtriple=i386-linux-ohos | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-ohos | FileCheck -check-prefix=X64 %s
 
 ; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=NoEMU %s
 ; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=NoEMU %s
 ; RUN: llc < %s -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
 ; RUN: llc < %s -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -mtriple=i386-linux-ohos | FileCheck -check-prefix=X86 %s
+; RUN: llc < %s -mtriple=x86_64-linux-ohos | FileCheck -check-prefix=X64 %s
 
 ; Copied from tls.ll; emulated TLS model is not implemented
 ; for *-pc-win32 and *-pc-windows targets yet.
diff --git a/llvm/test/CodeGen/X86/emutls_generic.ll b/llvm/test/CodeGen/X86/emutls_generic.ll
--- a/llvm/test/CodeGen/X86/emutls_generic.ll
+++ b/llvm/test/CodeGen/X86/emutls_generic.ll
@@ -6,6 +6,12 @@
 ; RUN:     | FileCheck -check-prefix=X86_64 %s
 ; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic \
 ; RUN:     | FileCheck %s
+; RUN: llc < %s -emulated-tls -mtriple=i686-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -emulated-tls -mtriple=i686-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_64 %s
 
 ; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic \
 ; RUN:     | FileCheck -check-prefix=X86_32 %s
@@ -15,6 +21,12 @@
 ; RUN:     | FileCheck -check-prefix=X86_64 %s
 ; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic \
 ; RUN:     | FileCheck -check-prefix=NoEMU %s
+; RUN: llc < %s -mtriple=i686-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -mtriple=i686-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -mtriple=x86_64-linux-ohos -relocation-model=pic \
+; RUN:     | FileCheck -check-prefix=X86_64 %s
 
 ; NoEMU-NOT: __emutls