diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -2609,8 +2609,11 @@
           ValueIn = LRQ.valueIn();
           continue;
         }
-        if (LRQ.valueIn() && ValueIn != LRQ.valueIn())
+        if (LRQ.valueIn() && ValueIn != LRQ.valueIn()) {
+          VNI = LRQ.valueIn();
+          TrackReg = SrcReg;
           return std::make_pair(VNI, TrackReg);
+        }
       }
     }
     if (ValueIn == nullptr) {
@@ -2668,6 +2671,16 @@
     // Conservatively assume that all lanes in a PHI are valid.
     LaneBitmask Lanes = SubRangeJoin ? LaneBitmask::getLane(0)
                                      : TRI->getSubRegIndexLaneMask(SubIdx);
+    if (!SubRangeJoin && LIS->getInterval(Reg).hasSubRanges()) {
+      Lanes = LaneBitmask::getNone();
+      for(auto subrangeIt = LIS->getInterval(Reg).subrange_begin();
+          subrangeIt != LIS->getInterval(Reg).subrange_end();
+          subrangeIt++){
+        if (subrangeIt->liveAt(VNI->def)) {
+          Lanes |= subrangeIt->LaneMask;
+        }
+      }
+    }
     V.ValidLanes = V.WriteLanes = Lanes;
   } else {
     DefMI = Indexes->getInstructionFromIndex(VNI->def);