Index: llvm/lib/Target/Sparc/SparcInstrInfo.td
===================================================================
--- llvm/lib/Target/Sparc/SparcInstrInfo.td
+++ llvm/lib/Target/Sparc/SparcInstrInfo.td
@@ -1743,6 +1743,22 @@
 }
 }
 
+// Section A.11 - DONE and RETRY
+// Section A.47 - SAVED and RESTORED
+let Predicates = [HasV9], rs1 = 0, rs2 = 0 in {
+  let rd = 0 in
+    def DONE : F3_1<2, 0b111110, (outs), (ins), "done", []>;
+
+  let rd = 1 in
+    def RETRY : F3_1<2, 0b111110, (outs), (ins), "retry", []>;
+
+  let rd = 0 in
+    def SAVED : F3_1<2, 0b110001, (outs), (ins), "saved", []>;
+
+  let rd = 1 in
+    def RESTORED : F3_1<2, 0b110001, (outs), (ins), "restored", []>;
+}
+
 // Section A.42 - Prefetch Data
 let Predicates = [HasV9] in {
   def PREFETCHr : F3_1<3, 0b101101,
Index: llvm/test/MC/Sparc/sparcv9-instructions.s
===================================================================
--- llvm/test/MC/Sparc/sparcv9-instructions.s
+++ llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -433,3 +433,20 @@
         ! V8-NEXT: prefetch  [ %i1 + %i2 ], 1
         ! V9: prefetch  [%i1+%i2], 1  ! encoding: [0xc3,0x6e,0x40,0x1a]
         prefetch  [ %i1 + %i2 ], 1
+
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: done
+        ! V9: done      ! encoding: [0x81,0xf0,0x00,0x00]
+        done
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: retry
+        ! V9: retry     ! encoding: [0x83,0xf0,0x00,0x00]
+        retry
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: saved
+        ! V9: saved     ! encoding: [0x81,0x88,0x00,0x00]
+        saved
+        ! V8:      error: instruction requires a CPU feature not currently enabled
+        ! V8-NEXT: restored
+        ! V9: restored  ! encoding: [0x83,0x88,0x00,0x00]
+        restored