diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
--- a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
@@ -150,5 +150,691 @@
   %shufp = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
   ret <4 x float> %shufp
 }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK: {{.*}}
+
+define <8 x double> @transform_VUNPCKLPDZrrkz(<8 x double> %a, <8 x double> %b, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDZrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDZrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm1 = ymm1[0],ymm3[0],ymm1[2],ymm3[2]
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm4, %ymm3
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm3, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> zeroinitializer
+  ret <8 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKHPDZrrkz(<8 x double> %a, <8 x double> %b, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDZrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDZrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm1 = ymm1[1],ymm3[1],ymm1[3],ymm3[3]
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm0 = ymm0[1],ymm2[1],ymm0[3],ymm2[3]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm4, %ymm3
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm3, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> zeroinitializer
+  ret <8 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKLPDYrrkz(<4 x double> %a, <4 x double> %b, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDYrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDYrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
+  ret <4 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKHPDYrrkz(<4 x double> %a, <4 x double> %b, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDYrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDYrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
+  ret <4 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKLPDrrkz(<2 x double> %a, <2 x double> %b, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],xmm1[0]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm2 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpand %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
+  ret <2 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKHPDrrkz(<2 x double> %a, <2 x double> %b, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDrrkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[1]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDrrkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm1[1]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm2 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpand %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
+  ret <2 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKLPDZrrk(<8 x double> %a, <8 x double> %b, <8 x double> %c, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDZrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
+; CHECK-512-NEXT:    vmovapd %zmm2, %zmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDZrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm6 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm6, %ymm2, %ymm7
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm6, %ymm7, %ymm6
+; CHECK-SKL-NEXT:    vblendvpd %ymm6, %ymm0, %ymm4, %ymm0
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm1 = ymm1[0],ymm3[0],ymm1[2],ymm3[2]
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm1, %ymm5, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> %c
+  ret <8 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKHPDZrrk(<8 x double> %a, <8 x double> %b, <8 x double> %c, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDZrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} zmm2 {%k1} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
+; CHECK-512-NEXT:    vmovapd %zmm2, %zmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDZrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm2[1],ymm0[3],ymm2[3]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm6 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm6, %ymm2, %ymm7
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm6, %ymm7, %ymm6
+; CHECK-SKL-NEXT:    vblendvpd %ymm6, %ymm0, %ymm4, %ymm0
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm1 = ymm1[1],ymm3[1],ymm1[3],ymm3[3]
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm1, %ymm5, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> %c
+  ret <8 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKLPDYrrk(<4 x double> %a, <4 x double> %b, <4 x double> %c, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDYrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} ymm2 {%k1} = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-512-NEXT:    vmovapd %ymm2, %ymm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDYrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vblendvpd %ymm1, %ymm0, %ymm2, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
+  ret <4 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKHPDYrrk(<4 x double> %a, <4 x double> %b, <4 x double> %c, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDYrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} ymm2 {%k1} = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-512-NEXT:    vmovapd %ymm2, %ymm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDYrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vblendvpd %ymm1, %ymm0, %ymm2, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
+  ret <4 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKLPDrrk(<2 x double> %a, <2 x double> %b, <2 x double> %c, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} xmm2 {%k1} = xmm0[0],xmm1[0]
+; CHECK-512-NEXT:    vmovapd %xmm2, %xmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm3 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm3, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm3, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vblendvpd %xmm1, %xmm0, %xmm2, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
+  ret <2 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKHPDrrk(<2 x double> %a, <2 x double> %b, <2 x double> %c, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDrrk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %edi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[1]
+; CHECK-512-NEXT:    vmovapd %xmm2, %xmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDrrk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
+; CHECK-SKL-NEXT:    vmovd %edi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm3 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm3, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm3, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vblendvpd %xmm1, %xmm0, %xmm2, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
+  ret <2 x double> %res
+}
+
+define <16 x float> @transform_VUNPCKLPDZrm(<16 x float> %a, ptr %pb) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDZrm:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} zmm0 = zmm0[0],mem[0],zmm0[2],mem[2],zmm0[4],mem[4],zmm0[6],mem[6]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDZrm:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm1 = ymm1[0],mem[0],ymm1[2],mem[2]
+; CHECK-SKL-NEXT:    retq
+  %b = load <16 x float>, ptr %pb
+  %shufp = shufflevector <16 x float> %a, <16 x float> %b, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 4, i32 5, i32 20, i32 21, i32 8, i32 9, i32 24, i32 25, i32 12, i32 13, i32 28, i32 29>
+  ret <16 x float> %shufp
+}
+
+define <16 x float> @transform_VUNPCKHPDZrm(<16 x float> %a, ptr %pb) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDZrm:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} zmm0 = zmm0[1],mem[1],zmm0[3],mem[3],zmm0[5],mem[5],zmm0[7],mem[7]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDZrm:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3]
+; CHECK-SKL-NEXT:    retq
+  %b = load <16 x float>, ptr %pb
+  %shufp = shufflevector <16 x float> %a, <16 x float> %b, <16 x i32> <i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 22, i32 23, i32 10, i32 11, i32 26, i32 27, i32 14, i32 15, i32 30, i32 31>
+  ret <16 x float> %shufp
+}
+
+define <8 x float> @transform_VUNPCKLPDYrm(<8 x float> %a, ptr %pb) nounwind {
+; CHECK-LABEL: transform_VUNPCKLPDYrm:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-NEXT:    retq
+  %b = load <8 x float>, ptr %pb
+  %shufp = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13>
+  ret <8 x float> %shufp
+}
+
+define <8 x float> @transform_VUNPCKHPDYrm(<8 x float> %a, ptr %pb) nounwind {
+; CHECK-LABEL: transform_VUNPCKHPDYrm:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-NEXT:    retq
+  %b = load <8 x float>, ptr %pb
+  %shufp = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15>
+  ret <8 x float> %shufp
+}
+
+define <4 x float> @transform_VUNPCKLPDrm(<4 x float> %a, ptr %pb) nounwind {
+; CHECK-LABEL: transform_VUNPCKLPDrm:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+; CHECK-NEXT:    retq
+  %b = load <4 x float>, ptr %pb
+  %shufp = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+  ret <4 x float> %shufp
+}
+
+define <4 x float> @transform_VUNPCKHPDrm(<4 x float> %a, ptr %pb) nounwind {
+; CHECK-LABEL: transform_VUNPCKHPDrm:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vunpckhpd {{.*#+}} xmm0 = xmm0[1],mem[1]
+; CHECK-NEXT:    retq
+  %b = load <4 x float>, ptr %pb
+  %shufp = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
+  ret <4 x float> %shufp
+}
+
+define <8 x double> @transform_VUNPCKLPDZrmkz(<8 x double> %a, ptr %pb, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDZrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],mem[0],zmm0[2],mem[2],zmm0[4],mem[4],zmm0[6],mem[6]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDZrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm1 = ymm1[0],mem[0],ymm1[2],mem[2]
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm4, %ymm3
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm3, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %b = load <8 x double>, ptr %pb
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> zeroinitializer
+  ret <8 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKHPDZrmkz(<8 x double> %a, ptr %pb, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDZrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} zmm0 {%k1} {z} = zmm0[1],mem[1],zmm0[3],mem[3],zmm0[5],mem[5],zmm0[7],mem[7]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDZrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3]
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm4, %ymm3
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm3, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpand %ymm1, %ymm2, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %b = load <8 x double>, ptr %pb
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> zeroinitializer
+  ret <8 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKLPDYrmkz(<4 x double> %a, ptr %pb, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDYrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} ymm0 {%k1} {z} = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDYrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %b = load <4 x double>, ptr %pb
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
+  ret <4 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKHPDYrmkz(<4 x double> %a, ptr %pb, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDYrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} ymm0 {%k1} {z} = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDYrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %ymm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm1, %ymm1
+; CHECK-SKL-NEXT:    vpand %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %b = load <4 x double>, ptr %pb
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> zeroinitializer
+  ret <4 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKLPDrmkz(<2 x double> %a, ptr %pb, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} xmm0 {%k1} {z} = xmm0[0],mem[0]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],mem[0]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm2 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpand %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %b = load <2 x double>, ptr %pb
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
+  ret <2 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKHPDrmkz(<2 x double> %a, ptr %pb, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDrmkz:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} xmm0 {%k1} {z} = xmm0[1],mem[1]
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDrmkz:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vpunpckhqdq {{.*#+}} xmm0 = xmm0[1],mem[1]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm1
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm2 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm2, %xmm1, %xmm1
+; CHECK-SKL-NEXT:    vpand %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %b = load <2 x double>, ptr %pb
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> zeroinitializer
+  ret <2 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKLPDZrmk(<8 x double> %a, ptr %pb, <8 x double> %c, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDZrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} zmm1 {%k1} = zmm0[0],mem[0],zmm0[2],mem[2],zmm0[4],mem[4],zmm0[6],mem[6]
+; CHECK-512-NEXT:    vmovapd %zmm1, %zmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDZrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm1 = ymm1[0],mem[0],ymm1[2],mem[2]
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm4
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm4, %ymm4
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm5 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm5, %ymm4, %ymm6
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm5, %ymm6, %ymm5
+; CHECK-SKL-NEXT:    vblendvpd %ymm5, %ymm0, %ymm2, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm4, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm4, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %b = load <8 x double>, ptr %pb
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> %c
+  ret <8 x double> %res
+}
+
+define <8 x double> @transform_VUNPCKHPDZrmk(<8 x double> %a, ptr %pb, <8 x double> %c, i8 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDZrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} zmm1 {%k1} = zmm0[1],mem[1],zmm0[3],mem[3],zmm0[5],mem[5],zmm0[7],mem[7]
+; CHECK-512-NEXT:    vmovapd %zmm1, %zmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDZrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm1 = ymm1[1],mem[1],ymm1[3],mem[3]
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm4
+; CHECK-SKL-NEXT:    vpbroadcastb %xmm4, %ymm4
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm5 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm5, %ymm4, %ymm6
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm5, %ymm6, %ymm5
+; CHECK-SKL-NEXT:    vblendvpd %ymm5, %ymm0, %ymm2, %ymm0
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm2 = [16,32,64,128]
+; CHECK-SKL-NEXT:    vpand %ymm2, %ymm4, %ymm4
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm2, %ymm4, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm1, %ymm3, %ymm1
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i8 %mask_int to <8 x i1>
+  %b = load <8 x double>, ptr %pb
+  %shufp = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
+  %res = select <8 x i1> %mask, <8 x double> %shufp, <8 x double> %c
+  ret <8 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKLPDYrmk(<4 x double> %a, ptr %pb, <4 x double> %c, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDYrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} ymm1 {%k1} = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-512-NEXT:    vmovapd %ymm1, %ymm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDYrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %b = load <4 x double>, ptr %pb
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
+  ret <4 x double> %res
+}
+
+define <4 x double> @transform_VUNPCKHPDYrmk(<4 x double> %a, ptr %pb, <4 x double> %c, i4 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDYrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} ymm1 {%k1} = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-512-NEXT:    vmovapd %ymm1, %ymm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDYrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} ymm0 = ymm0[1],mem[1],ymm0[3],mem[3]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm2, %ymm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} ymm3 = [1,2,4,8]
+; CHECK-SKL-NEXT:    vpand %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vpcmpeqq %ymm3, %ymm2, %ymm2
+; CHECK-SKL-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i4 %mask_int to <4 x i1>
+  %b = load <4 x double>, ptr %pb
+  %shufp = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+  %res = select <4 x i1> %mask, <4 x double> %shufp, <4 x double> %c
+  ret <4 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKLPDrmk(<2 x double> %a, ptr %pb, <2 x double> %c, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKLPDrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpcklpd {{.*#+}} xmm1 {%k1} = xmm0[0],mem[0]
+; CHECK-512-NEXT:    vmovapd %xmm1, %xmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKLPDrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm3 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm3, %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm3, %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %b = load <2 x double>, ptr %pb
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
+  ret <2 x double> %res
+}
+
+define <2 x double> @transform_VUNPCKHPDrmk(<2 x double> %a, ptr %pb, <2 x double> %c, i2 %mask_int) nounwind {
+; CHECK-512-LABEL: transform_VUNPCKHPDrmk:
+; CHECK-512:       # %bb.0:
+; CHECK-512-NEXT:    kmovd %esi, %k1
+; CHECK-512-NEXT:    vunpckhpd {{.*#+}} xmm1 {%k1} = xmm0[1],mem[1]
+; CHECK-512-NEXT:    vmovapd %xmm1, %xmm0
+; CHECK-512-NEXT:    retq
+;
+; CHECK-SKL-LABEL: transform_VUNPCKHPDrmk:
+; CHECK-SKL:       # %bb.0:
+; CHECK-SKL-NEXT:    vunpckhpd {{.*#+}} xmm0 = xmm0[1],mem[1]
+; CHECK-SKL-NEXT:    vmovd %esi, %xmm2
+; CHECK-SKL-NEXT:    vpbroadcastd %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vmovdqa {{.*#+}} xmm3 = [1,2]
+; CHECK-SKL-NEXT:    vpand %xmm3, %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vpcmpeqq %xmm3, %xmm2, %xmm2
+; CHECK-SKL-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
+; CHECK-SKL-NEXT:    retq
+  %mask = bitcast i2 %mask_int to <2 x i1>
+  %b = load <2 x double>, ptr %pb
+  %shufp = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
+  %res = select <2 x i1> %mask, <2 x double> %shufp, <2 x double> %c
+  ret <2 x double> %res
+}