diff --git a/llvm/docs/TableGen/BackGuide.rst b/llvm/docs/TableGen/BackGuide.rst --- a/llvm/docs/TableGen/BackGuide.rst +++ b/llvm/docs/TableGen/BackGuide.rst @@ -452,20 +452,6 @@ one instance for Clang and another for LLVM. Or you may be building your own instance. -#. Modify the selected ``tablegen.cpp`` to include your new backend. - - a. Add the name to the enumerated type ``ActionType``. - - #. Add a keyword to the ``ActionType`` command option using the - ``clEnumValN()`` function. - - #. Add a case to the ``switch`` statement in the *xxx*\ ``TableGenMain()`` - function. It should invoke the "main function" of your backend, which - in this case, according to convention, is named ``EmitAddressModes``. - -5. Add a declaration of your "main function" to the corresponding - ``TableGenBackends.h`` header file. - #. Add your backend C++ file to the appropriate ``CMakeLists.txt`` file so that it will be built. @@ -498,11 +484,14 @@ * The ``run`` function should use the ``emitSourceFileHeader`` helper function to include a standard header in the emitted file. -* The only function in the ``llvm`` namespace is the backend "main function." - In this example, it is named ``EmitAddressModes``. It creates an instance - of the ``AddressModesEmitter`` class, passing the ``RecordKeeper`` - instance, then invokes the ``run`` function, passing the ``raw_ostream`` - instance. +* Register the class or the function as the command line option + with ``llvm/TableGen/TableGenBackend.h``. + + * Use ``llvm::TableGen::Emitter::OptClass`` + if the class has the constructor ``(RK)`` and + the method ``run(OS)``. + + * Otherwise, use ``llvm::TableGen::Emitter::Opt``. All the examples in the remainder of this document will assume the naming conventions used in the skeleton file. diff --git a/llvm/include/llvm/TableGen/TableGenBackend.h b/llvm/include/llvm/TableGen/TableGenBackend.h --- a/llvm/include/llvm/TableGen/TableGenBackend.h +++ b/llvm/include/llvm/TableGen/TableGenBackend.h @@ -13,11 +13,41 @@ #ifndef LLVM_TABLEGEN_TABLEGENBACKEND_H #define LLVM_TABLEGEN_TABLEGENBACKEND_H +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/ManagedStatic.h" + namespace llvm { -class StringRef; +class RecordKeeper; class raw_ostream; +namespace TableGen::Emitter { +using FnT = void (*)(RecordKeeper &Records, raw_ostream &OS); + +struct OptCreatorT { + static void *call(); +}; + +extern ManagedStatic, OptCreatorT> Action; + +struct Opt { + Opt(StringRef Name, FnT CB, StringRef Desc, bool ByDefault = false) { + if (ByDefault) + Action->setInitialValue(CB); + Action->getParser().addLiteralOption(Name, CB, Desc); + } +}; + +template class OptClass : Opt { + static void run(RecordKeeper &RK, raw_ostream &OS) { EmitterC(RK).run(OS); } + +public: + OptClass(StringRef Name, StringRef Desc) : Opt(Name, run, Desc) {} +}; + +} // namespace TableGen::Emitter + /// emitSourceFileHeader - Output an LLVM style file header to the specified /// raw_ostream. void emitSourceFileHeader(StringRef Desc, raw_ostream &OS); diff --git a/llvm/lib/TableGen/Main.cpp b/llvm/lib/TableGen/Main.cpp --- a/llvm/lib/TableGen/Main.cpp +++ b/llvm/lib/TableGen/Main.cpp @@ -29,6 +29,7 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include #include @@ -129,7 +130,12 @@ Records.startBackendTimer("Backend overall"); std::string OutString; raw_string_ostream Out(OutString); - unsigned status = MainFn(Out, Records); + unsigned status = 0; + TableGen::Emitter::FnT ActionFn = TableGen::Emitter::Action->getValue(); + if (ActionFn) + ActionFn(Records, Out); + else + status = MainFn(Out, Records); Records.stopBackendTimer(); if (status) return 1; diff --git a/llvm/lib/TableGen/TableGenBackend.cpp b/llvm/lib/TableGen/TableGenBackend.cpp --- a/llvm/lib/TableGen/TableGenBackend.cpp +++ b/llvm/lib/TableGen/TableGenBackend.cpp @@ -13,12 +13,21 @@ #include "llvm/TableGen/TableGenBackend.h" #include "llvm/ADT/Twine.h" #include "llvm/Support/raw_ostream.h" +#include #include +#include using namespace llvm; const size_t MAX_LINE_LEN = 80U; +namespace llvm::TableGen::Emitter { +ManagedStatic, OptCreatorT> Action; +void *OptCreatorT::call() { + return new cl::opt(cl::desc("Action to perform:")); +} +} // namespace llvm::TableGen::Emitter + static void printLine(raw_ostream &OS, const Twine &Prefix, char Fill, StringRef Suffix) { size_t Pos = (size_t)OS.tell(); diff --git a/llvm/lib/TableGen/TableGenBackendSkeleton.cpp b/llvm/lib/TableGen/TableGenBackendSkeleton.cpp --- a/llvm/lib/TableGen/TableGenBackendSkeleton.cpp +++ b/llvm/lib/TableGen/TableGenBackendSkeleton.cpp @@ -46,14 +46,20 @@ (void)Records; // To suppress unused variable warning; remove on use. } -namespace llvm { +// Choose either option A or B. -// The only thing that should be in the llvm namespace is the -// emitter entry point function. +//===----------------------------------------------------------------------===// +// Option A: Register the backed as class +static TableGen::Emitter::OptClass + X("gen-skeleton-class", "Generate example skeleton class"); -void EmitSkeleton(RecordKeeper &RK, raw_ostream &OS) { +//===----------------------------------------------------------------------===// +// Option B: Register "EmitSkeleton" directly +// The emitter entry may be private scope. +static void EmitSkeleton(RecordKeeper &RK, raw_ostream &OS) { // Instantiate the emitter class and invoke run(). SkeletonEmitter(RK).run(OS); } -} // namespace llvm +static TableGen::Emitter::Opt Y("gen-skeleton-entry", EmitSkeleton, + "Generate example skeleton entry"); diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp --- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp +++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp @@ -100,7 +100,6 @@ #include "CodeGenRegisters.h" #include "CodeGenTarget.h" #include "SubtargetFeatureInfo.h" -#include "TableGenBackends.h" #include "Types.h" #include "llvm/ADT/CachedHashString.h" #include "llvm/ADT/PointerUnion.h" @@ -108,7 +107,6 @@ #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" -#include "llvm/Config/llvm-config.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" @@ -3205,6 +3203,8 @@ Record *AsmParser = Target.getAsmParser(); StringRef ClassName = AsmParser->getValueAsString("AsmParserClassName"); + emitSourceFileHeader("Assembly Matcher Source Fragment", OS); + // Compute the information on the instructions to match. AsmMatcherInfo Info(AsmParser, Target, Records); Info.buildInfo(); @@ -4002,11 +4002,5 @@ OS << "#endif // GET_MNEMONIC_CHECKER\n\n"; } -namespace llvm { - -void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) { - emitSourceFileHeader("Assembly Matcher Source Fragment", OS); - AsmMatcherEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-asm-matcher", "Generate assembly instruction matcher"); diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp --- a/llvm/utils/TableGen/AsmWriterEmitter.cpp +++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp @@ -17,7 +17,6 @@ #include "CodeGenRegisters.h" #include "CodeGenTarget.h" #include "SequenceToOffsetTable.h" -#include "TableGenBackends.h" #include "Types.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/DenseMap.h" @@ -1300,17 +1299,12 @@ std::vector> TableDrivenOperandPrinters; unsigned BitsLeft = 0; unsigned AsmStrBits = 0; + emitSourceFileHeader("Assembly Writer Source Fragment", O); EmitGetMnemonic(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits); EmitPrintInstruction(O, TableDrivenOperandPrinters, BitsLeft, AsmStrBits); EmitGetRegisterName(O); EmitPrintAliasInstruction(O); } -namespace llvm { - -void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS) { - emitSourceFileHeader("Assembly Writer Source Fragment", OS); - AsmWriterEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-asm-writer", "Generate assembly writer"); diff --git a/llvm/utils/TableGen/Attributes.cpp b/llvm/utils/TableGen/Attributes.cpp --- a/llvm/utils/TableGen/Attributes.cpp +++ b/llvm/utils/TableGen/Attributes.cpp @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "TableGenBackends.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include using namespace llvm; @@ -18,7 +18,7 @@ class Attributes { public: Attributes(RecordKeeper &R) : Records(R) {} - void emit(raw_ostream &OS); + void run(raw_ostream &OS); private: void emitTargetIndependentNames(raw_ostream &OS); @@ -124,16 +124,11 @@ OS << "#endif\n"; } -void Attributes::emit(raw_ostream &OS) { +void Attributes::run(raw_ostream &OS) { emitTargetIndependentNames(OS); emitFnAttrCompatCheck(OS, false); emitAttributeProperties(OS); } -namespace llvm { - -void EmitAttributes(RecordKeeper &RK, raw_ostream &OS) { - Attributes(RK).emit(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass X("gen-attrs", + "Generate attributes"); diff --git a/llvm/utils/TableGen/CTagsEmitter.cpp b/llvm/utils/TableGen/CTagsEmitter.cpp --- a/llvm/utils/TableGen/CTagsEmitter.cpp +++ b/llvm/utils/TableGen/CTagsEmitter.cpp @@ -12,11 +12,11 @@ // //===----------------------------------------------------------------------===// -#include "TableGenBackends.h" #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/SourceMgr.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include using namespace llvm; @@ -86,8 +86,5 @@ T.emit(OS); } -namespace llvm { - -void EmitCTags(RecordKeeper &RK, raw_ostream &OS) { CTagsEmitter(RK).run(OS); } - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-ctags", "Generate ctags-compatible index"); diff --git a/llvm/utils/TableGen/CallingConvEmitter.cpp b/llvm/utils/TableGen/CallingConvEmitter.cpp --- a/llvm/utils/TableGen/CallingConvEmitter.cpp +++ b/llvm/utils/TableGen/CallingConvEmitter.cpp @@ -12,7 +12,6 @@ //===----------------------------------------------------------------------===// #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" #include "llvm/TableGen/TableGenBackend.h" @@ -42,6 +41,8 @@ } // End anonymous namespace void CallingConvEmitter::run(raw_ostream &O) { + emitSourceFileHeader("Calling Convention Implementation Fragment", O); + std::vector CCs = Records.getAllDerivedDefinitions("CallingConv"); // Emit prototypes for all of the non-custom CC's so that they can forward ref @@ -427,11 +428,5 @@ } } -namespace llvm { - -void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS) { - emitSourceFileHeader("Calling Convention Implementation Fragment", OS); - CallingConvEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-callingconv", "Generate calling convention descriptions"); diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp --- a/llvm/utils/TableGen/CodeEmitterGen.cpp +++ b/llvm/utils/TableGen/CodeEmitterGen.cpp @@ -16,7 +16,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" #include "InfoByHwMode.h" -#include "TableGenBackends.h" #include "VarLenCodeEmitterGen.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/ArrayRef.h" @@ -421,6 +420,8 @@ } void CodeEmitterGen::run(raw_ostream &o) { + emitSourceFileHeader("Machine Code Emitter", o); + CodeGenTarget Target(Records); std::vector Insts = Records.getAllDerivedDefinitions("Instruction"); @@ -565,11 +566,5 @@ } // end anonymous namespace -namespace llvm { - -void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) { - emitSourceFileHeader("Machine Code Emitter", OS); - CodeEmitterGen(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-emitter", "Generate machine code emitter"); diff --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp --- a/llvm/utils/TableGen/CompressInstEmitter.cpp +++ b/llvm/utils/TableGen/CompressInstEmitter.cpp @@ -67,7 +67,6 @@ #include "CodeGenInstruction.h" #include "CodeGenRegisters.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" @@ -904,10 +903,5 @@ emitCompressInstEmitter(o, EmitterType::CheckCompress); } -namespace llvm { - -void EmitCompressInst(RecordKeeper &RK, raw_ostream &OS) { - CompressInstEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-compress-inst-emitter", "Generate RISCV compressed instructions."); diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp --- a/llvm/utils/TableGen/DAGISelEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelEmitter.cpp @@ -14,7 +14,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" #include "DAGISelMatcher.h" -#include "TableGenBackends.h" #include "llvm/Support/Debug.h" #include "llvm/TableGen/Record.h" #include "llvm/TableGen/TableGenBackend.h" @@ -125,6 +124,7 @@ void DAGISelEmitter::run(raw_ostream &OS) { + Records.startTimer("Parse patterns"); emitSourceFileHeader("DAG Instruction Selector for the " + CGP.getTargetInfo().getName().str() + " target", OS); @@ -187,11 +187,5 @@ EmitMatcherTable(TheMatcher.get(), CGP, OS); } -namespace llvm { - -void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) { - RK.startTimer("Parse patterns"); - DAGISelEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-dag-isel", "Generate a DAG instruction selector"); diff --git a/llvm/utils/TableGen/DFAEmitter.cpp b/llvm/utils/TableGen/DFAEmitter.cpp --- a/llvm/utils/TableGen/DFAEmitter.cpp +++ b/llvm/utils/TableGen/DFAEmitter.cpp @@ -22,13 +22,13 @@ #include "DFAEmitter.h" #include "SequenceToOffsetTable.h" -#include "TableGenBackends.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/UniqueVector.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include #include @@ -370,10 +370,5 @@ OS << ")"; } -namespace llvm { - -void EmitAutomata(RecordKeeper &RK, raw_ostream &OS) { - AutomatonEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-automata", "Generate generic automata"); diff --git a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp --- a/llvm/utils/TableGen/DFAPacketizerEmitter.cpp +++ b/llvm/utils/TableGen/DFAPacketizerEmitter.cpp @@ -17,7 +17,6 @@ #include "CodeGenSchedule.h" #include "CodeGenTarget.h" #include "DFAEmitter.h" -#include "TableGenBackends.h" #include "llvm/ADT/SmallVector.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" @@ -206,6 +205,7 @@ // Run the worklist algorithm to generate the DFA. // void DFAPacketizerEmitter::run(raw_ostream &OS) { + emitSourceFileHeader("Target DFA Packetizer Tables", OS); OS << "\n" << "#include \"llvm/CodeGen/DFAPacketizer.h\"\n"; OS << "namespace llvm {\n"; @@ -353,11 +353,5 @@ << "\n}\n\n"; } -namespace llvm { - -void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS) { - emitSourceFileHeader("Target DFA Packetizer Tables", OS); - DFAPacketizerEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-dfa-packetizer", "Generate DFA Packetizer for VLIW targets"); diff --git a/llvm/utils/TableGen/DXILEmitter.cpp b/llvm/utils/TableGen/DXILEmitter.cpp --- a/llvm/utils/TableGen/DXILEmitter.cpp +++ b/llvm/utils/TableGen/DXILEmitter.cpp @@ -12,13 +12,13 @@ //===----------------------------------------------------------------------===// #include "SequenceToOffsetTable.h" -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringSet.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Support/DXILOperationCommon.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" using namespace llvm; using namespace llvm::dxil; @@ -411,9 +411,7 @@ OS << "}\n "; } -namespace llvm { - -void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) { +static void EmitDXILOperation(RecordKeeper &Records, raw_ostream &OS) { std::vector Ops = Records.getAllDerivedDefinitions("dxil_op"); OS << "// Generated code, do not edit.\n"; OS << "\n"; @@ -439,4 +437,5 @@ OS << "\n"; } -} // namespace llvm +static TableGen::Emitter::Opt X("gen-dxil-operation", EmitDXILOperation, + "Generate DXIL operation information"); diff --git a/llvm/utils/TableGen/DecoderEmitter.cpp b/llvm/utils/TableGen/DecoderEmitter.cpp --- a/llvm/utils/TableGen/DecoderEmitter.cpp +++ b/llvm/utils/TableGen/DecoderEmitter.cpp @@ -15,6 +15,7 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" #include "InfoByHwMode.h" +#include "TableGenBackends.h" #include "VarLenCodeEmitterGen.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/ArrayRef.h" diff --git a/llvm/utils/TableGen/DirectiveEmitter.cpp b/llvm/utils/TableGen/DirectiveEmitter.cpp --- a/llvm/utils/TableGen/DirectiveEmitter.cpp +++ b/llvm/utils/TableGen/DirectiveEmitter.cpp @@ -12,13 +12,13 @@ //===----------------------------------------------------------------------===// #include "llvm/TableGen/DirectiveEmitter.h" -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringSet.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" using namespace llvm; @@ -174,11 +174,9 @@ return HasDuplicateClausesInDirectives(getDirectives()); } -namespace llvm { - // Generate the declaration section for the enumeration in the directive // language -void EmitDirectivesDecl(RecordKeeper &Records, raw_ostream &OS) { +static void EmitDirectivesDecl(RecordKeeper &Records, raw_ostream &OS) { const auto DirLang = DirectiveLanguage{Records}; if (DirLang.HasValidityErrors()) return; @@ -247,8 +245,6 @@ OS << "#endif // LLVM_" << DirLang.getName() << "_INC\n"; } -} // namespace llvm - // Generate function implementation for getName(StringRef Str) static void GenerateGetName(const std::vector &Records, raw_ostream &OS, StringRef Enum, @@ -877,11 +873,9 @@ GenerateIsAllowedClause(DirLang, OS); } -namespace llvm { - // Generate the implemenation section for the enumeration in the directive // language. -void EmitDirectivesImpl(RecordKeeper &Records, raw_ostream &OS) { +static void EmitDirectivesImpl(RecordKeeper &Records, raw_ostream &OS) { const auto DirLang = DirectiveLanguage{Records}; if (DirLang.HasValidityErrors()) return; @@ -893,4 +887,10 @@ EmitDirectivesBasicImpl(DirLang, OS); } -} // namespace llvm +static TableGen::Emitter::Opt + X("gen-directive-decl", EmitDirectivesDecl, + "Generate directive related declaration code (header file)"); + +static TableGen::Emitter::Opt + Y("gen-directive-impl", EmitDirectivesImpl, + "Generate directive related implementation code"); diff --git a/llvm/utils/TableGen/DisassemblerEmitter.cpp b/llvm/utils/TableGen/DisassemblerEmitter.cpp --- a/llvm/utils/TableGen/DisassemblerEmitter.cpp +++ b/llvm/utils/TableGen/DisassemblerEmitter.cpp @@ -94,12 +94,7 @@ /// X86RecognizableInstr.cpp contains the implementation for a single /// instruction. -namespace llvm { - -extern void EmitDecoder(RecordKeeper &RK, raw_ostream &OS, - const std::string &PredicateNamespace); - -void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) { +static void EmitDisassembler(RecordKeeper &Records, raw_ostream &OS) { CodeGenTarget Target(Records); emitSourceFileHeader(" * " + Target.getName().str() + " Disassembler", OS); @@ -136,4 +131,5 @@ EmitDecoder(Records, OS, PredicateNamespace); } -} // end namespace llvm +static TableGen::Emitter::Opt X("gen-disassembler", EmitDisassembler, + "Generate disassembler"); diff --git a/llvm/utils/TableGen/ExegesisEmitter.cpp b/llvm/utils/TableGen/ExegesisEmitter.cpp --- a/llvm/utils/TableGen/ExegesisEmitter.cpp +++ b/llvm/utils/TableGen/ExegesisEmitter.cpp @@ -10,7 +10,6 @@ // //===----------------------------------------------------------------------===// -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/StringRef.h" @@ -203,10 +202,5 @@ } // end anonymous namespace -namespace llvm { - -void EmitExegesis(RecordKeeper &RK, raw_ostream &OS) { - ExegesisEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-exegesis", "Generate llvm-exegesis tables"); diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -21,7 +21,6 @@ #include "CodeGenRegisters.h" #include "CodeGenTarget.h" #include "InfoByHwMode.h" -#include "TableGenBackends.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/TableGen/Error.h" @@ -858,9 +857,7 @@ // TODO: SignaturesWithConstantForms should be empty here. } -namespace llvm { - -void EmitFastISel(RecordKeeper &RK, raw_ostream &OS) { +static void EmitFastISel(RecordKeeper &RK, raw_ostream &OS) { CodeGenDAGPatterns CGP(RK); const CodeGenTarget &Target = CGP.getTargetInfo(); emitSourceFileHeader("\"Fast\" Instruction Selector for the " + @@ -876,4 +873,5 @@ F.printFunctionDefinitions(OS); } -} // namespace llvm +static TableGen::Emitter::Opt X("gen-fast-isel", EmitFastISel, + "Generate a \"fast\" instruction selector"); diff --git a/llvm/utils/TableGen/GICombinerEmitter.cpp b/llvm/utils/TableGen/GICombinerEmitter.cpp --- a/llvm/utils/TableGen/GICombinerEmitter.cpp +++ b/llvm/utils/TableGen/GICombinerEmitter.cpp @@ -20,7 +20,6 @@ #include "GlobalISel/GIMatchDagOperands.h" #include "GlobalISel/GIMatchDagPredicate.h" #include "GlobalISel/GIMatchTree.h" -#include "TableGenBackends.h" #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringSet.h" @@ -1067,8 +1066,7 @@ //===----------------------------------------------------------------------===// -namespace llvm { -void EmitGICombiner(RecordKeeper &RK, raw_ostream &OS) { +static void EmitGICombiner(RecordKeeper &RK, raw_ostream &OS) { CodeGenTarget Target(RK); emitSourceFileHeader("Global Combiner", OS); @@ -1083,4 +1081,5 @@ NumPatternTotalStatistic = NumPatternTotal; } -} // namespace llvm +static TableGen::Emitter::Opt X("gen-global-isel-combiner", EmitGICombiner, + "Generate GlobalISel combiner"); diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -36,7 +36,6 @@ #include "CodeGenTarget.h" #include "InfoByHwMode.h" #include "SubtargetFeatureInfo.h" -#include "TableGenBackends.h" #include "llvm/ADT/Statistic.h" #include "llvm/Support/CodeGenCoverage.h" #include "llvm/Support/CommandLine.h" @@ -6363,8 +6362,5 @@ //===----------------------------------------------------------------------===// -namespace llvm { -void EmitGlobalISel(RecordKeeper &RK, raw_ostream &OS) { - GlobalISelEmitter(RK).run(OS); -} -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-global-isel", "Generate GlobalISel selector"); diff --git a/llvm/utils/TableGen/InstrDocsEmitter.cpp b/llvm/utils/TableGen/InstrDocsEmitter.cpp --- a/llvm/utils/TableGen/InstrDocsEmitter.cpp +++ b/llvm/utils/TableGen/InstrDocsEmitter.cpp @@ -21,8 +21,8 @@ #include "CodeGenDAGPatterns.h" #include "CodeGenInstruction.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include @@ -54,9 +54,7 @@ return Result; } -namespace llvm { - -void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS) { +static void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS) { CodeGenDAGPatterns CDP(RK); CodeGenTarget &Target = CDP.getTargetInfo(); unsigned VariantCount = Target.getAsmParserVariantCount(); @@ -217,4 +215,5 @@ } } -} // end namespace llvm +static TableGen::Emitter::Opt X("gen-instr-docs", EmitInstrDocs, + "Generate instruction documentation"); diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp --- a/llvm/utils/TableGen/InstrInfoEmitter.cpp +++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp @@ -1245,13 +1245,12 @@ OS << "#endif // GET_INSTRINFO_SCHED_ENUM\n\n"; } -namespace llvm { - -void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) { +static void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS) { RK.startTimer("Analyze DAG patterns"); InstrInfoEmitter(RK).run(OS); RK.startTimer("Emit map table"); EmitMapTable(RK, OS); } -} // end namespace llvm +static TableGen::Emitter::Opt X("gen-instr-info", EmitInstrInfo, + "Generate instruction descriptions"); diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp --- a/llvm/utils/TableGen/IntrinsicEmitter.cpp +++ b/llvm/utils/TableGen/IntrinsicEmitter.cpp @@ -13,7 +13,6 @@ #include "CodeGenIntrinsics.h" #include "CodeGenTarget.h" #include "SequenceToOffsetTable.h" -#include "TableGenBackends.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" @@ -967,10 +966,16 @@ OS << "#endif\n\n"; } -void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) { +static void EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) { IntrinsicEmitter(RK).run(OS, /*Enums=*/true); } -void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) { +static TableGen::Emitter::Opt X("gen-intrinsic-enums", EmitIntrinsicEnums, + "Generate intrinsic enums"); + +static void EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) { IntrinsicEmitter(RK).run(OS, /*Enums=*/false); } + +static TableGen::Emitter::Opt Y("gen-intrinsic-impl", EmitIntrinsicImpl, + "Generate intrinsic information"); diff --git a/llvm/utils/TableGen/OptParserEmitter.cpp b/llvm/utils/TableGen/OptParserEmitter.cpp --- a/llvm/utils/TableGen/OptParserEmitter.cpp +++ b/llvm/utils/TableGen/OptParserEmitter.cpp @@ -7,7 +7,6 @@ //===----------------------------------------------------------------------===// #include "OptEmitter.h" -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/Twine.h" @@ -213,8 +212,7 @@ /// OptParserEmitter - This tablegen backend takes an input .td file /// describing a list of options and emits a data structure for parsing and /// working with those options when given an input command line. -namespace llvm { -void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) { +static void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) { // Get the option groups and options. const std::vector &Groups = Records.getAllDerivedDefinitions("OptionGroup"); @@ -500,4 +498,6 @@ OS << "\n"; } -} // end namespace llvm + +static TableGen::Emitter::Opt X("gen-opt-parser-defs", EmitOptParser, + "Generate option definitions"); diff --git a/llvm/utils/TableGen/OptRSTEmitter.cpp b/llvm/utils/TableGen/OptRSTEmitter.cpp --- a/llvm/utils/TableGen/OptRSTEmitter.cpp +++ b/llvm/utils/TableGen/OptRSTEmitter.cpp @@ -7,17 +7,16 @@ //===----------------------------------------------------------------------===// #include "OptEmitter.h" -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringMap.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" using namespace llvm; /// OptParserEmitter - This tablegen backend takes an input .td file /// describing a list of options and emits a RST man page. -namespace llvm { -void EmitOptRST(RecordKeeper &Records, raw_ostream &OS) { +static void EmitOptRST(RecordKeeper &Records, raw_ostream &OS) { llvm::StringMap> OptionsByGroup; std::vector OptionsWithoutGroup; @@ -103,4 +102,6 @@ } } } -} // end namespace llvm + +static TableGen::Emitter::Opt X("gen-opt-rst", EmitOptRST, + "Generate option RST"); diff --git a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp --- a/llvm/utils/TableGen/PseudoLoweringEmitter.cpp +++ b/llvm/utils/TableGen/PseudoLoweringEmitter.cpp @@ -8,7 +8,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "llvm/ADT/IndexedMap.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" @@ -314,10 +313,5 @@ emitLoweringEmitter(o); } -namespace llvm { - -void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS) { - PseudoLoweringEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-pseudo-lowering", "Generate pseudo instruction lowering"); diff --git a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp --- a/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp +++ b/llvm/utils/TableGen/RISCVTargetDefEmitter.cpp @@ -11,9 +11,9 @@ // //===----------------------------------------------------------------------===// -#include "TableGenBackends.h" #include "llvm/Support/RISCVISAInfo.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" using namespace llvm; @@ -47,7 +47,7 @@ return (*ISAInfo)->toString(); } -void llvm::EmitRISCVTargetDef(const RecordKeeper &RK, raw_ostream &OS) { +static void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) { OS << "#ifndef PROC\n" << "#define PROC(ENUM, NAME, DEFAULT_MARCH)\n" << "#endif\n\n"; @@ -80,3 +80,6 @@ OS << "\n#undef TUNE_PROC\n"; } + +static TableGen::Emitter::Opt X("gen-riscv-target-def", EmitRISCVTargetDef, + "Generate the list of CPU for RISCV"); diff --git a/llvm/utils/TableGen/RegisterBankEmitter.cpp b/llvm/utils/TableGen/RegisterBankEmitter.cpp --- a/llvm/utils/TableGen/RegisterBankEmitter.cpp +++ b/llvm/utils/TableGen/RegisterBankEmitter.cpp @@ -14,7 +14,6 @@ #include "CodeGenRegisters.h" #include "CodeGenTarget.h" #include "InfoByHwMode.h" -#include "TableGenBackends.h" #include "llvm/ADT/BitVector.h" #include "llvm/Support/Debug.h" #include "llvm/TableGen/Error.h" @@ -328,10 +327,5 @@ OS << "#endif // GET_TARGET_REGBANK_IMPL\n"; } -namespace llvm { - -void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS) { - RegisterBankEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-register-bank", "Generate registers bank descriptions"); diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp --- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp +++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp @@ -17,7 +17,6 @@ #include "CodeGenTarget.h" #include "InfoByHwMode.h" #include "SequenceToOffsetTable.h" -#include "TableGenBackends.h" #include "Types.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/BitVector.h" @@ -1909,10 +1908,5 @@ } } -namespace llvm { - -void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS) { - RegisterInfoEmitter(RK).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-register-info", "Generate registers and register classes info"); diff --git a/llvm/utils/TableGen/SearchableTableEmitter.cpp b/llvm/utils/TableGen/SearchableTableEmitter.cpp --- a/llvm/utils/TableGen/SearchableTableEmitter.cpp +++ b/llvm/utils/TableGen/SearchableTableEmitter.cpp @@ -13,13 +13,13 @@ //===----------------------------------------------------------------------===// #include "CodeGenIntrinsics.h" -#include "TableGenBackends.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringExtras.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include #include @@ -823,10 +823,5 @@ OS << "#undef " << Guard << "\n"; } -namespace llvm { - -void EmitSearchableTables(RecordKeeper &RK, raw_ostream &OS) { - SearchableTableEmitter(RK).run(OS); -} - -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-searchable-tables", "Generate generic binary-searchable table"); diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -14,7 +14,6 @@ #include "CodeGenSchedule.h" #include "CodeGenTarget.h" #include "PredicateExpander.h" -#include "TableGenBackends.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/StringExtras.h" @@ -70,7 +69,7 @@ } }; - const CodeGenTarget &TGT; + CodeGenTarget TGT; RecordKeeper &Records; CodeGenSchedModels &SchedModels; std::string Target; @@ -128,8 +127,8 @@ void ParseFeaturesFunction(raw_ostream &OS); public: - SubtargetEmitter(RecordKeeper &R, CodeGenTarget &TGT) - : TGT(TGT), Records(R), SchedModels(TGT.getSchedModels()), + SubtargetEmitter(RecordKeeper &R) + : TGT(R), Records(R), SchedModels(TGT.getSchedModels()), Target(TGT.getName()) {} void run(raw_ostream &o); @@ -1985,11 +1984,5 @@ EmitMCInstrAnalysisPredicateFunctions(OS); } -namespace llvm { - -void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS) { - CodeGenTarget CGTarget(RK); - SubtargetEmitter(RK, CGTarget).run(OS); -} - -} // end namespace llvm +static TableGen::Emitter::OptClass + X("gen-subtarget", "Generate subtarget enumerations"); diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp --- a/llvm/utils/TableGen/TableGen.cpp +++ b/llvm/utils/TableGen/TableGen.cpp @@ -10,61 +10,20 @@ // //===----------------------------------------------------------------------===// -#include "TableGenBackends.h" // Declares all backends. +#include "llvm/ADT/StringRef.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/InitLLVM.h" #include "llvm/Support/raw_ostream.h" #include "llvm/TableGen/Main.h" #include "llvm/TableGen/Record.h" #include "llvm/TableGen/SetTheory.h" +#include "llvm/TableGen/TableGenBackend.h" #include #include #include using namespace llvm; -enum ActionType { - PrintRecords, - PrintDetailedRecords, - NullBackend, - DumpJSON, - GenEmitter, - GenRegisterInfo, - GenInstrInfo, - GenInstrDocs, - GenAsmWriter, - GenAsmMatcher, - GenDisassembler, - GenPseudoLowering, - GenCompressInst, - GenCallingConv, - GenDAGISel, - GenDFAPacketizer, - GenFastISel, - GenSubtarget, - GenIntrinsicEnums, - GenIntrinsicImpl, - PrintEnums, - PrintSets, - GenOptParserDefs, - GenOptRST, - GenCTags, - GenAttributes, - GenSearchableTables, - GenGlobalISel, - GenGICombiner, - GenX86EVEX2VEXTables, - GenX86FoldTables, - GenX86MnemonicTables, - GenRegisterBank, - GenExegesis, - GenAutomata, - GenDirectivesEnumDecl, - GenDirectivesEnumImpl, - GenDXILOperation, - GenRISCVTargetDef, -}; - namespace llvm { cl::opt EmitLongStrLiterals( "long-string-literals", @@ -75,223 +34,51 @@ } // end namespace llvm namespace { -cl::opt Action( - cl::desc("Action to perform:"), - cl::values( - clEnumValN(PrintRecords, "print-records", - "Print all records to stdout (default)"), - clEnumValN(PrintDetailedRecords, "print-detailed-records", - "Print full details of all records to stdout"), - clEnumValN(NullBackend, "null-backend", - "Do nothing after parsing (useful for timing)"), - clEnumValN(DumpJSON, "dump-json", - "Dump all records as machine-readable JSON"), - clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"), - clEnumValN(GenRegisterInfo, "gen-register-info", - "Generate registers and register classes info"), - clEnumValN(GenInstrInfo, "gen-instr-info", - "Generate instruction descriptions"), - clEnumValN(GenInstrDocs, "gen-instr-docs", - "Generate instruction documentation"), - clEnumValN(GenCallingConv, "gen-callingconv", - "Generate calling convention descriptions"), - clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"), - clEnumValN(GenDisassembler, "gen-disassembler", - "Generate disassembler"), - clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", - "Generate pseudo instruction lowering"), - clEnumValN(GenCompressInst, "gen-compress-inst-emitter", - "Generate RISCV compressed instructions."), - clEnumValN(GenAsmMatcher, "gen-asm-matcher", - "Generate assembly instruction matcher"), - clEnumValN(GenDAGISel, "gen-dag-isel", - "Generate a DAG instruction selector"), - clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", - "Generate DFA Packetizer for VLIW targets"), - clEnumValN(GenFastISel, "gen-fast-isel", - "Generate a \"fast\" instruction selector"), - clEnumValN(GenSubtarget, "gen-subtarget", - "Generate subtarget enumerations"), - clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums", - "Generate intrinsic enums"), - clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl", - "Generate intrinsic information"), - clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"), - clEnumValN(PrintSets, "print-sets", - "Print expanded sets for testing DAG exprs"), - clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", - "Generate option definitions"), - clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"), - clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"), - clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"), - clEnumValN(GenSearchableTables, "gen-searchable-tables", - "Generate generic binary-searchable table"), - clEnumValN(GenGlobalISel, "gen-global-isel", - "Generate GlobalISel selector"), - clEnumValN(GenGICombiner, "gen-global-isel-combiner", - "Generate GlobalISel combiner"), - clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables", - "Generate X86 EVEX to VEX compress tables"), - clEnumValN(GenX86FoldTables, "gen-x86-fold-tables", - "Generate X86 fold tables"), - clEnumValN(GenX86MnemonicTables, "gen-x86-mnemonic-tables", - "Generate X86 mnemonic tables"), - clEnumValN(GenRegisterBank, "gen-register-bank", - "Generate registers bank descriptions"), - clEnumValN(GenExegesis, "gen-exegesis", - "Generate llvm-exegesis tables"), - clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"), - clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl", - "Generate directive related declaration code (header file)"), - clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl", - "Generate directive related implementation code"), - clEnumValN(GenDXILOperation, "gen-dxil-operation", - "Generate DXIL operation information"), - clEnumValN(GenRISCVTargetDef, "gen-riscv-target-def", - "Generate the list of CPU for RISCV"))); + cl::OptionCategory PrintEnumsCat("Options for -print-enums"); cl::opt Class("class", cl::desc("Print Enum list for this class"), cl::value_desc("class name"), cl::cat(PrintEnumsCat)); -bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { - switch (Action) { - case PrintRecords: - OS << Records; // No argument, dump all contents - break; - case PrintDetailedRecords: - EmitDetailedRecords(Records, OS); - break; - case NullBackend: // No backend at all. - break; - case DumpJSON: - EmitJSON(Records, OS); - break; - case GenEmitter: - EmitCodeEmitter(Records, OS); - break; - case GenRegisterInfo: - EmitRegisterInfo(Records, OS); - break; - case GenInstrInfo: - EmitInstrInfo(Records, OS); - break; - case GenInstrDocs: - EmitInstrDocs(Records, OS); - break; - case GenCallingConv: - EmitCallingConv(Records, OS); - break; - case GenAsmWriter: - EmitAsmWriter(Records, OS); - break; - case GenAsmMatcher: - EmitAsmMatcher(Records, OS); - break; - case GenDisassembler: - EmitDisassembler(Records, OS); - break; - case GenPseudoLowering: - EmitPseudoLowering(Records, OS); - break; - case GenCompressInst: - EmitCompressInst(Records, OS); - break; - case GenDAGISel: - EmitDAGISel(Records, OS); - break; - case GenDFAPacketizer: - EmitDFAPacketizer(Records, OS); - break; - case GenFastISel: - EmitFastISel(Records, OS); - break; - case GenSubtarget: - EmitSubtarget(Records, OS); - break; - case GenIntrinsicEnums: - EmitIntrinsicEnums(Records, OS); - break; - case GenIntrinsicImpl: - EmitIntrinsicImpl(Records, OS); - break; - case GenOptParserDefs: - EmitOptParser(Records, OS); - break; - case GenOptRST: - EmitOptRST(Records, OS); - break; - case PrintEnums: { - for (Record *Rec : Records.getAllDerivedDefinitions(Class)) - OS << Rec->getName() << ", "; - OS << "\n"; - break; - } - case PrintSets: - { - SetTheory Sets; - Sets.addFieldExpander("Set", "Elements"); - for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { - OS << Rec->getName() << " = ["; - const std::vector *Elts = Sets.expand(Rec); - assert(Elts && "Couldn't expand Set instance"); - for (Record *Elt : *Elts) - OS << ' ' << Elt->getName(); - OS << " ]\n"; - } - break; - } - case GenCTags: - EmitCTags(Records, OS); - break; - case GenAttributes: - EmitAttributes(Records, OS); - break; - case GenSearchableTables: - EmitSearchableTables(Records, OS); - break; - case GenGlobalISel: - EmitGlobalISel(Records, OS); - break; - case GenGICombiner: - EmitGICombiner(Records, OS); - break; - case GenRegisterBank: - EmitRegisterBank(Records, OS); - break; - case GenX86EVEX2VEXTables: - EmitX86EVEX2VEXTables(Records, OS); - break; - case GenX86MnemonicTables: - EmitX86MnemonicTables(Records, OS); - break; - case GenX86FoldTables: - EmitX86FoldTables(Records, OS); - break; - case GenExegesis: - EmitExegesis(Records, OS); - break; - case GenAutomata: - EmitAutomata(Records, OS); - break; - case GenDirectivesEnumDecl: - EmitDirectivesDecl(Records, OS); - break; - case GenDirectivesEnumImpl: - EmitDirectivesImpl(Records, OS); - break; - case GenDXILOperation: - EmitDXILOperation(Records, OS); - break; - case GenRISCVTargetDef: - EmitRISCVTargetDef(Records, OS); - break; - } +void PrintRecords(RecordKeeper &Records, raw_ostream &OS) { + OS << Records; // No argument, dump all contents +} - return false; +void PrintEnums(RecordKeeper &Records, raw_ostream &OS) { + for (Record *Rec : Records.getAllDerivedDefinitions(Class)) + OS << Rec->getName() << ", "; + OS << "\n"; } + +void PrintSets(RecordKeeper &Records, raw_ostream &OS) { + SetTheory Sets; + Sets.addFieldExpander("Set", "Elements"); + for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { + OS << Rec->getName() << " = ["; + const std::vector *Elts = Sets.expand(Rec); + assert(Elts && "Couldn't expand Set instance"); + for (Record *Elt : *Elts) + OS << ' ' << Elt->getName(); + OS << " ]\n"; + } } +bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { return false; } + +TableGen::Emitter::Opt X[] = { + {"print-records", PrintRecords, "Print all records to stdout (default)", + true}, + {"print-detailed-records", EmitDetailedRecords, + "Print full details of all records to stdout"}, + {"null-backend", [](RecordKeeper &Records, raw_ostream &OS) {}, + "Do nothing after parsing (useful for timing)"}, + {"dump-json", EmitJSON, "Dump all records as machine-readable JSON"}, + {"print-enums", PrintEnums, "Print enum values for a class"}, + {"print-sets", PrintSets, "Print expanded sets for testing DAG exprs"}, +}; + +} // namespace + int main(int argc, char **argv) { InitLLVM X(argc, argv); cl::ParseCommandLineOptions(argc, argv); diff --git a/llvm/utils/TableGen/TableGenBackends.h b/llvm/utils/TableGen/TableGenBackends.h --- a/llvm/utils/TableGen/TableGenBackends.h +++ b/llvm/utils/TableGen/TableGenBackends.h @@ -15,6 +15,8 @@ #ifndef LLVM_UTILS_TABLEGEN_TABLEGENBACKENDS_H #define LLVM_UTILS_TABLEGEN_TABLEGENBACKENDS_H +#include + // A TableGen backend is a function that looks like // // EmitFoo(RecordKeeper &RK, raw_ostream &OS /*, anything else you need */ ) @@ -61,41 +63,12 @@ class raw_ostream; class RecordKeeper; -void EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS); -void EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS); -void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS); -void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS); -void EmitCallingConv(RecordKeeper &RK, raw_ostream &OS); -void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS); -void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS); -void EmitDFAPacketizer(RecordKeeper &RK, raw_ostream &OS); -void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS); -void EmitFastISel(RecordKeeper &RK, raw_ostream &OS); -void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS); -void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS); -void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS); -void EmitCompressInst(RecordKeeper &RK, raw_ostream &OS); -void EmitRegisterInfo(RecordKeeper &RK, raw_ostream &OS); -void EmitSubtarget(RecordKeeper &RK, raw_ostream &OS); void EmitMapTable(RecordKeeper &RK, raw_ostream &OS); -void EmitOptParser(RecordKeeper &RK, raw_ostream &OS); -void EmitOptRST(RecordKeeper &RK, raw_ostream &OS); -void EmitCTags(RecordKeeper &RK, raw_ostream &OS); -void EmitAttributes(RecordKeeper &RK, raw_ostream &OS); -void EmitSearchableTables(RecordKeeper &RK, raw_ostream &OS); -void EmitGlobalISel(RecordKeeper &RK, raw_ostream &OS); -void EmitGICombiner(RecordKeeper &RK, raw_ostream &OS); -void EmitX86EVEX2VEXTables(RecordKeeper &RK, raw_ostream &OS); -void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS); -void EmitX86MnemonicTables(RecordKeeper &RK, raw_ostream &OS); -void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS); -void EmitExegesis(RecordKeeper &RK, raw_ostream &OS); -void EmitAutomata(RecordKeeper &RK, raw_ostream &OS); -void EmitDirectivesDecl(RecordKeeper &RK, raw_ostream &OS); -void EmitDirectivesImpl(RecordKeeper &RK, raw_ostream &OS); -void EmitDXILOperation(RecordKeeper &RK, raw_ostream &OS); -void EmitRISCVTargetDef(const RecordKeeper &RK, raw_ostream &OS); -} // End llvm namespace +// Defined in DecoderEmitter.cpp +void EmitDecoder(RecordKeeper &RK, raw_ostream &OS, + const std::string &PredicateNamespace); + +} // namespace llvm #endif diff --git a/llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp b/llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp --- a/llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp @@ -13,7 +13,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "X86RecognizableInstr.h" #include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" @@ -241,8 +240,5 @@ } } // namespace -namespace llvm { -void EmitX86EVEX2VEXTables(RecordKeeper &RK, raw_ostream &OS) { - X86EVEX2VEXTablesEmitter(RK).run(OS); -} -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-x86-EVEX2VEX-tables", "Generate X86 EVEX to VEX compress tables"); diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp --- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp @@ -13,7 +13,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "X86RecognizableInstr.h" #include "llvm/Support/FormattedStream.h" #include "llvm/TableGen/Record.h" @@ -165,7 +164,7 @@ X86FoldTablesEmitter(RecordKeeper &R) : Records(R), Target(R) {} // run - Generate the 6 X86 memory fold tables. - void run(formatted_raw_ostream &OS); + void run(raw_ostream &OS); private: // Decides to which table to add the entry with the given instructions. @@ -512,7 +511,8 @@ } } -void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) { +void X86FoldTablesEmitter::run(raw_ostream &o) { + formatted_raw_ostream OS(o); emitSourceFileHeader("X86 fold tables", OS); // Holds all memory instructions @@ -611,10 +611,5 @@ printTable(Table4, "Table4", OS); } -namespace llvm { - -void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &o) { - formatted_raw_ostream OS(o); - X86FoldTablesEmitter(RK).run(OS); -} -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-x86-fold-tables", "Generate X86 fold tables"); diff --git a/llvm/utils/TableGen/X86MnemonicTables.cpp b/llvm/utils/TableGen/X86MnemonicTables.cpp --- a/llvm/utils/TableGen/X86MnemonicTables.cpp +++ b/llvm/utils/TableGen/X86MnemonicTables.cpp @@ -13,7 +13,6 @@ #include "CodeGenInstruction.h" #include "CodeGenTarget.h" -#include "TableGenBackends.h" #include "X86RecognizableInstr.h" #include "llvm/TableGen/Record.h" #include "llvm/TableGen/TableGenBackend.h" @@ -88,8 +87,5 @@ } // namespace -namespace llvm { -void EmitX86MnemonicTables(RecordKeeper &RK, raw_ostream &OS) { - X86MnemonicTablesEmitter(RK).run(OS); -} -} // namespace llvm +static TableGen::Emitter::OptClass + X("gen-x86-mnemonic-tables", "Generate X86 mnemonic tables");