diff --git a/llvm/lib/Object/RelocationResolver.cpp b/llvm/lib/Object/RelocationResolver.cpp
--- a/llvm/lib/Object/RelocationResolver.cpp
+++ b/llvm/lib/Object/RelocationResolver.cpp
@@ -252,6 +252,19 @@
   }
 }
 
+/// Returns true if \c Obj is an AMDGPU code object based solely on the value
+/// of e_machine.
+///
+/// AMDGPU code objects with an e_machine of EF_AMDGPU_MACH_NONE do not
+/// identify their arch as either r600 or amdgcn, but we can still handle
+/// their relocations. When we identify an ELF object with an UnknownArch,
+/// we use isUnknownAMDGPU to check for this case.
+static bool isUnknownAMDGPU(const ObjectFile &Obj) {
+  if (const auto *ELFObj = dyn_cast<ELFObjectFileBase>(&Obj))
+    return ELFObj->getEMachine() == ELF::EM_AMDGPU;
+  return false;
+}
+
 static bool supportsAmdgpu(uint64_t Type) {
   switch (Type) {
   case ELF::R_AMDGPU_ABS32:
@@ -789,6 +802,8 @@
       case Triple::riscv64:
         return {supportsRISCV, resolveRISCV};
       default:
+        if (isUnknownAMDGPU(Obj))
+          return {supportsAmdgpu, resolveAmdgpu};
         return {nullptr, nullptr};
       }
     }
@@ -821,11 +836,15 @@
       return {supportsSparc32, resolveSparc32};
     case Triple::hexagon:
       return {supportsHexagon, resolveHexagon};
+    case Triple::r600:
+      return {supportsAmdgpu, resolveAmdgpu};
     case Triple::riscv32:
       return {supportsRISCV, resolveRISCV};
     case Triple::csky:
       return {supportsCSKY, resolveCSKY};
     default:
+      if (isUnknownAMDGPU(Obj))
+        return {supportsAmdgpu, resolveAmdgpu};
       return {nullptr, nullptr};
     }
   } else if (Obj.isMachO()) {
diff --git a/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-amdgcn-relocs.yaml b/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-amdgcn-relocs.yaml
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-amdgcn-relocs.yaml
@@ -0,0 +1,142 @@
+# Tests AMDGPU relocations. We provide a .debug_info section with multiple
+# DW_AT_high_pc entries (that's one of the attributes for which relocations are
+# resolved by llvm-dwarfdump) and we add a relocation for each of them.
+#
+# RUN: yaml2obj %s | llvm-dwarfdump - 2>&1 | FileCheck %s
+
+# To add more tests you need to modify the Content of the .debug_abbrev and
+# .debug_info sections. To do that create a test.s which matches the assembly
+# code below, run the command that follows and copy over the "Content" value of
+# the respective sections:
+#
+# ```
+# $ cat test.s
+# .set .Ltests, 8           ; The number of tests
+#
+# .section .debug_abbrev,"",@progbits
+#  .byte 1                  ; Abbreviation Code
+#  .byte 0x11               ; DW_TAG_compile_unit
+#  .byte 0                  ; DW_CHILDREN_no
+#
+#  ; Add a DW_AT_high_pc for each relocation we test.
+#  .rept .Ltests
+#  .byte 0x12               ; DW_AT_high_pc
+#  .byte 0x01               ; DW_FORM_addr
+#  .endr
+#
+#  .byte 0                  ; EOM(1)
+#  .byte 0                  ; EOM(2)
+#  .byte 0                  ; EOM(3)
+#
+# .section .debug_info,"",@progbits
+#  .4byte (.Lend-.Lbegin)   ; Length of Unit
+# .Lbegin:
+#  .2byte 4                 ; DWARF version number
+#  .4byte 0                 ; Offset Into Abbrev. Section
+#  .byte 8                  ; Address Size (in bytes)
+#  .byte 1                  ; Abbrev 1
+#  ; The relocated values for the tests:
+#  .rept .Ltests
+#  .8byte 0x4242424242424242
+#  .endr
+# .Lend:
+# $ llvm-mc test.s -filetype obj -triple amdgcn -o - | obj2yaml
+# ```
+
+# CHECK-NOT: -: Error in creating MCRegInfo
+# CHECK: -:      file format elf64-amdgpu
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS64
+  Data:            ELFDATA2LSB
+  OSABI:           ELFOSABI_AMDGPU_HSA
+  ABIVersion:      0x02
+  Type:            ET_REL
+  Machine:         EM_AMDGPU
+  Flags:           [EF_AMDGPU_MACH_AMDGCN_GFX803]
+Sections:
+  - Name:            .debug_abbrev
+    Type:            SHT_PROGBITS
+    Content:         '01110012011201120112011201120112011201000000'
+  - Name:            .debug_info
+    Type:            SHT_PROGBITS
+    Content:         '48000000040000000000080142424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242'
+  - Name:            .rela.debug_info
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000008
+    Info:            .debug_info
+    Relocations:
+
+      # Test 1
+      # CHECK: DW_AT_high_pc (0x0000000000000001)
+      - Offset:          0x000000000000000C # 0xC + 8*0
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 2
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000043)
+      - Offset:          0x0000000000000014 # 0xC + 8*1
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 3
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x000000000000001C # 0xC + 8*2
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v0
+        Addend:          0xffffffffffffffff
+
+      # Test 4
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x0000000000000024 # 0xC + 8*3
+        Type:            R_AMDGPU_ABS64
+        Symbol:          vffffffffffffffff
+        Addend:          0x0
+
+      # Test 5
+      # CHECK: DW_AT_high_pc (0x0000000000000001)
+      - Offset:          0x000000000000002C # 0xC + 8*4
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 6
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000043)
+      - Offset:          0x0000000000000034 # 0xC + 8*5
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 7
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x000000000000003C # 0xC + 8*6
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v0
+        Addend:          0xffffffffffffffff
+
+      # Test 8
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x0000000000000044 # 0xC + 8*7
+        Type:            R_AMDGPU_ABS32
+        Symbol:          vffffffffffffffff
+        Addend:          0x0
+
+Symbols:
+  - Name:            v0
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0
+  - Name:            v1
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x1
+  - Name:            vffffffffffffffff
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:          0xffffffffffffffff
+...
diff --git a/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-r600-relocs.yaml b/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-r600-relocs.yaml
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/AMDGPU/known-r600-relocs.yaml
@@ -0,0 +1,115 @@
+# Tests AMDGPU relocations. We provide a .debug_info section with multiple
+# DW_AT_high_pc entries (that's one of the attributes for which relocations are
+# resolved by llvm-dwarfdump) and we add a relocation for each of them.
+#
+# RUN: yaml2obj %s | llvm-dwarfdump - 2>&1 | FileCheck %s
+
+# To add more tests you need to modify the Content of the .debug_abbrev and
+# .debug_info sections. To do that create a test.s which matches the assembly
+# code below, run the command that follows and copy over the "Content" value of
+# the respective sections:
+#
+# ```
+# $ cat test.s
+# .set .Ltests, 8           ; The number of tests
+#
+# .section .debug_abbrev,"",@progbits
+#  .byte 1                  ; Abbreviation Code
+#  .byte 0x11               ; DW_TAG_compile_unit
+#  .byte 0                  ; DW_CHILDREN_no
+#
+#  ; Add a DW_AT_high_pc for each relocation we test.
+#  .rept .Ltests
+#  .byte 0x12               ; DW_AT_high_pc
+#  .byte 0x01               ; DW_FORM_addr
+#  .endr
+#
+#  .byte 0                  ; EOM(1)
+#  .byte 0                  ; EOM(2)
+#  .byte 0                  ; EOM(3)
+#
+# .section .debug_info,"",@progbits
+#  .4byte (.Lend-.Lbegin)   ; Length of Unit
+# .Lbegin:
+#  .2byte 4                 ; DWARF version number
+#  .4byte 0                 ; Offset Into Abbrev. Section
+#  .byte 4                  ; Address Size (in bytes)
+#  .byte 1                  ; Abbrev 1
+#  ; The relocated values for the tests:
+#  .rept .Ltests
+#  .4byte 0x42424242
+#  .endr
+# .Lend:
+# $ llvm-mc test.s -filetype obj -triple amdgcn -o - | obj2yaml
+# ```
+
+# CHECK-NOT: -: Error in creating MCRegInfo
+# CHECK: -:      file format elf32-amdgpu
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_AMDGPU
+  Flags:           [EF_AMDGPU_MACH_R600_R600]
+Sections:
+  - Name:            .debug_abbrev
+    Type:            SHT_PROGBITS
+    Content:         '01110012011201120112011201120112011201000000'
+  - Name:            .debug_info
+    Type:            SHT_PROGBITS
+    Content:         '2800000004000000000004014242424242424242424242424242424242424242424242424242424242424242'
+  - Name:            .rela.debug_info
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000001
+    Info:            .debug_info
+    Relocations:
+
+      # FIXME: Is R_AMDGPU_ABS64 even 
+
+      # Test 1
+      # CHECK: DW_AT_high_pc (0x00000001)
+      - Offset:          0x0000000C # 0xC + 4*0
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 2
+      # CHECK-NEXT: DW_AT_high_pc (0x00000043)
+      - Offset:          0x00000010 # 0xC + 4*1
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 3
+      # FIXME: Why is this field printed as sign-extended 64-bit in a 32-bit executable?
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x00000014 # 0xC + 4*2
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v0
+        Addend:          0xffffffff
+
+      # Test 4
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffff)
+      - Offset:          0x00000018 # 0xC + 4*3
+        Type:            R_AMDGPU_ABS32
+        Symbol:          vffffffff
+        Addend:          0x0
+
+Symbols:
+  - Name:            v0
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0
+  - Name:            v1
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x1
+  - Name:            vffffffff
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0xffffffff
+...
diff --git a/llvm/test/tools/llvm-dwarfdump/AMDGPU/lit.local.cfg b/llvm/test/tools/llvm-dwarfdump/AMDGPU/lit.local.cfg
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/AMDGPU/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'AMDGPU' in config.root.targets:
+    config.unsupported = True
diff --git a/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-amdgcn-relocs.yaml b/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-amdgcn-relocs.yaml
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-amdgcn-relocs.yaml
@@ -0,0 +1,141 @@
+# Tests AMDGPU relocations. We provide a .debug_info section with multiple
+# DW_AT_high_pc entries (that's one of the attributes for which relocations are
+# resolved by llvm-dwarfdump) and we add a relocation for each of them.
+#
+# RUN: yaml2obj %s | llvm-dwarfdump - 2>&1 | FileCheck %s
+
+# To add more tests you need to modify the Content of the .debug_abbrev and
+# .debug_info sections. To do that create a test.s which matches the assembly
+# code below, run the command that follows and copy over the "Content" value of
+# the respective sections:
+#
+# ```
+# $ cat test.s
+# .set .Ltests, 8           ; The number of tests
+#
+# .section .debug_abbrev,"",@progbits
+#  .byte 1                  ; Abbreviation Code
+#  .byte 0x11               ; DW_TAG_compile_unit
+#  .byte 0                  ; DW_CHILDREN_no
+#
+#  ; Add a DW_AT_high_pc for each relocation we test.
+#  .rept .Ltests
+#  .byte 0x12               ; DW_AT_high_pc
+#  .byte 0x01               ; DW_FORM_addr
+#  .endr
+#
+#  .byte 0                  ; EOM(1)
+#  .byte 0                  ; EOM(2)
+#  .byte 0                  ; EOM(3)
+#
+# .section .debug_info,"",@progbits
+#  .4byte (.Lend-.Lbegin)   ; Length of Unit
+# .Lbegin:
+#  .2byte 4                 ; DWARF version number
+#  .4byte 0                 ; Offset Into Abbrev. Section
+#  .byte 8                  ; Address Size (in bytes)
+#  .byte 1                  ; Abbrev 1
+#  ; The relocated values for the tests:
+#  .rept .Ltests
+#  .8byte 0x4242424242424242
+#  .endr
+# .Lend:
+# $ llvm-mc test.s -filetype obj -triple amdgcn -o - | obj2yaml
+# ```
+
+# CHECK: -: Error in creating MCRegInfo
+# CHECK: -:      file format elf64-amdgpu
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS64
+  Data:            ELFDATA2LSB
+  OSABI:           ELFOSABI_AMDGPU_HSA
+  ABIVersion:      0x02
+  Type:            ET_REL
+  Machine:         EM_AMDGPU
+Sections:
+  - Name:            .debug_abbrev
+    Type:            SHT_PROGBITS
+    Content:         '01110012011201120112011201120112011201000000'
+  - Name:            .debug_info
+    Type:            SHT_PROGBITS
+    Content:         '48000000040000000000080142424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242424242'
+  - Name:            .rela.debug_info
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000008
+    Info:            .debug_info
+    Relocations:
+
+      # Test 1
+      # CHECK: DW_AT_high_pc (0x0000000000000001)
+      - Offset:          0x000000000000000C # 0xC + 8*0
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 2
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000043)
+      - Offset:          0x0000000000000014 # 0xC + 8*1
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 3
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x000000000000001C # 0xC + 8*2
+        Type:            R_AMDGPU_ABS64
+        Symbol:          v0
+        Addend:          0xffffffffffffffff
+
+      # Test 4
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x0000000000000024 # 0xC + 8*3
+        Type:            R_AMDGPU_ABS64
+        Symbol:          vffffffffffffffff
+        Addend:          0x0
+
+      # Test 5
+      # CHECK: DW_AT_high_pc (0x0000000000000001)
+      - Offset:          0x000000000000002C # 0xC + 8*4
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 6
+      # CHECK-NEXT: DW_AT_high_pc (0x0000000000000043)
+      - Offset:          0x0000000000000034 # 0xC + 8*5
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 7
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x000000000000003C # 0xC + 8*6
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v0
+        Addend:          0xffffffffffffffff
+
+      # Test 8
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x0000000000000044 # 0xC + 8*7
+        Type:            R_AMDGPU_ABS32
+        Symbol:          vffffffffffffffff
+        Addend:          0x0
+
+Symbols:
+  - Name:            v0
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0
+  - Name:            v1
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x1
+  - Name:            vffffffffffffffff
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:          0xffffffffffffffff
+...
diff --git a/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-r600-relocs.yaml b/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-r600-relocs.yaml
new file mode 100644
--- /dev/null
+++ b/llvm/test/tools/llvm-dwarfdump/AMDGPU/unknown-r600-relocs.yaml
@@ -0,0 +1,112 @@
+# Tests AMDGPU relocations. We provide a .debug_info section with multiple
+# DW_AT_high_pc entries (that's one of the attributes for which relocations are
+# resolved by llvm-dwarfdump) and we add a relocation for each of them.
+#
+# RUN: yaml2obj %s | llvm-dwarfdump - 2>&1 | FileCheck %s
+
+# To add more tests you need to modify the Content of the .debug_abbrev and
+# .debug_info sections. To do that create a test.s which matches the assembly
+# code below, run the command that follows and copy over the "Content" value of
+# the respective sections:
+#
+# ```
+# $ cat test.s
+# .set .Ltests, 8           ; The number of tests
+#
+# .section .debug_abbrev,"",@progbits
+#  .byte 1                  ; Abbreviation Code
+#  .byte 0x11               ; DW_TAG_compile_unit
+#  .byte 0                  ; DW_CHILDREN_no
+#
+#  ; Add a DW_AT_high_pc for each relocation we test.
+#  .rept .Ltests
+#  .byte 0x12               ; DW_AT_high_pc
+#  .byte 0x01               ; DW_FORM_addr
+#  .endr
+#
+#  .byte 0                  ; EOM(1)
+#  .byte 0                  ; EOM(2)
+#  .byte 0                  ; EOM(3)
+#
+# .section .debug_info,"",@progbits
+#  .4byte (.Lend-.Lbegin)   ; Length of Unit
+# .Lbegin:
+#  .2byte 4                 ; DWARF version number
+#  .4byte 0                 ; Offset Into Abbrev. Section
+#  .byte 4                  ; Address Size (in bytes)
+#  .byte 1                  ; Abbrev 1
+#  ; The relocated values for the tests:
+#  .rept .Ltests
+#  .4byte 0x42424242
+#  .endr
+# .Lend:
+# $ llvm-mc test.s -filetype obj -triple amdgcn -o - | obj2yaml
+# ```
+
+# CHECK: -: Error in creating MCRegInfo
+# CHECK: -:      file format elf32-amdgpu
+
+--- !ELF
+FileHeader:
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_AMDGPU
+Sections:
+  - Name:            .debug_abbrev
+    Type:            SHT_PROGBITS
+    Content:         '01110012011201120112011201120112011201000000'
+  - Name:            .debug_info
+    Type:            SHT_PROGBITS
+    Content:         '2800000004000000000004014242424242424242424242424242424242424242424242424242424242424242'
+  - Name:            .rela.debug_info
+    Type:            SHT_RELA
+    Flags:           [ SHF_INFO_LINK ]
+    Link:            .symtab
+    AddressAlign:    0x0000000000000001
+    Info:            .debug_info
+    Relocations:
+
+      # Test 1
+      # CHECK: DW_AT_high_pc (0x00000001)
+      - Offset:          0x0000000C # 0xC + 4*0
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x0
+
+      # Test 2
+      # CHECK-NEXT: DW_AT_high_pc (0x00000043)
+      - Offset:          0x00000010 # 0xC + 4*1
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v1
+        Addend:          0x42
+
+      # Test 3
+      # FIXME: Why is this field printed as sign-extended 64-bit in a 32-bit executable?
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffffffffffff)
+      - Offset:          0x00000014 # 0xC + 4*2
+        Type:            R_AMDGPU_ABS32
+        Symbol:          v0
+        Addend:          0xffffffff
+
+      # Test 4
+      # CHECK-NEXT: DW_AT_high_pc (0xffffffff)
+      - Offset:          0x00000018 # 0xC + 4*3
+        Type:            R_AMDGPU_ABS32
+        Symbol:          vffffffff
+        Addend:          0x0
+
+Symbols:
+  - Name:            v0
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x0
+  - Name:            v1
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0x1
+  - Name:            vffffffff
+    Type:            STT_SECTION
+    Section:         .debug_info
+    Value:           0xffffffff
+...