diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
--- a/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
@@ -398,7 +398,7 @@
 
   if (IndexReg.getReg()) {
     if (NeedPlus) O << " + ";
-    if (ScaleVal != 1)
+    if (ScaleVal != 1 || !BaseReg.getReg())
       O << ScaleVal << '*';
     printOperand(MI, Op+X86::AddrIndexReg, O);
     NeedPlus = true;
diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax.txt b/llvm/test/MC/Disassembler/X86/intel-syntax.txt
--- a/llvm/test/MC/Disassembler/X86/intel-syntax.txt
+++ b/llvm/test/MC/Disassembler/X86/intel-syntax.txt
@@ -171,4 +171,11 @@
 # CHECK: lea	rcx, [rsp + 4]
 0x48 0x8d 0x4c 0x24 0x04 
 
+# CHECK: lea	rcx, [1*rax]
+0x48 0x8d 0x0c 0x05 0x00 0x00 0x00 0x00
 
+# CHECK: lea	rcx, [1*rax + 4]
+0x48 0x8d 0x0c 0x05 0x04 0x00 0x00 0x00
+
+# CHECK: lea	rcx, [2*rax]
+0x48 0x8d 0x0c 0x45 0x00 0x00 0x00 0x00