diff --git a/lld/test/COFF/arm64-relocs-imports.test b/lld/test/COFF/arm64-relocs-imports.test --- a/lld/test/COFF/arm64-relocs-imports.test +++ b/lld/test/COFF/arm64-relocs-imports.test @@ -43,7 +43,7 @@ # BEFORE: 84: 91400000 add x0, x0, #0, lsl #12 # BEFORE: 88: f9400000 ldr x0, [x0] # BEFORE: 8c: 00000001 udf #1 -# BEFORE: 90: 30091a20 adr x0, #74565 +# BEFORE: 90: 30091a20 adr x0, 0x123d5 # BEFORE: 94: 54000001 b.ne 0x94 # BEFORE: 98: 36000000 tbz w0, #0, 0x98 # BEFORE: 9c: 00000001 udf #1 @@ -87,7 +87,7 @@ # AFTER: 140001084: 91400400 add x0, x0, #1, lsl #12 # AFTER: 140001088: f941c400 ldr x0, [x0, #904] # AFTER: 14000108c: 00000003 udf #3 -# AFTER: 140001090: 300995e0 adr x0, #78525 +# AFTER: 140001090: 300995e0 adr x0, 0x14001434d # AFTER: 140001094: 54000081 b.ne 0x1400010a4 # AFTER: 140001098: 36000060 tbz w0, #0, 0x1400010a4 # AFTER: 14000109c: ffffff61 diff --git a/lld/test/ELF/aarch64-copy.s b/lld/test/ELF/aarch64-copy.s --- a/lld/test/ELF/aarch64-copy.s +++ b/lld/test/ELF/aarch64-copy.s @@ -65,7 +65,7 @@ // CODE-EMPTY: // CODE-NEXT: <_start>: // S + A - P = 0x2303f0 + 0 - 0x21031c = 131284 -// CODE-NEXT: 21031c: adr x1, #131284 +// CODE-NEXT: 21031c: adr x1, 0x2303f0 // Page(S + A) - Page(P) = Page(0x230400) - Page(0x210320) = 131072 // CODE-NEXT: 210320: adrp x2, 0x230000 // (S + A) & 0xFFF = (0x230400 + 0) & 0xFFF = 1024 diff --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s --- a/lld/test/ELF/aarch64-relocs.s +++ b/lld/test/ELF/aarch64-relocs.s @@ -14,7 +14,7 @@ # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_LO21: # CHECK-EMPTY: # CHECK: <_start>: -# CHECK: 0: 10000021 adr x1, #4 +# CHECK: 0: 10000021 adr x1, 0x210124 # CHECK: : # CHECK: 4: # #4 is the adr immediate value. diff --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s --- a/lld/test/ELF/aarch64-undefined-weak.s +++ b/lld/test/ELF/aarch64-undefined-weak.s @@ -49,7 +49,7 @@ // CHECK-NEXT: 10010124: bl 0x10010128 // CHECK-NEXT: 10010128: b.eq 0x1001012c // CHECK-NEXT: 1001012c: cbz x1, 0x10010130 -// CHECK-NEXT: 10010130: adr x0, #0 +// CHECK-NEXT: 10010130: adr x0, 0x10010130 // CHECK-NEXT: 10010134: adrp x0, 0x10010000 // CHECK-NEXT: 10010138: ldr x8, 0x10010138 // CHECK: 1001013c: 00 00 00 00 .word 0x00000000 diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -285,7 +285,7 @@ } def adrplabel : Operand { let EncoderMethod = "getAdrLabelOpValue"; - let PrintMethod = "printAdrpLabel"; + let PrintMethod = "printAdrAdrpLabel"; let ParserMatchClass = AdrpOperand; let OperandType = "OPERAND_PCREL"; } @@ -297,7 +297,9 @@ } def adrlabel : Operand { let EncoderMethod = "getAdrLabelOpValue"; + let PrintMethod = "printAdrAdrpLabel"; let ParserMatchClass = AdrOperand; + let OperandType = "OPERAND_PCREL"; } class SImmOperand : AsmOperandClass { diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h @@ -174,8 +174,8 @@ const MCSubtargetInfo &STI, raw_ostream &O); void printMatrixIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O); - void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, - const MCSubtargetInfo &STI, raw_ostream &O); + void printAdrAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum, + const MCSubtargetInfo &STI, raw_ostream &O); void printBarrierOption(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O); void printBarriernXSOption(const MCInst *MI, unsigned OpNum, diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp @@ -1772,19 +1772,23 @@ } } -void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, uint64_t Address, - unsigned OpNum, - const MCSubtargetInfo &STI, - raw_ostream &O) { +void AArch64InstPrinter::printAdrAdrpLabel(const MCInst *MI, uint64_t Address, + unsigned OpNum, + const MCSubtargetInfo &STI, + raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNum); // If the label has already been resolved to an immediate offset (say, when // we're running the disassembler), just print the immediate. if (Op.isImm()) { - const int64_t Offset = Op.getImm() * 4096; + int64_t Offset = Op.getImm(); + if (MI->getOpcode() == AArch64::ADRP) { + Offset = Offset * 4096; + Address = Address & -4096; + } O << markup(""); diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -413,7 +413,9 @@ for (unsigned i = 0, e = Inst.getNumOperands(); i != e; i++) { if (Desc.operands()[i].OperandType == MCOI::OPERAND_PCREL) { int64_t Imm = Inst.getOperand(i).getImm(); - if (Inst.getOpcode() == AArch64::ADRP) + if (Inst.getOpcode() == AArch64::ADR) + Target = Addr + Imm; + else if (Inst.getOpcode() == AArch64::ADRP) Target = (Addr & -4096) + Imm * 4096; else Target = Addr + Imm * 4; diff --git a/llvm/test/MC/AArch64/adr.s b/llvm/test/MC/AArch64/adr.s --- a/llvm/test/MC/AArch64/adr.s +++ b/llvm/test/MC/AArch64/adr.s @@ -1,15 +1,15 @@ // RUN: llvm-mc -triple aarch64-elf -filetype=obj %s -o - | llvm-objdump --no-print-imm-hex -d -r - | FileCheck %s -// CHECK: adr x0, #100 -// CHECK-NEXT: adr x2, #0 +// CHECK: adr x0, 0x64 +// CHECK-NEXT: adr x2, 0x4 // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol -// CHECK-NEXT: adr x3, #0 +// CHECK-NEXT: adr x3, 0x8 // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol -// CHECK-NEXT: adr x4, #0 +// CHECK-NEXT: adr x4, 0xc // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 -// CHECK-NEXT: adr x5, #0 +// CHECK-NEXT: adr x5, 0x10 // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 -// CHECK-NEXT: adr x6, #0 +// CHECK-NEXT: adr x6, 0x14 // CHECK-NEXT: R_AARCH64_ADR_PREL_LO21 Symbol+0xf1000 adr x0, 100 diff --git a/llvm/test/MC/AArch64/coff-relocations.s b/llvm/test/MC/AArch64/coff-relocations.s --- a/llvm/test/MC/AArch64/coff-relocations.s +++ b/llvm/test/MC/AArch64/coff-relocations.s @@ -111,7 +111,7 @@ // DISASM: 40: 91000000 add x0, x0, #0 // DISASM: 44: 91400000 add x0, x0, #0, lsl #12 // DISASM: 48: f9400000 ldr x0, [x0] -// DISASM: 4c: 30091a20 adr x0, #74565 +// DISASM: 4c: 30091a20 adr x0, 0x12391 // DATA: Contents of section .rdata: // DATA-NEXT: 0000 30000000 08000000 diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test @@ -17,7 +17,7 @@ # CHECK: Disassembly of section .mysection: # CHECK: <_start>: -# CHECK: 0: 10000021 adr x1, #4 +# CHECK: 0: 10000021 adr x1, 0x4 # CHECK: : # CHECK: 4: 48 65 6c 6c .word # CHECK: 8: 6f 2c 20 77 .word diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml b/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml @@ -1,9 +1,11 @@ # RUN: yaml2obj %s -o %t -# RUN: llvm-objdump %t -d --no-show-raw-insn --no-leading-addr | FileCheck %s +# RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s # CHECK-LABEL: <_start>: -# CHECK-NEXT: adrp x2, 0x220000 -# CHECK-NEXT: adrp x2, 0x201000 <_start+0xf00> +# CHECK-NEXT: 200100: adr x0, 0x220000 +# CHECK-NEXT: 200104: adr x0, 0x201004 <_start+0xf04> +# CHECK-NEXT: 200108: adrp x2, 0x220000 +# CHECK-NEXT: 20010c: adrp x2, 0x201000 <_start+0xf00> --- !ELF FileHeader: @@ -16,7 +18,7 @@ Type: SHT_PROGBITS Address: 0x200100 Flags: [SHF_ALLOC, SHF_EXECINSTR] - Content: '02010090020000B0' + Content: '00F80F100078001002010090020000B0' - Name: .data Type: SHT_PROGBITS Flags: [SHF_ALLOC, SHF_WRITE]