diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp --- a/llvm/lib/Analysis/ScalarEvolution.cpp +++ b/llvm/lib/Analysis/ScalarEvolution.cpp @@ -5733,6 +5733,12 @@ const SCEV *PHISCEV = getAddRecExpr(StartVal, Accum, L, Flags); insertValueToMap(PN, PHISCEV); + if (auto *AR = dyn_cast(PHISCEV)) { + setNoWrapFlags(const_cast(AR), + (SCEV::NoWrapFlags)(AR->getNoWrapFlags() | + proveNoWrapViaConstantRanges(AR))); + } + // We can add Flags to the post-inc expression only if we // know that it is *undefined behavior* for BEValueV to // overflow. @@ -5858,6 +5864,12 @@ forgetMemoizedResults(SymbolicName); insertValueToMap(PN, PHISCEV); + if (auto *AR = dyn_cast(PHISCEV)) { + setNoWrapFlags(const_cast(AR), + (SCEV::NoWrapFlags)(AR->getNoWrapFlags() | + proveNoWrapViaConstantRanges(AR))); + } + // We can add Flags to the post-inc expression only if we // know that it is *undefined behavior* for BEValueV to // overflow. diff --git a/llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll b/llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll --- a/llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll +++ b/llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll @@ -10,7 +10,7 @@ ; AddRec: {{{%A,+,(8 * (zext i32 %m to i64) * (zext i32 %o to i64))}<%for.i>,+,(8 * (zext i32 %o to i64))}<%for.j>,+,8}<%for.k> ; CHECK: Base offset: %A ; CHECK: ArrayDecl[UnknownSize][(zext i32 %m to i64)][(zext i32 %o to i64)] with elements of 8 bytes. -; CHECK: ArrayRef[{0,+,1}<%for.i>][{0,+,1}<%for.j>][{0,+,1}<%for.k>] +; CHECK: ArrayRef[{0,+,1}<%for.i>][{0,+,1}<%for.j>][{0,+,1}<%for.k>] target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll b/llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll --- a/llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll +++ b/llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll @@ -12,19 +12,19 @@ ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] ; CHECK-NEXT: --> %iv U: full-set S: full-set Exits: <> LoopDispositions: { %loop.header: Variant, %loop2: Invariant, %loop3: Invariant } ; CHECK-NEXT: %iv2 = phi i32 [ %iv, %loop.header ], [ %iv2.next, %loop2 ] -; CHECK-NEXT: --> {%iv,+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {%iv,+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2: Computable, %loop.header: Variant } ; CHECK-NEXT: %iv2.next = add i32 %iv2, 1 -; CHECK-NEXT: --> {(1 + %iv),+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {(1 + %iv),+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2: Computable, %loop.header: Variant } ; CHECK-NEXT: %v = load i32, ptr %p, align 4 ; CHECK-NEXT: --> %v U: full-set S: full-set Exits: <> LoopDispositions: { %loop2: Variant, %loop.header: Variant } ; CHECK-NEXT: %iv2.ext = sext i32 %iv2 to i64 -; CHECK-NEXT: --> (sext i32 {%iv,+,1}<%loop2> to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: <> LoopDispositions: { %loop.header: Variant, %loop2: Computable, %loop3: Invariant } +; CHECK-NEXT: --> (sext i32 {%iv,+,1}<%loop2> to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: <> LoopDispositions: { %loop.header: Variant, %loop2: Computable, %loop3: Invariant } ; CHECK-NEXT: %iv3 = phi i64 [ %iv2.ext, %loop2.end ], [ %iv3.next, %loop3 ] -; CHECK-NEXT: --> {(sext i32 {%iv,+,1}<%loop2> to i64),+,1}<%loop3> U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 {%iv,+,1}<%loop2> to i64) LoopDispositions: { %loop3: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {(sext i32 {%iv,+,1}<%loop2> to i64),+,1}<%loop3> U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 {%iv,+,1}<%loop2> to i64) LoopDispositions: { %loop3: Computable, %loop.header: Variant } ; CHECK-NEXT: %iv3.next = add nsw i64 %iv3, 1 -; CHECK-NEXT: --> {(1 + (sext i32 {%iv,+,1}<%loop2> to i64)),+,1}<%loop3> U: [-2147483647,2147483649) S: [-2147483647,2147483649) Exits: (1 + (sext i32 {%iv,+,1}<%loop2> to i64)) LoopDispositions: { %loop3: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {(1 + (sext i32 {%iv,+,1}<%loop2> to i64)),+,1}<%loop3> U: [-2147483647,2147483649) S: [-2147483647,2147483649) Exits: (1 + (sext i32 {%iv,+,1}<%loop2> to i64)) LoopDispositions: { %loop3: Computable, %loop.header: Variant } ; CHECK-NEXT: %iv.next = trunc i64 %iv3 to i32 -; CHECK-NEXT: --> {{\{}}{%iv,+,1}<%loop2>,+,1}<%loop3> U: full-set S: full-set --> {%iv,+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop.header: Variant, %loop2: Variant, %loop3: Computable } +; CHECK-NEXT: --> {{{.*}}{%iv,+,1}<%loop2>,+,1}<%loop3> U: full-set S: full-set --> {%iv,+,1}<%loop2> U: full-set S: full-set Exits: <> LoopDispositions: { %loop.header: Variant, %loop2: Variant, %loop3: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test ; CHECK-NEXT: Loop %loop2: Unpredictable backedge-taken count. ; CHECK-NEXT: Loop %loop2: constant max backedge-taken count is -1 diff --git a/llvm/test/Analysis/ScalarEvolution/becount-invalidation.ll b/llvm/test/Analysis/ScalarEvolution/becount-invalidation.ll --- a/llvm/test/Analysis/ScalarEvolution/becount-invalidation.ll +++ b/llvm/test/Analysis/ScalarEvolution/becount-invalidation.ll @@ -15,7 +15,7 @@ ; CHECK-NEXT: %ptr1.next = phi ptr [ %ptr2, %loop.header ], [ %ptr1.next.next, %loop2.latch ] ; CHECK-NEXT: --> {%ptr2,+,8}<%loop2.header> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } ; CHECK-NEXT: %iv = phi i64 [ 0, %loop.header ], [ %iv.next, %loop2.latch ] -; CHECK-NEXT: --> {0,+,1}<%loop2.header> U: [0,1) S: [0,1) Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {0,+,1}<%loop2.header> U: [0,1) S: [0,1) Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } ; CHECK-NEXT: %ptr1.dummy = getelementptr inbounds i64, ptr %ptr1.next, i64 0 ; CHECK-NEXT: --> {%ptr2,+,8}<%loop2.header> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } ; CHECK-NEXT: %val = load i64, ptr %ptr1.dummy, align 8 @@ -23,7 +23,7 @@ ; CHECK-NEXT: %ptr1.next.next = getelementptr inbounds i64, ptr %ptr1.next, i64 1 ; CHECK-NEXT: --> {(8 + %ptr2),+,8}<%loop2.header> U: full-set S: full-set Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop2.header> U: [1,2) S: [1,2) Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } +; CHECK-NEXT: --> {1,+,1}<%loop2.header> U: [1,2) S: [1,2) Exits: <> LoopDispositions: { %loop2.header: Computable, %loop.header: Variant } ; CHECK-NEXT: %ptr2.next = phi ptr [ %ptr1, %if ], [ %arg, %else ] ; CHECK-NEXT: --> %ptr2.next U: full-set S: full-set Exits: <> LoopDispositions: { %loop.header: Variant, %loop2.header: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @test diff --git a/llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll b/llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll --- a/llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll +++ b/llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll @@ -18,17 +18,17 @@ ; CHECK: %sum4 = add i32 %sum3, %phi6 ; CHECK-NEXT: --> {159,+,6}<%loop2> ; CHECK: %s1 = add i32 %phi1, %phi4 -; CHECK-NEXT: --> {{{{}}73,+,1}<%loop1>,+,1}<%loop2> +; CHECK-NEXT: --> {{{{}}73,+,1}<%loop1>,+,1}<%loop2> ; CHECK: %s2 = add i32 %phi5, %phi2 -; CHECK-NEXT: --> {{{{}}57,+,2}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}57,+,2}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %sum1, %sum3 ; CHECK-NEXT: --> {{{{}}130,+,3}<%loop1>,+,3}<%loop2> ; CHECK: %s4 = add i32 %sum4, %sum2 ; CHECK-NEXT: --> {{{{}}179,+,6}<%loop1>,+,6}<%loop2> ; CHECK: %s5 = add i32 %phi3, %sum3 -; CHECK-NEXT: --> {{{{}}122,+,3}<%loop1>,+,3}<%loop2> +; CHECK-NEXT: --> {{{{}}122,+,3}<%loop1>,+,3}<%loop2> ; CHECK: %s6 = add i32 %sum2, %phi6 -; CHECK-NEXT: --> {{{{}}63,+,6}<%loop1>,+,3}<%loop2> +; CHECK-NEXT: --> {{{{}}63,+,6}<%loop1>,+,3}<%loop2> entry: br label %loop1 @@ -92,7 +92,7 @@ ; CHECK: %s2 = add i32 %is2, %phi4 ; CHECK-NEXT: --> {(222 + %b),+,7}<%loop2> ; CHECK: %s3 = add i32 %is1, %phi5 -; CHECK-NEXT: --> {{{{}}(59 + (2 * %a) + %b),+,6}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}(59 + (2 * %a) + %b),+,6}<%loop1>,+,2}<%loop2> ; CHECK: %s4 = add i32 %phi2, %is2 ; CHECK-NEXT: --> {{{{}}(159 + (2 * %b)),+,2}<%loop1>,+,6}<%loop2> ; CHECK: %s5 = add i32 %is1, %is2 @@ -357,17 +357,17 @@ ; CHECK-LABEL: Classifying expressions for: @test_06 ; CHECK: %s1 = add i32 %phi1, %phi2 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s2 = add i32 %phi2, %phi1 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %phi1, %phi3 -; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> ; CHECK: %s4 = add i32 %phi3, %phi1 -; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> ; CHECK: %s5 = add i32 %phi2, %phi3 -; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> ; CHECK: %s6 = add i32 %phi3, %phi2 -; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> entry: br label %loop1 @@ -409,17 +409,17 @@ ; CHECK-LABEL: Classifying expressions for: @test_07 ; CHECK: %s1 = add i32 %phi1, %phi2 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s2 = add i32 %phi2, %phi1 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %phi1, %phi3 -; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> +; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> ; CHECK: %s4 = add i32 %phi3, %phi1 -; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> +; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> ; CHECK: %s5 = add i32 %phi2, %phi3 -; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> ; CHECK: %s6 = add i32 %phi3, %phi2 -; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> entry: br label %loop3 @@ -461,7 +461,7 @@ ; CHECK-LABEL: Classifying expressions for: @test_08 ; CHECK: %tmp11 = add i64 %iv.2.2, %iv.2.1 -; CHECK-NEXT: --> ({0,+,-1}<%loop_2> + %iv.2.1) +; CHECK-NEXT: --> ({0,+,-1}<%loop_2> + %iv.2.1) ; CHECK: %tmp12 = trunc i64 %tmp11 to i32 ; CHECK-NEXT: --> ((trunc i64 %iv.2.1 to i32) + {0,+,-1}<%loop_2>) ; CHECK: %tmp14 = mul i32 %tmp12, %tmp7 @@ -569,7 +569,7 @@ ; CHECK-LABEL: Classifying expressions for: @test_10 ; CHECK: %uncle = phi i64 [ %uncle.outer.next, %uncle.loop.backedge ], [ 0, %outer.loop ] -; CHECK-NEXT: --> {0,+,1}<%uncle.loop> +; CHECK-NEXT: --> {0,+,1}<%uncle.loop> ; CHECK: %iv1 = phi i64 [ %iv1.next, %guarded ], [ 0, %uncle.loop ] ; CHECK-NEXT: --> {0,+,1}<%loop1> ; CHECK: %iv1.trunc = trunc i64 %iv1 to i32 @@ -577,7 +577,7 @@ ; CHECK: %iv1.next = add nuw nsw i64 %iv1, 1 ; CHECK-NEXT: --> {1,+,1}<%loop1> ; CHECK: %uncle.outer.next = add i64 %uncle, 1 -; CHECK-NEXT: --> {1,+,1}<%uncle.loop> +; CHECK-NEXT: --> {1,+,1}<%uncle.loop> ; CHECK: %iv2 = phi i32 [ %iv2.next, %loop2 ], [ %param, %loop2.preheader ] ; CHECK-NEXT: --> {%param,+,1}<%loop2> ; CHECK: %iv2.next = add i32 %iv2, 1 diff --git a/llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll b/llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll --- a/llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll +++ b/llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll @@ -426,9 +426,9 @@ ; CHECK-LABEL: 'logical_and_2ops_and_constant' ; CHECK-NEXT: Classifying expressions for: @logical_and_2ops_and_constant ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,43) S: [0,43) Exits: (42 umin %n) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,43) S: [0,43) Exits: (42 umin %n) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,44) S: [1,44) Exits: (1 + (42 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,44) S: [1,44) Exits: (1 + (42 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umin = call i32 @llvm.umin.i32(i32 %n, i32 42) ; CHECK-NEXT: --> (42 umin %n) U: [0,43) S: [0,43) Exits: (42 umin %n) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: %cond = select i1 %cond_p1, i1 true, i1 %cond_p0 @@ -469,9 +469,9 @@ ; CHECK-NEXT: %inc3 = add nsw i32 %e.1, 1 ; CHECK-NEXT: --> {(1 + %d.0),+,1}<%for.cond> U: full-set S: full-set Exits: 1 LoopDispositions: { %for.cond: Computable, %while.cond: Variant } ; CHECK-NEXT: %f.1 = phi i32 [ %inc8, %for.body5 ], [ 0, %for.cond4.preheader ] -; CHECK-NEXT: --> {0,+,1}<%for.cond4> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %for.cond4: Computable, %while.cond: Variant } +; CHECK-NEXT: --> {0,+,1}<%for.cond4> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %for.cond4: Computable, %while.cond: Variant } ; CHECK-NEXT: %inc8 = add i32 %f.1, 1 -; CHECK-NEXT: --> {1,+,1}<%for.cond4> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %for.cond4: Computable, %while.cond: Variant } +; CHECK-NEXT: --> {1,+,1}<%for.cond4> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %for.cond4: Computable, %while.cond: Variant } ; CHECK-NEXT: Determining loop execution counts for: @computeSCEVAtScope ; CHECK-NEXT: Loop %for.cond: backedge-taken count is (-1 * %d.0) ; CHECK-NEXT: Loop %for.cond: constant max backedge-taken count is -1 @@ -983,9 +983,9 @@ ; CHECK-NEXT: %n1 = add i32 %n.ext, 1 ; CHECK-NEXT: --> (1 + (zext i16 %n to i32)) U: [1,65537) S: [1,65537) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65537) S: [0,65537) Exits: ((1 + (zext i16 %n to i32)) umin %m) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65537) S: [0,65537) Exits: ((1 + (zext i16 %n to i32)) umin %m) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65538) S: [1,65538) Exits: (1 + ((1 + (zext i16 %n to i32)) umin %m)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65538) S: [1,65538) Exits: (1 + ((1 + (zext i16 %n to i32)) umin %m)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_not_zero @@ -1019,9 +1019,9 @@ ; CHECK-NEXT: %n1 = add i32 %n.ext, 1 ; CHECK-NEXT: --> (1 + (zext i16 %n to i32)) U: [1,65537) S: [1,65537) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65537) S: [0,65537) Exits: (%m umin_seq (1 + (zext i16 %n to i32))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65537) S: [0,65537) Exits: (%m umin_seq (1 + (zext i16 %n to i32))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65538) S: [1,65538) Exits: (1 + (%m umin_seq (1 + (zext i16 %n to i32)))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65538) S: [1,65538) Exits: (1 + (%m umin_seq (1 + (zext i16 %n to i32)))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_not_zero_wrong_order @@ -1090,9 +1090,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65536 ; CHECK-NEXT: --> (65536 + (zext i16 %m to i32)) U: [65536,131072) S: [65536,131072) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_known_smaller @@ -1129,9 +1129,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65535 ; CHECK-NEXT: --> (65535 + (zext i16 %m to i32)) U: [65535,131071) S: [65535,131071) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_known_smaller_equal @@ -1168,9 +1168,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65534 ; CHECK-NEXT: --> (65534 + (zext i16 %m to i32)) U: [65534,131070) S: [65534,131070) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: ((zext i16 %n to i32) umin_seq (65534 + (zext i16 %m to i32))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: ((zext i16 %n to i32) umin_seq (65534 + (zext i16 %m to i32))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + ((zext i16 %n to i32) umin_seq (65534 + (zext i16 %m to i32)))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + ((zext i16 %n to i32) umin_seq (65534 + (zext i16 %m to i32)))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_not_known_smaller_equal @@ -1207,9 +1207,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65536 ; CHECK-NEXT: --> (65536 + (zext i16 %m to i32)) U: [65536,131072) S: [65536,131072) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_known_greater @@ -1246,9 +1246,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65535 ; CHECK-NEXT: --> (65535 + (zext i16 %m to i32)) U: [65535,131071) S: [65535,131071) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: (zext i16 %n to i32) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + (zext i16 %n to i32)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_known_greater_equal @@ -1285,9 +1285,9 @@ ; CHECK-NEXT: %m.add = add i32 %m.ext, 65534 ; CHECK-NEXT: --> (65534 + (zext i16 %m to i32)) U: [65534,131070) S: [65534,131070) ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: ((zext i16 %n to i32) umin (65534 + (zext i16 %m to i32))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,65536) S: [0,65536) Exits: ((zext i16 %n to i32) umin (65534 + (zext i16 %m to i32))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + ((zext i16 %n to i32) umin (65534 + (zext i16 %m to i32)))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,65537) S: [1,65537) Exits: (1 + ((zext i16 %n to i32) umin (65534 + (zext i16 %m to i32)))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_not_known_greater_equal @@ -1318,9 +1318,9 @@ ; CHECK-LABEL: 'logical_and_zero_arg1' ; CHECK-NEXT: Classifying expressions for: @logical_and_zero_arg1 ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p0 umin_seq %cond_p1) U: full-set S: full-set Exits: false LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_zero_arg1 @@ -1348,9 +1348,9 @@ ; CHECK-LABEL: 'logical_and_zero_arg2' ; CHECK-NEXT: Classifying expressions for: @logical_and_zero_arg2 ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_p0, i1 %cond_p1, i1 false ; CHECK-NEXT: --> (%cond_p1 umin %cond_p0) U: full-set S: full-set Exits: false LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_zero_arg2 diff --git a/llvm/test/Analysis/ScalarEvolution/exit-count-select.ll b/llvm/test/Analysis/ScalarEvolution/exit-count-select.ll --- a/llvm/test/Analysis/ScalarEvolution/exit-count-select.ll +++ b/llvm/test/Analysis/ScalarEvolution/exit-count-select.ll @@ -7,9 +7,9 @@ ; CHECK-LABEL: 'logical_and_m_const' ; CHECK-NEXT: Classifying expressions for: @logical_and_m_const ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %n) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %n) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 %cond_i2, i1 false ; CHECK-NEXT: --> (%cond_i2 umin %cond_i) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_m_const @@ -39,9 +39,9 @@ ; CHECK-LABEL: 'logical_and_nonzero' ; CHECK-NEXT: Classifying expressions for: @logical_and_nonzero ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %m) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %m) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %m)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %m)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 %cond_i2, i1 false ; CHECK-NEXT: --> (%cond_i umin_seq %cond_i2) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_nonzero @@ -72,9 +72,9 @@ ; CHECK-LABEL: 'logical_and_zero' ; CHECK-NEXT: Classifying expressions for: @logical_and_zero ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 %cond_i2, i1 false ; CHECK-NEXT: --> (%cond_i umin_seq %cond_i2) U: full-set S: full-set Exits: false LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_and_zero @@ -136,9 +136,9 @@ ; CHECK-LABEL: 'logical_or_m_const' ; CHECK-NEXT: Classifying expressions for: @logical_or_m_const ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %n) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %n) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 true, i1 %cond_i2 ; CHECK-NEXT: --> (true + ((true + %cond_i) umin (true + %cond_i2))) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_or_m_const @@ -168,9 +168,9 @@ ; CHECK-LABEL: 'logical_or_nonzero' ; CHECK-NEXT: Classifying expressions for: @logical_or_nonzero ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %m) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,3) S: [0,3) Exits: (2 umin %m) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %m)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4) S: [1,4) Exits: (1 + (2 umin %m)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 true, i1 %cond_i2 ; CHECK-NEXT: --> (true + ((true + %cond_i) umin_seq (true + %cond_i2))) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_or_nonzero @@ -201,9 +201,9 @@ ; CHECK-LABEL: 'logical_or_zero' ; CHECK-NEXT: Classifying expressions for: @logical_or_zero ; CHECK-NEXT: %i = phi i32 [ 0, %entry ], [ %i.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %i.next = add i32 %i, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %cond = select i1 %cond_i, i1 true, i1 %cond_i2 ; CHECK-NEXT: --> (true + ((true + %cond_i) umin_seq (true + %cond_i2))) U: full-set S: full-set Exits: true LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @logical_or_zero diff --git a/llvm/test/Analysis/ScalarEvolution/flags-from-poison.ll b/llvm/test/Analysis/ScalarEvolution/flags-from-poison.ll --- a/llvm/test/Analysis/ScalarEvolution/flags-from-poison.ll +++ b/llvm/test/Analysis/ScalarEvolution/flags-from-poison.ll @@ -1130,7 +1130,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> {((4 * (sext i32 (256 * %start) to i64)) + %input),+,1024}<%loop> U: full-set S: full-set Exits: ((4 * (sext i32 (256 * %start) to i64)) + (1024 * (zext i32 (-1 + (-1 * %start) + %numIterations) to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-shl-nsw ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1170,7 +1170,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> ((4 * (sext i32 {(-2147483648 * %start),+,-2147483648}<%loop> to i64)) + %input) U: full-set S: full-set Exits: ((4 * (sext i32 (-2147483648 + (-2147483648 * %numIterations)) to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-shl-nuw-edgecase ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1210,7 +1210,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> {((4 * (sext i32 (-2147483648 * %start) to i64)) + %input),+,-8589934592}<%loop> U: full-set S: full-set Exits: ((4 * (sext i32 (-2147483648 * %start) to i64)) + (-8589934592 * (zext i32 (-1 + (-1 * %start) + %numIterations) to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-shl-nuw-nsw ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1250,7 +1250,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> ((4 * (sext i32 {(-2147483648 * %start),+,-2147483648}<%loop> to i64)) + %input) U: full-set S: full-set Exits: ((4 * (sext i32 (-2147483648 + (-2147483648 * %numIterations)) to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-shl-no-nsw ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1290,7 +1290,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> {((4 * (sext i32 (1073741824 * %start) to i64)) + %input),+,4294967296}<%loop> U: full-set S: full-set Exits: ((4 * (sext i32 (1073741824 * %start) to i64)) + (4294967296 * (zext i32 (-1 + (-1 * %start) + %numIterations) to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-shl-nsw-edgecase ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1369,7 +1369,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> {((4 * (sext i32 %start to i64)) + (-4 * (sext i32 %sub to i64)) + %input),+,4}<%loop> U: full-set S: full-set Exits: ((4 * (zext i32 (-1 + (-1 * %start) + %numIterations) to i64)) + (4 * (sext i32 %start to i64)) + (-4 * (sext i32 %sub to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-sub-no-nsw ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 @@ -1411,7 +1411,7 @@ ; CHECK-NEXT: %ptr = getelementptr inbounds float, ptr %input, i64 %index64 ; CHECK-NEXT: --> {((4 * (sext i32 %start to i64)) + (-4 * (sext i32 %halfsub to i64)) + %input),+,4}<%loop> U: full-set S: full-set Exits: ((4 * (zext i32 (-1 + (-1 * %start) + %numIterations) to i64)) + (4 * (sext i32 %start to i64)) + (-4 * (sext i32 %halfsub to i64)) + %input) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %nexti = add nsw i32 %i, 1 -; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: full-set S: full-set Exits: %numIterations LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,1}<%loop> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: %numIterations LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test-sub-nsw ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + (-1 * %start) + %numIterations) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is -1 diff --git a/llvm/test/Analysis/ScalarEvolution/fold.ll b/llvm/test/Analysis/ScalarEvolution/fold.ll --- a/llvm/test/Analysis/ScalarEvolution/fold.ll +++ b/llvm/test/Analysis/ScalarEvolution/fold.ll @@ -55,27 +55,27 @@ ; CHECK-NEXT: %Y = and i32 %y, 3 ; CHECK-NEXT: --> (zext i2 (trunc i32 %y to i2) to i32) U: [0,4) S: [0,4) ; CHECK-NEXT: %A = phi i32 [ 0, %entry ], [ %I, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %Z1 = select i1 %rand1, i32 %A, i32 %Y -; CHECK-NEXT: --> ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %Z2 = select i1 %rand2, i32 %A, i32 %Z1 -; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %B = trunc i32 %Z2 to i16 -; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i16) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i16) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %C = sext i16 %B to i30 -; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i30) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i30) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %D = sext i16 %B to i32 -; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %E = sext i16 %B to i34 -; CHECK-NEXT: --> (zext i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i34) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> (zext i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i34) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %F = zext i16 %B to i30 -; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i30) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> (trunc i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i30) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %G = zext i16 %B to i32 -; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %H = zext i16 %B to i34 -; CHECK-NEXT: --> (zext i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i34) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> (zext i32 ({0,+,1}<%loop> umax ((zext i2 (trunc i32 %y to i2) to i32) smax {0,+,1}<%loop>)) to i34) U: [0,21) S: [0,21) Exits: 20 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %I = add i32 %A, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,22) S: [1,22) Exits: 21 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,22) S: [1,22) Exits: 21 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test4 ; CHECK-NEXT: Loop %loop: backedge-taken count is 20 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 20 diff --git a/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll --- a/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll +++ b/llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll @@ -17,11 +17,11 @@ ; CHECK-NEXT: %storemerge23 = phi i32 [ 3, %entry ], [ %dec16, %for.inc13.3 ] ; CHECK-NEXT: --> {3,+,-1}<%outer.loop> U: [1,4) S: [1,4) Exits: <> LoopDispositions: { %outer.loop: Computable, %for.cond6: Invariant, %inner.loop: Invariant } ; CHECK-NEXT: %storemerge1921 = phi i32 [ 3, %outer.loop ], [ %dec, %for.end ] -; CHECK-NEXT: --> {3,+,-1}<%for.cond6> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> {3,+,-1}<%for.cond6> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } ; CHECK-NEXT: %idxprom20 = zext i32 %storemerge1921 to i64 -; CHECK-NEXT: --> {3,+,4294967295}<%for.cond6> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> (zext i32 {3,+,-1}<%for.cond6> to i64) U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } ; CHECK-NEXT: %arrayidx7 = getelementptr inbounds [1 x [4 x i16]], ptr @__const.f.g, i64 0, i64 0, i64 %idxprom20 -; CHECK-NEXT: --> {(6 + @__const.f.g),+,8589934590}<%for.cond6> U: [0,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> ((2 * (zext i32 {3,+,-1}<%for.cond6> to i64)) + @__const.f.g) U: [6,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> LoopDispositions: { %for.cond6: Computable, %outer.loop: Variant } ; CHECK-NEXT: %i = load i16, ptr %arrayidx7, align 2 ; CHECK-NEXT: --> %i U: full-set S: full-set Exits: <> LoopDispositions: { %for.cond6: Variant, %outer.loop: Variant } ; CHECK-NEXT: %storemerge1822.lcssa.ph = phi i32 [ 0, %for.cond6 ] @@ -41,11 +41,11 @@ ; CHECK-NEXT: %retval.0 = phi i32 [ %i1, %if.end ], [ 0, %cleanup.loopexit ] ; CHECK-NEXT: --> %retval.0 U: full-set S: full-set ; CHECK-NEXT: %storemerge1921.3 = phi i32 [ 3, %for.end ], [ %dec.3, %for.end.3 ] -; CHECK-NEXT: --> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } ; CHECK-NEXT: %idxprom20.3 = zext i32 %storemerge1921.3 to i64 -; CHECK-NEXT: --> {3,+,4294967295}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> (zext i32 {3,+,-1}<%inner.loop> to i64) U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } ; CHECK-NEXT: %arrayidx7.3 = getelementptr inbounds [1 x [4 x i16]], ptr @__const.f.g, i64 0, i64 0, i64 %idxprom20.3 -; CHECK-NEXT: --> {(6 + @__const.f.g),+,8589934590}<%inner.loop> U: [0,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } +; CHECK-NEXT: --> ((2 * (zext i32 {3,+,-1}<%inner.loop> to i64)) + @__const.f.g) U: [6,-1) S: [-9223372036854775808,9223372036854775807) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } ; CHECK-NEXT: %i7 = load i16, ptr %arrayidx7.3, align 2 ; CHECK-NEXT: --> %i7 U: full-set S: full-set Exits: <> LoopDispositions: { %inner.loop: Variant, %outer.loop: Variant } ; CHECK-NEXT: %i8 = load volatile i32, ptr @b, align 4 @@ -53,7 +53,7 @@ ; CHECK-NEXT: %dec.3 = add nsw i32 %storemerge1921.3, -1 ; CHECK-NEXT: --> {2,+,-1}<%inner.loop> U: [2,3) S: [2,3) Exits: <> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant } ; CHECK-NEXT: %storemerge1921.lcssa25.3 = phi i32 [ %storemerge1921.3, %for.end.3 ] -; CHECK-NEXT: --> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %outer.loop: Variant, %for.cond6: Variant, %inner.loop: Computable } +; CHECK-NEXT: --> {3,+,-1}<%inner.loop> U: [3,4) S: [3,4) Exits: <> LoopDispositions: { %outer.loop: Variant, %for.cond6: Variant, %inner.loop: Computable } ; CHECK-NEXT: %dec16 = add nsw i32 %storemerge23, -1 ; CHECK-NEXT: --> {2,+,-1}<%outer.loop> U: [0,3) S: [0,3) Exits: <> LoopDispositions: { %outer.loop: Computable, %for.cond6: Invariant, %inner.loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @f diff --git a/llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll b/llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll --- a/llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll +++ b/llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll @@ -9,13 +9,13 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -1, i32 1 ; CHECK-NEXT: --> %step U: [1,0) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step -; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i32 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f0 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -49,41 +49,41 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -8, i32 8 ; CHECK-NEXT: --> %step U: [8,-7) S: [-16,16) ; CHECK-NEXT: %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,16) S: [0,16) Exits: 15 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,16) S: [0,16) Exits: 15 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,121) S: [0,121) Exits: ((15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,121) S: [0,121) Exits: ((15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.1 = add i32 %iv, 1 -; CHECK-NEXT: --> {(1 + %start),+,%step}<%loop> U: [1,122) S: [1,122) Exits: (1 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %start),+,%step}<%loop> U: [1,122) S: [1,122) Exits: (1 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.2 = add i32 %iv, 2 -; CHECK-NEXT: --> {(2 + %start),+,%step}<%loop> U: [2,123) S: [2,123) Exits: (2 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(2 + %start),+,%step}<%loop> U: [2,123) S: [2,123) Exits: (2 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.3 = add i32 %iv, 3 -; CHECK-NEXT: --> {(3 + %start),+,%step}<%loop> U: [3,124) S: [3,124) Exits: (3 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(3 + %start),+,%step}<%loop> U: [3,124) S: [3,124) Exits: (3 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.4 = add i32 %iv, 4 -; CHECK-NEXT: --> {(4 + %start),+,%step}<%loop> U: [4,125) S: [4,125) Exits: (4 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(4 + %start),+,%step}<%loop> U: [4,125) S: [4,125) Exits: (4 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.5 = add i32 %iv, 5 -; CHECK-NEXT: --> {(5 + %start),+,%step}<%loop> U: [5,126) S: [5,126) Exits: (5 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(5 + %start),+,%step}<%loop> U: [5,126) S: [5,126) Exits: (5 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.6 = add i32 %iv, 6 -; CHECK-NEXT: --> {(6 + %start),+,%step}<%loop> U: [6,127) S: [6,127) Exits: (6 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(6 + %start),+,%step}<%loop> U: [6,127) S: [6,127) Exits: (6 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.7 = add i32 %iv, 7 -; CHECK-NEXT: --> {(7 + %start),+,%step}<%loop> U: [7,128) S: [7,128) Exits: (7 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(7 + %start),+,%step}<%loop> U: [7,128) S: [7,128) Exits: (7 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m1 = sub i32 %iv, 1 -; CHECK-NEXT: --> {(-1 + %start),+,%step}<%loop> U: [-1,120) S: [-1,120) Exits: (-1 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-1 + %start),+,%step}<%loop> U: [-1,120) S: [-1,120) Exits: (-1 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m2 = sub i32 %iv, 2 -; CHECK-NEXT: --> {(-2 + %start),+,%step}<%loop> U: [0,-1) S: [-2,119) Exits: (-2 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-2 + %start),+,%step}<%loop> U: [0,-1) S: [-2,119) Exits: (-2 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m3 = sub i32 %iv, 3 -; CHECK-NEXT: --> {(-3 + %start),+,%step}<%loop> U: [-3,118) S: [-3,118) Exits: (-3 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-3 + %start),+,%step}<%loop> U: [-3,118) S: [-3,118) Exits: (-3 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m4 = sub i32 %iv, 4 -; CHECK-NEXT: --> {(-4 + %start),+,%step}<%loop> U: [0,-3) S: [-4,117) Exits: (-4 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-4 + %start),+,%step}<%loop> U: [0,-3) S: [-4,117) Exits: (-4 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m5 = sub i32 %iv, 5 -; CHECK-NEXT: --> {(-5 + %start),+,%step}<%loop> U: [-5,116) S: [-5,116) Exits: (-5 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-5 + %start),+,%step}<%loop> U: [-5,116) S: [-5,116) Exits: (-5 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m6 = sub i32 %iv, 6 -; CHECK-NEXT: --> {(-6 + %start),+,%step}<%loop> U: [0,-1) S: [-6,115) Exits: (-6 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-6 + %start),+,%step}<%loop> U: [0,-1) S: [-6,115) Exits: (-6 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.m7 = sub i32 %iv, 7 -; CHECK-NEXT: --> {(-7 + %start),+,%step}<%loop> U: [-7,114) S: [-7,114) Exits: (-7 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(-7 + %start),+,%step}<%loop> U: [-7,114) S: [-7,114) Exits: (-7 + (15 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step -; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [0,-7) S: [-256,361) Exits: ((16 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [0,-7) S: [-256,361) Exits: ((16 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i32 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,17) S: [1,17) Exits: 16 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,17) S: [1,17) Exits: 16 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f1 ; CHECK-NEXT: Loop %loop: backedge-taken count is 15 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 15 @@ -136,15 +136,15 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -1, i32 1 ; CHECK-NEXT: --> %step U: [1,0) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.sext = sext i32 %iv to i64 ; CHECK-NEXT: --> {(zext i32 %start to i64),+,(sext i32 %step to i64)}<%loop> U: [0,128) S: [0,128) Exits: ((zext i32 %start to i64) + (127 * (sext i32 %step to i64))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step ; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i32 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f2 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -179,15 +179,15 @@ ; CHECK-NEXT: %step = select i1 %c, i16 1, i16 509 ; CHECK-NEXT: --> %step U: [1,510) S: [1,510) ; CHECK-NEXT: %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i16 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,-892) S: [0,-892) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,-892) S: [0,-892) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.zext = zext i16 %iv to i64 ; CHECK-NEXT: --> {(zext i16 %start to i64),+,(zext i16 %step to i64)}<%loop> U: [0,64644) S: [0,64644) Exits: ((zext i16 %start to i64) + (127 * (zext i16 %step to i64))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i16 %iv, %step ; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: full-set S: full-set Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i16 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f3 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -229,15 +229,15 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -1, i32 1 ; CHECK-NEXT: --> %step U: [1,0) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.trunc = trunc i32 %iv to i16 ; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: full-set S: full-set Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step -; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i32 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f4 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -278,15 +278,15 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -1, i32 1 ; CHECK-NEXT: --> %step U: [1,0) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.trunc = trunc i32 %iv to i16 ; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step -; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i16 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f5 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -322,17 +322,17 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -2, i32 0 ; CHECK-NEXT: --> %step U: [0,-1) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,(1 + %step)}<%loop> U: [0,128) S: [0,128) Exits: (127 + (127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,(1 + %step)}<%loop> U: [0,128) S: [0,128) Exits: (127 + (127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %step.plus.one = add i32 %step, 1 ; CHECK-NEXT: --> (1 + %step) U: [1,0) S: [-1,3) Exits: (1 + %step) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: %iv.next = add i32 %iv, %step.plus.one -; CHECK-NEXT: --> {(1 + %step + %start),+,(1 + %step)}<%loop> U: [-128,384) S: [-128,384) Exits: (128 + (128 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %step + %start),+,(1 + %step)}<%loop> U: [-128,384) S: [-128,384) Exits: (128 + (128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.sext = sext i32 %iv to i64 ; CHECK-NEXT: --> {(zext i32 %start to i64),+,(1 + (sext i32 %step to i64))}<%loop> U: [0,128) S: [0,128) Exits: (127 + (zext i32 %start to i64) + (127 * (sext i32 %step to i64))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i16 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f6 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 @@ -369,19 +369,19 @@ ; CHECK-NEXT: %step = select i1 %c, i32 -1, i32 1 ; CHECK-NEXT: --> %step U: [1,0) S: [-2,2) ; CHECK-NEXT: %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,128) S: [0,128) Exits: 127 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) Exits: ((127 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.trunc = trunc i32 %iv to i16 ; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) Exits: ((trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, %step -; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-256,256) S: [-256,256) Exits: ((128 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.trunc.plus.one = add i16 %iv.trunc, 1 ; CHECK-NEXT: --> {(1 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [1,129) S: [1,129) Exits: (1 + (trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.trunc.plus.two = add i16 %iv.trunc, 2 ; CHECK-NEXT: --> {(2 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [2,130) S: [2,130) Exits: (2 + (trunc i32 %start to i16) + (127 * (trunc i32 %step to i16))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop.iv.inc = add i16 %loop.iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,129) S: [1,129) Exits: 128 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @f7 ; CHECK-NEXT: Loop %loop: backedge-taken count is 127 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 127 diff --git a/llvm/test/Analysis/ScalarEvolution/limit-depth.ll b/llvm/test/Analysis/ScalarEvolution/limit-depth.ll --- a/llvm/test/Analysis/ScalarEvolution/limit-depth.ll +++ b/llvm/test/Analysis/ScalarEvolution/limit-depth.ll @@ -87,7 +87,7 @@ define void @test_zext(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { ; CHECK-LABEL: @test_zext ; CHECK: %ze2 = zext i64 %iv2.inc to i128 -; CHECK-NEXT: --> {(1 + (zext i64 {7,+,1}<%loop> to i128)),+,1}<%loop2> +; CHECK-NEXT: --> {(1 + (zext i64 {7,+,1}<%loop> to i128)),+,1}<%loop2> entry: br label %loop diff --git a/llvm/test/Analysis/ScalarEvolution/logical-operations.ll b/llvm/test/Analysis/ScalarEvolution/logical-operations.ll --- a/llvm/test/Analysis/ScalarEvolution/logical-operations.ll +++ b/llvm/test/Analysis/ScalarEvolution/logical-operations.ll @@ -422,11 +422,11 @@ ; CHECK-LABEL: 'tautological_select_like_phi' ; CHECK-NEXT: Classifying expressions for: @tautological_select_like_phi ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %latch ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,101) S: [0,101) Exits: 100 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,101) S: [0,101) Exits: 100 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %r = phi ptr [ @constant, %truebb ], [ @another_constant, %falsebb ] ; CHECK-NEXT: --> %r U: [0,-3) S: [-9223372036854775808,9223372036854775805) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,102) S: [1,102) Exits: 101 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,102) S: [1,102) Exits: 101 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @tautological_select_like_phi ; CHECK-NEXT: Loop %loop: backedge-taken count is 100 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 100 diff --git a/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll b/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll --- a/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll +++ b/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info-rewrite-expressions.ll @@ -54,11 +54,11 @@ ; CHECK-NEXT: %n.vec = and i64 %ext, 28 ; CHECK-NEXT: --> (4 * ((zext i32 (16 umin %N) to i64) /u 4)) U: [0,17) S: [0,17) ; CHECK-NEXT: %index = phi i64 [ 0, %loop.ph ], [ %index.next, %loop ] -; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,13) S: [0,13) Exits: (4 * ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,13) S: [0,13) Exits: (4 * ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %gep = getelementptr inbounds i32, ptr %arr, i64 %index ; CHECK-NEXT: --> {%arr,+,16}<%loop> U: full-set S: full-set Exits: ((16 * ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4)) + %arr) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %index.next = add nuw i64 %index, 4 -; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,17) S: [4,17) Exits: (4 + (4 * ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,17) S: [4,17) Exits: (4 + (4 * ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @rewrite_zext_min_max ; CHECK-NEXT: Loop %loop: backedge-taken count is ((-4 + (4 * ((zext i32 (16 umin %N) to i64) /u 4))) /u 4) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -345,9 +345,9 @@ ; CHECK-NEXT: %n.vec = and i64 %n.rnd.up, 8589934588 ; CHECK-NEXT: --> (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4)) U: [4,4294967297) S: [4,4294967297) ; CHECK-NEXT: %iv = phi i64 [ 0, %loop.ph ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 4 -; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,5) S: [4,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,5) S: [4,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @rewrite_zext_with_info_from_icmp_ne ; CHECK-NEXT: Loop %loop: backedge-taken count is 0 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 0 @@ -395,9 +395,9 @@ ; CHECK-NEXT: %n.vec = and i64 %n.rnd.up, 8589934588 ; CHECK-NEXT: --> (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4)) U: [4,4294967297) S: [4,4294967297) ; CHECK-NEXT: %iv = phi i64 [ 0, %loop.ph ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,4294967293) S: [0,4294967293) Exits: (4 * ((-4 + (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4))) /u 4)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,4294967293) S: [0,4294967293) Exits: (4 * ((-4 + (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4))) /u 4)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 4 -; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,4294967297) S: [4,4294967297) Exits: (4 + (4 * ((-4 + (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4))) /u 4))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,4294967297) S: [4,4294967297) Exits: (4 + (4 * ((-4 + (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4))) /u 4))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @rewrite_zext_no_icmp_ne ; CHECK-NEXT: Loop %loop: backedge-taken count is ((-4 + (4 * ((4 + (zext i32 (-1 + (zext i2 (trunc i32 %N to i2) to i32)) to i64)) /u 4))) /u 4) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 1073741823 @@ -525,9 +525,9 @@ ; CHECK-NEXT: %init = phi i64 [ 2, %entry ], [ 4, %bb1 ] ; CHECK-NEXT: --> %init U: [2,5) S: [2,5) ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ %init, %loop.ph ] -; CHECK-NEXT: --> {%init,+,2}<%loop> U: [2,17) S: [2,17) Exits: ((2 * ((14 + (-1 * %init)) /u 2)) + %init) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%init,+,2}<%loop> U: [2,17) S: [2,17) Exits: ((2 * ((14 + (-1 * %init)) /u 2)) + %init) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 2 -; CHECK-NEXT: --> {(2 + %init),+,2}<%loop> U: [4,19) S: [4,19) Exits: (2 + (2 * ((14 + (-1 * %init)) /u 2)) + %init) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(2 + %init),+,2}<%loop> U: [4,19) S: [4,19) Exits: (2 + (2 * ((14 + (-1 * %init)) /u 2)) + %init) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @guard_pessimizes_analysis_step2 ; CHECK-NEXT: Loop %loop: backedge-taken count is ((14 + (-1 * %init)) /u 2) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 6 diff --git a/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll b/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll --- a/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll +++ b/llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll @@ -424,11 +424,11 @@ ; CHECK-LABEL: 'test_guard_ult_ne' ; CHECK-NEXT: Classifying expressions for: @test_guard_ult_ne ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %guardbb ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_ult_ne ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -461,11 +461,11 @@ ; CHECK-LABEL: 'test_guard_ne_ult' ; CHECK-NEXT: Classifying expressions for: @test_guard_ne_ult ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %guardbb ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_ne_ult ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -500,11 +500,11 @@ ; CHECK-NEXT: %cmp.and = and i1 %cmp.ult, %cmp.ne ; CHECK-NEXT: --> (%cmp.ult umin %cmp.ne) U: full-set S: full-set ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_if_and_enter ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -576,11 +576,11 @@ ; CHECK-NEXT: %cmp.and = and i1 %cmp.ult, %cmp.and1 ; CHECK-NEXT: --> (%c umin %cmp.ult umin %cmp.ne) U: full-set S: full-set ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_if_and_and ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -654,11 +654,11 @@ ; CHECK-NEXT: %cmp.or = or i1 %cmp.uge, %cmp.eq ; CHECK-NEXT: --> (%cmp.uge umax %cmp.eq) U: full-set S: full-set ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_if_or_skip ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -730,11 +730,11 @@ ; CHECK-NEXT: %cmp.or = or i1 %cmp.uge, %cmp.or1 ; CHECK-NEXT: --> (%c umax %cmp.uge umax %cmp.eq) U: full-set S: full-set ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_if_or_or ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -809,11 +809,11 @@ ; CHECK-LABEL: 'test_guard_and_assume' ; CHECK-NEXT: Classifying expressions for: @test_guard_and_assume ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_and_assume ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -846,11 +846,11 @@ ; CHECK-NEXT: %cmp.and = and i1 %cmp.ult, %cmp.ne ; CHECK-NEXT: --> (%cmp.ult umin %cmp.ne) U: full-set S: full-set ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, ptr %data, i64 %iv ; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_assume_and ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 3 @@ -887,9 +887,9 @@ ; CHECK-NEXT: %init = phi i32 [ 2, %entry ], [ 3, %bb1 ] ; CHECK-NEXT: --> %init U: [2,4) S: [2,4) ; CHECK-NEXT: %iv = phi i32 [ %iv.next, %loop ], [ %init, %loop.ph ] -; CHECK-NEXT: --> {%init,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%init,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {(1 + %init),+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %init),+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @guard_pessimizes_analysis_step1 ; CHECK-NEXT: Loop %loop: backedge-taken count is (9 + (-1 * %init)) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 7 @@ -1024,9 +1024,9 @@ ; CHECK-NEXT: %shr = lshr i32 %blockSize, 2 ; CHECK-NEXT: --> (%blockSize /u 4) U: [0,1073741824) S: [0,1073741824) ; CHECK-NEXT: %iv = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ] -; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-1073741822,1073741824) S: [-1073741822,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-1073741822,1073741824) S: [-1073741822,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: %dec = add i32 %iv, -1 -; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-1073741823,1073741823) S: [-1073741823,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-1073741823,1073741823) S: [-1073741823,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_uge ; CHECK-NEXT: Loop %while.body: backedge-taken count is (-1 + (%blockSize /u 4)) ; CHECK-NEXT: Loop %while.body: constant max backedge-taken count is 1073741822 @@ -1061,9 +1061,9 @@ ; CHECK-NEXT: %shr = lshr i32 %blockSize, 2 ; CHECK-NEXT: --> (%blockSize /u 4) U: [0,1073741824) S: [0,1073741824) ; CHECK-NEXT: %iv = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ] -; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-1073741822,1073741824) S: [-1073741822,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-1073741822,1073741824) S: [-1073741822,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: %dec = add i32 %iv, -1 -; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-1073741823,1073741823) S: [-1073741823,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-1073741823,1073741823) S: [-1073741823,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_ugt ; CHECK-NEXT: Loop %while.body: backedge-taken count is (-1 + (%blockSize /u 4)) ; CHECK-NEXT: Loop %while.body: constant max backedge-taken count is 1073741822 @@ -1098,9 +1098,9 @@ ; CHECK-NEXT: %shr = lshr i32 %blockSize, 2 ; CHECK-NEXT: --> (%blockSize /u 4) U: [0,1073741824) S: [0,1073741824) ; CHECK-NEXT: %iv = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ] -; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-255,1073741824) S: [-255,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-255,1073741824) S: [-255,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: %dec = add i32 %iv, -1 -; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-256,1073741823) S: [-256,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-256,1073741823) S: [-256,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_uge_and_ule ; CHECK-NEXT: Loop %while.body: backedge-taken count is (-1 + (%blockSize /u 4)) ; CHECK-NEXT: Loop %while.body: constant max backedge-taken count is 255 @@ -1139,9 +1139,9 @@ ; CHECK-NEXT: %shr = lshr i32 %blockSize, 2 ; CHECK-NEXT: --> (%blockSize /u 4) U: [0,1073741824) S: [0,1073741824) ; CHECK-NEXT: %iv = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ] -; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-255,1073741824) S: [-255,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(%blockSize /u 4),+,-1}<%while.body> U: [-255,1073741824) S: [-255,1073741824) Exits: 1 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: %dec = add i32 %iv, -1 -; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-256,1073741823) S: [-256,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } +; CHECK-NEXT: --> {(-1 + (%blockSize /u 4)),+,-1}<%while.body> U: [-256,1073741823) S: [-256,1073741823) Exits: 0 LoopDispositions: { %while.body: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_ugt_and_ult ; CHECK-NEXT: Loop %while.body: backedge-taken count is (-1 + (%blockSize /u 4)) ; CHECK-NEXT: Loop %while.body: constant max backedge-taken count is 255 @@ -1558,9 +1558,9 @@ ; CHECK-LABEL: 'sle_sgt_ult_umax_to_smax' ; CHECK-NEXT: Classifying expressions for: @sle_sgt_ult_umax_to_smax ; CHECK-NEXT: %iv = phi i32 [ 0, %guard.3 ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,25) S: [0,25) Exits: (4 * ((-4 + %num) /u 4)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,4}<%loop> U: [0,25) S: [0,25) Exits: (4 * ((-4 + %num) /u 4)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i32 %iv, 4 -; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,29) S: [4,29) Exits: (4 + (4 * ((-4 + %num) /u 4))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {4,+,4}<%loop> U: [4,29) S: [4,29) Exits: (4 + (4 * ((-4 + %num) /u 4))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @sle_sgt_ult_umax_to_smax ; CHECK-NEXT: Loop %loop: backedge-taken count is ((-4 + %num) /u 4) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 6 diff --git a/llvm/test/Analysis/ScalarEvolution/max-trip-count.ll b/llvm/test/Analysis/ScalarEvolution/max-trip-count.ll --- a/llvm/test/Analysis/ScalarEvolution/max-trip-count.ll +++ b/llvm/test/Analysis/ScalarEvolution/max-trip-count.ll @@ -342,7 +342,7 @@ define void @changing_end_bound3(i32 %start, ptr %n_addr, ptr %addr) { ; CHECK-LABEL: Determining loop execution counts for: @changing_end_bound3 ; CHECK: Loop %loop: Unpredictable backedge-taken count. -; CHECK: Loop %loop: constant max backedge-taken count is 1073741823 +; CHECK: Loop %loop: constant max backedge-taken count is 1073741822 entry: br label %loop diff --git a/llvm/test/Analysis/ScalarEvolution/nsw.ll b/llvm/test/Analysis/ScalarEvolution/nsw.ll --- a/llvm/test/Analysis/ScalarEvolution/nsw.ll +++ b/llvm/test/Analysis/ScalarEvolution/nsw.ll @@ -282,16 +282,16 @@ ; CHECK-NEXT: %sub = add nsw i32 %index, -2 ; CHECK-NEXT: --> {(-2 + %arg),+,1}<%for.body> U: full-set S: full-set Exits: (-3 + (10 smax (1 + %arg))) LoopDispositions: { %for.body: Computable } ; CHECK-NEXT: %idxprom = sext i32 %sub to i64 -; CHECK-NEXT: --> {(-2 + (sext i32 %arg to i64)),+,1}<%for.body> U: [-2147483650,4294967304) S: [-2147483650,4294967304) Exits: (-2 + (zext i32 (-1 + (-1 * %arg) + (10 smax (1 + %arg))) to i64) + (sext i32 %arg to i64)) LoopDispositions: { %for.body: Computable } +; CHECK-NEXT: --> {(-2 + (sext i32 %arg to i64)),+,1}<%for.body> U: [-2147483650,4294967303) S: [-2147483650,4294967303) Exits: (-2 + (zext i32 (-1 + (-1 * %arg) + (10 smax (1 + %arg))) to i64) + (sext i32 %arg to i64)) LoopDispositions: { %for.body: Computable } ; CHECK-NEXT: %arrayidx = getelementptr inbounds [10 x i32], ptr %array, i64 0, i64 %idxprom ; CHECK-NEXT: --> {(-8 + (4 * (sext i32 %arg to i64)) + %array),+,4}<%for.body> U: [0,-3) S: [-9223372036854775808,9223372036854775805) Exits: (-8 + (4 * (zext i32 (-1 + (-1 * %arg) + (10 smax (1 + %arg))) to i64)) + (4 * (sext i32 %arg to i64)) + %array) LoopDispositions: { %for.body: Computable } ; CHECK-NEXT: %data = load i32, ptr %arrayidx, align 4 ; CHECK-NEXT: --> %data U: full-set S: full-set Exits: <> LoopDispositions: { %for.body: Variant } ; CHECK-NEXT: %inc5 = add nsw i32 %index, 1 -; CHECK-NEXT: --> {(1 + %arg),+,1}<%for.body> U: full-set S: full-set Exits: (10 smax (1 + %arg)) LoopDispositions: { %for.body: Computable } +; CHECK-NEXT: --> {(1 + %arg),+,1}<%for.body> U: [-2147483647,-2147483648) S: [-2147483647,-2147483648) Exits: (10 smax (1 + %arg)) LoopDispositions: { %for.body: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test4 ; CHECK-NEXT: Loop %for.body: backedge-taken count is (-1 + (-1 * %arg) + (10 smax (1 + %arg))) -; CHECK-NEXT: Loop %for.body: constant max backedge-taken count is -2147483638 +; CHECK-NEXT: Loop %for.body: constant max backedge-taken count is -2147483639 ; CHECK-NEXT: Loop %for.body: symbolic max backedge-taken count is (-1 + (-1 * %arg) + (10 smax (1 + %arg))) ; CHECK-NEXT: Loop %for.body: Predicated backedge-taken count is (-1 + (-1 * %arg) + (10 smax (1 + %arg))) ; CHECK-NEXT: Predicates: diff --git a/llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll b/llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll --- a/llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll +++ b/llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll @@ -44,7 +44,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) ; SCEV can prove for the above induction variable; but it does ; not bother so before it sees the sext below since it is not a 100% @@ -198,7 +198,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 @@ -229,7 +229,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 @@ -260,7 +260,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 diff --git a/llvm/test/Analysis/ScalarEvolution/range-signedness.ll b/llvm/test/Analysis/ScalarEvolution/range-signedness.ll --- a/llvm/test/Analysis/ScalarEvolution/range-signedness.ll +++ b/llvm/test/Analysis/ScalarEvolution/range-signedness.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py ; RUN: opt -disable-output "-passes=print" < %s 2>&1 | FileCheck %s define void @x(ptr %cond) { @@ -5,17 +6,15 @@ entry: br label %loop - loop: + loop: %idx = phi i8 [ 0, %entry ], [ %idx.inc, %loop ] -; CHECK: %idx = phi i8 [ 0, %entry ], [ %idx.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,-128) S: [0,-128) %idx.inc = add nsw i8 %idx, 1 %c = load volatile i1, ptr %cond br i1 %c, label %loop, label %exit - exit: + exit: ret void } @@ -24,16 +23,14 @@ entry: br label %loop - loop: + loop: %idx = phi i8 [-5, %entry ], [ %idx.inc, %loop ] -; CHECK: %idx = phi i8 [ -5, %entry ], [ %idx.inc, %loop ] -; CHECK-NEXT: --> {-5,+,1}<%loop> U: [-5,6) S: [-5,6) %idx.inc = add i8 %idx, 1 %continue = icmp slt i8 %idx.inc, 6 br i1 %continue, label %loop, label %exit - exit: + exit: ret void } diff --git a/llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll b/llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll --- a/llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll +++ b/llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll @@ -13,7 +13,7 @@ bb1: ; preds = %bb1, %bb1.thread %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; [#uses=3] ; CHECK: %i.0.reg2mem.0 -; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 +; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 %0 = trunc i64 %i.0.reg2mem.0 to i8 ; [#uses=1] ; CHECK: %0 ; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 diff --git a/llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll b/llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll --- a/llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll +++ b/llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll @@ -3,7 +3,7 @@ ; CHECK: %tmp3 = sext i8 %tmp2 to i32 ; CHECK: --> (sext i8 {0,+,1}<%bb1> to i32){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: -1 ; CHECK: %tmp4 = mul i32 %tmp3, %i.02 -; CHECK: --> ((sext i8 {0,+,1}<%bb1> to i32) * {0,+,1}<%bb>){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: {0,+,-1}<%bb> +; CHECK: --> ((sext i8 {0,+,1}<%bb1> to i32) * {0,+,1}<%bb>){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: {0,+,-1}<%bb> ; These sexts are not foldable. diff --git a/llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll b/llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll --- a/llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll +++ b/llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll @@ -11,9 +11,9 @@ ; CHECK-NEXT: %iv = phi i32 [ %start, %entry ], [ %iv.dec, %loop ] ; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,101) S: [0,101) Exits: ((99 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.tc = phi i32 [ 0, %entry ], [ %iv.tc.inc, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,100) S: [0,100) Exits: 99 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,100) S: [0,100) Exits: 99 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.tc.inc = add i32 %iv.tc, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,101) S: [1,101) Exits: 100 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,101) S: [1,101) Exits: 100 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.dec = add nsw i32 %iv, %step ; CHECK-NEXT: --> {(%step + %start),+,%step}<%loop> U: [-200,201) S: [-200,201) Exits: ((100 * %step) + %start) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.sext = sext i32 %iv to i64 diff --git a/llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll b/llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll --- a/llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll +++ b/llvm/test/Analysis/ScalarEvolution/shift-recurrences.ll @@ -198,11 +198,11 @@ ; CHECK-LABEL: 'test_shl2' ; CHECK-NEXT: Classifying expressions for: @test_shl2 ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [4,65) S: [4,65) Exits: 64 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, 1 ; CHECK-NEXT: --> (2 * %iv.shl) U: [8,129) S: [8,129) Exits: 128 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_shl2 @@ -233,11 +233,11 @@ ; CHECK-NEXT: %shiftamt = select i1 %c, i64 1, i64 0 ; CHECK-NEXT: --> %shiftamt U: [0,2) S: [0,2) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [4,65) S: [4,65) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, %shiftamt ; CHECK-NEXT: --> %iv.shl.next U: [0,-3) S: [-9223372036854775808,9223372036854775805) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_shl3 @@ -267,11 +267,11 @@ ; CHECK-LABEL: 'test_shl4' ; CHECK-NEXT: Classifying expressions for: @test_shl4 ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,61) S: [0,61) Exits: 60 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,61) S: [0,61) Exits: 60 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [4,4611686018427387905) S: [4,4611686018427387905) Exits: 4611686018427387904 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,62) S: [1,62) Exits: 61 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,62) S: [1,62) Exits: 61 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, 1 ; CHECK-NEXT: --> (2 * %iv.shl) U: [8,-9223372036854775807) S: [-9223372036854775808,9223372036854775801) Exits: -9223372036854775808 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_shl4 @@ -300,11 +300,11 @@ ; CHECK-LABEL: 'test_shl5' ; CHECK-NEXT: Classifying expressions for: @test_shl5 ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,62) S: [0,62) Exits: 61 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,62) S: [0,62) Exits: 61 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [0,-3) S: [-9223372036854775808,9223372036854775801) Exits: -9223372036854775808 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,63) S: [1,63) Exits: 62 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,63) S: [1,63) Exits: 62 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, 1 ; CHECK-NEXT: --> (2 * %iv.shl) U: [0,-7) S: [-9223372036854775808,9223372036854775801) Exits: 0 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_shl5 @@ -333,11 +333,11 @@ ; CHECK-LABEL: 'test_shl6' ; CHECK-NEXT: Classifying expressions for: @test_shl6 ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [4,65) S: [4,65) Exits: 16 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %shiftamt = and i64 %iv, 1 ; CHECK-NEXT: --> (zext i1 {false,+,true}<%loop> to i64) U: [0,2) S: [0,2) Exits: 0 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, %shiftamt @@ -369,11 +369,11 @@ ; CHECK-LABEL: 'test_shl7' ; CHECK-NEXT: Classifying expressions for: @test_shl7 ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl = phi i64 [ 4, %entry ], [ %iv.shl.next, %loop ] ; CHECK-NEXT: --> %iv.shl U: [0,-3) S: [-9223372036854775808,9223372036854775805) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.shl.next = shl i64 %iv.shl, %shiftamt ; CHECK-NEXT: --> %iv.shl.next U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_shl7 @@ -516,11 +516,11 @@ ; CHECK-LABEL: 'test_ashr_tc_positive' ; CHECK-NEXT: Classifying expressions for: @test_ashr_tc_positive ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr = phi i64 [ 1023, %entry ], [ %iv.ashr.next, %loop ] ; CHECK-NEXT: --> %iv.ashr U: [63,1024) S: [63,1024) Exits: 63 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr.next = ashr i64 %iv.ashr, 1 ; CHECK-NEXT: --> %iv.ashr.next U: [0,512) S: [0,512) Exits: 31 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_ashr_tc_positive @@ -548,11 +548,11 @@ ; CHECK-LABEL: 'test_ashr_tc_negative' ; CHECK-NEXT: Classifying expressions for: @test_ashr_tc_negative ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr = phi i8 [ -128, %entry ], [ %iv.ashr.next, %loop ] ; CHECK-NEXT: --> %iv.ashr U: [-128,-7) S: [-128,-7) Exits: -8 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr.next = ashr i8 %iv.ashr, 1 ; CHECK-NEXT: --> %iv.ashr.next U: [-64,0) S: [-64,0) Exits: -4 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_ashr_tc_negative @@ -582,11 +582,11 @@ ; CHECK-NEXT: %start = sext i1 %a to i8 ; CHECK-NEXT: --> (sext i1 %a to i8) U: [-1,1) S: [-1,1) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,61) S: [0,61) Exits: 60 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,61) S: [0,61) Exits: 60 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr = phi i8 [ %start, %entry ], [ %iv.ashr.next, %loop ] ; CHECK-NEXT: --> %iv.ashr U: [-16,16) S: [-16,16) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,62) S: [1,62) Exits: 61 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,62) S: [1,62) Exits: 61 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr.next = ashr i8 %iv.ashr, 1 ; CHECK-NEXT: --> %iv.ashr.next U: [-16,16) S: [-16,16) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_ashr_tc_either @@ -615,11 +615,11 @@ ; CHECK-LABEL: 'test_ashr_zero_shift' ; CHECK-NEXT: Classifying expressions for: @test_ashr_zero_shift ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr = phi i64 [ 1023, %entry ], [ %iv.ashr.next, %loop ] ; CHECK-NEXT: --> %iv.ashr U: [1023,1024) S: [1023,1024) Exits: 1023 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.ashr.next = ashr i64 %iv.ashr, 0 ; CHECK-NEXT: --> %iv.ashr U: [1023,1024) S: [1023,1024) Exits: 1023 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_ashr_zero_shift @@ -647,11 +647,11 @@ ; CHECK-LABEL: 'test_lshr_tc_positive' ; CHECK-NEXT: Classifying expressions for: @test_lshr_tc_positive ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i64 [ 1023, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [63,1024) S: [63,1024) Exits: 63 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i64 %iv.lshr, 1 ; CHECK-NEXT: --> (%iv.lshr /u 2) U: [31,512) S: [31,512) Exits: 31 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_tc_positive @@ -679,11 +679,11 @@ ; CHECK-LABEL: 'test_lshr_tc_negative' ; CHECK-NEXT: Classifying expressions for: @test_lshr_tc_negative ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i8 [ -1, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [15,0) S: [-1,-128) Exits: 15 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i8 %iv.lshr, 1 ; CHECK-NEXT: --> (%iv.lshr /u 2) U: [7,-128) S: [7,-128) Exits: 7 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_tc_negative @@ -713,11 +713,11 @@ ; CHECK-NEXT: %start = sext i1 %a to i8 ; CHECK-NEXT: --> (sext i1 %a to i8) U: [-1,1) S: [-1,1) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i8 [ %start, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [-1,-128) S: [-1,-128) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i8 %iv.lshr, 1 ; CHECK-NEXT: --> (%iv.lshr /u 2) U: [0,-128) S: [0,-128) Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_tc_either @@ -746,11 +746,11 @@ ; CHECK-LABEL: 'test_lshr_zero_shift' ; CHECK-NEXT: Classifying expressions for: @test_lshr_zero_shift ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i64 [ 1023, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [1023,1024) S: [1023,1024) Exits: 1023 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i64 %iv.lshr, 0 ; CHECK-NEXT: --> %iv.lshr U: [1023,1024) S: [1023,1024) Exits: 1023 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_zero_shift @@ -779,11 +779,11 @@ ; CHECK-LABEL: 'test_lshr_power_of_2_start' ; CHECK-NEXT: Classifying expressions for: @test_lshr_power_of_2_start ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i64 [ 1024, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [4,1025) S: [4,1025) Exits: 4 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i64 %iv.lshr, 2 ; CHECK-NEXT: --> (%iv.lshr /u 4) U: [1,257) S: [1,257) Exits: 1 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_power_of_2_start @@ -812,11 +812,11 @@ ; CHECK-LABEL: 'test_lshr_arbitrary_start' ; CHECK-NEXT: Classifying expressions for: @test_lshr_arbitrary_start ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i64 [ 957, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [3,958) S: [3,958) Exits: 3 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i64 %iv.lshr, 2 ; CHECK-NEXT: --> (%iv.lshr /u 4) U: [0,240) S: [0,240) Exits: 0 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_arbitrary_start @@ -844,11 +844,11 @@ ; CHECK-LABEL: 'test_lshr_start_power_of_2_plus_one' ; CHECK-NEXT: Classifying expressions for: @test_lshr_start_power_of_2_plus_one ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,5) S: [0,5) Exits: 4 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr = phi i64 [ 1025, %entry ], [ %iv.lshr.next, %loop ] ; CHECK-NEXT: --> %iv.lshr U: [4,1026) S: [4,1026) Exits: 4 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,6) S: [1,6) Exits: 5 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.lshr.next = lshr i64 %iv.lshr, 2 ; CHECK-NEXT: --> (%iv.lshr /u 4) U: [1,257) S: [1,257) Exits: 1 LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_lshr_start_power_of_2_plus_one diff --git a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll --- a/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll +++ b/llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll @@ -11,13 +11,13 @@ ; CHECK-LABEL: 'f0' ; CHECK-NEXT: Classifying expressions for: @f0 ; CHECK-NEXT: %v1 = phi i16 [ 0, %b0 ], [ %v2, %b1 ] -; CHECK-NEXT: --> {0,+,-1}<%b1> U: [-255,1) S: [-255,1) Exits: -255 LoopDispositions: { %b1: Computable } +; CHECK-NEXT: --> {0,+,-1}<%b1> U: [-255,1) S: [-255,1) Exits: -255 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v2 = add i16 %v1, -1 -; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) Exits: -256 LoopDispositions: { %b1: Computable } +; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) Exits: -256 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v3 = mul i16 %v2, %v2 ; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set Exits: 0 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v5 = phi i16 [ %v2, %b1 ] -; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255) +; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255) ; CHECK-NEXT: %v6 = phi i16 [ %v3, %b1 ] ; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set --> 0 U: [0,1) S: [0,1) ; CHECK-NEXT: %v7 = sext i16 %v5 to i32 diff --git a/llvm/test/Analysis/ScalarEvolution/symbolic_max_exit_count.ll b/llvm/test/Analysis/ScalarEvolution/symbolic_max_exit_count.ll --- a/llvm/test/Analysis/ScalarEvolution/symbolic_max_exit_count.ll +++ b/llvm/test/Analysis/ScalarEvolution/symbolic_max_exit_count.ll @@ -230,9 +230,9 @@ ; CHECK-LABEL: 'test_mixup_constant_symbolic' ; CHECK-NEXT: Classifying expressions for: @test_mixup_constant_symbolic ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1001) S: [0,1001) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1001) S: [0,1001) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,1002) S: [1,1002) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,1002) S: [1,1002) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop_cond = call i1 @cond() ; CHECK-NEXT: --> %loop_cond U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_mixup_constant_symbolic @@ -278,11 +278,11 @@ ; CHECK-LABEL: 'test_mixup_constant_symbolic_merged' ; CHECK-NEXT: Classifying expressions for: @test_mixup_constant_symbolic_merged ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1001) S: [0,1001) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,1001) S: [0,1001) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %and = and i1 %zero_check, %range_check ; CHECK-NEXT: --> (%range_check umin %zero_check) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,1002) S: [1,1002) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,1002) S: [1,1002) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %loop_cond = call i1 @cond() ; CHECK-NEXT: --> %loop_cond U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @test_mixup_constant_symbolic_merged diff --git a/llvm/test/Analysis/ScalarEvolution/trip-count15.ll b/llvm/test/Analysis/ScalarEvolution/trip-count15.ll --- a/llvm/test/Analysis/ScalarEvolution/trip-count15.ll +++ b/llvm/test/Analysis/ScalarEvolution/trip-count15.ll @@ -7,9 +7,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 umin %n) U: [0,4097) S: [0,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @umin_unsigned_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n)) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 4097 @@ -38,9 +38,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 umin %n) U: [0,4097) S: [0,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @umin_signed_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n)) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 4097 @@ -69,9 +69,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 smin %n) U: [-9223372036854775808,4097) S: [-9223372036854775808,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (0 smax (1 + (4096 smin %n))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (0 smax (1 + (4096 smin %n))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (1 + (0 smax (1 + (4096 smin %n)))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (1 + (0 smax (1 + (4096 smin %n)))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @smin_signed_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (0 smax (1 + (4096 smin %n))) ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 4097 diff --git a/llvm/test/Analysis/ScalarEvolution/trivial-phis.ll b/llvm/test/Analysis/ScalarEvolution/trivial-phis.ll --- a/llvm/test/Analysis/ScalarEvolution/trivial-phis.ll +++ b/llvm/test/Analysis/ScalarEvolution/trivial-phis.ll @@ -117,21 +117,21 @@ ; CHECK-LABEL: @test3 ; CHECK: %tmp14 = phi i64 [ %tmp40, %bb39 ], [ 1, %bb8 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } ; CHECK: %tmp18 = phi i64 [ %tmp20, %bb17 ], [ 0, %bb13 ] ; CHECK-NEXT: --> {0,+,1}<%bb17_a> U: [0,9223372036854775807) S: [0,9223372036854775807) ; CHECK-SAME: Exits: (-1 + %arg) LoopDispositions: { %bb17_a: Computable, %bb13: Variant, %bb8: Variant } ; CHECK: %tmp24 = phi i64 [ %tmp14, %bb13 ], [ %tmp14, %bb17 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } ; CHECK: %tmp28 = phi i64 [ %tmp34, %bb27 ], [ 0, %bb23 ] ; CHECK-NEXT: --> {0,+,1}<%bb27> U: [0,9223372036854775807) S: [0,9223372036854775807) ; CHECK-SAME: Exits: (-1 + %arg) LoopDispositions: { %bb27: Computable, %bb13: Variant, %bb8: Variant } ; CHECK: %tmp38 = phi i64 [ %tmp24, %bb23 ], [ %tmp24, %bb27 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } define void @test3(i64 %arg, ptr %arg1) { diff --git a/llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll b/llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll --- a/llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll +++ b/llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll @@ -9,9 +9,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %and = and i1 %cmp1, %cmp2 ; CHECK-NEXT: --> (%cmp1 umin %cmp2) U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @umin_sext_x_zext_x @@ -45,9 +45,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @ule_sext_x_zext_x @@ -117,9 +117,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umin = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @ult_sext_x_zext_x @@ -189,9 +189,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sle_sext_x_zext_x @@ -225,9 +225,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sge_sext_x_zext_x @@ -297,9 +297,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umax = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sgt_sext_x_zext_x diff --git a/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll b/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll --- a/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll +++ b/llvm/test/Analysis/ScalarEvolution/unknown_phis.ll @@ -43,9 +43,9 @@ ; CHECK-NEXT: %p2 = phi i32 [ %len_b, %entry ], [ %p1, %loop ] ; CHECK-NEXT: --> %p2 U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,100) S: [0,100) Exits: 99 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,100) S: [0,100) Exits: 99 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,101) S: [1,101) Exits: 100 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,101) S: [1,101) Exits: 100 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @merge_values_with_ranges_looped ; CHECK-NEXT: Loop %loop: backedge-taken count is 99 ; CHECK-NEXT: Loop %loop: constant max backedge-taken count is 99 diff --git a/llvm/test/Analysis/ScalarEvolution/widenable-condition.ll b/llvm/test/Analysis/ScalarEvolution/widenable-condition.ll --- a/llvm/test/Analysis/ScalarEvolution/widenable-condition.ll +++ b/llvm/test/Analysis/ScalarEvolution/widenable-condition.ll @@ -14,9 +14,9 @@ ; CHECK-LABEL: 'wc_max' ; CHECK-NEXT: Classifying expressions for: @wc_max ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,2000) S: [0,2000) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,2000) S: [0,2000) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2001) S: [1,2001) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2001) S: [1,2001) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %widenable_cond3 = call i1 @llvm.experimental.widenable.condition() ; CHECK-NEXT: --> %widenable_cond3 U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %exiplicit_guard_cond4 = and i1 %cond_1, %widenable_cond3 diff --git a/llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll b/llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll --- a/llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll +++ b/llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll @@ -173,54 +173,59 @@ ; GFX1010: ; %bb.0: ; %.entry ; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1010-NEXT: s_waitcnt_vscnt null, 0x0 -; GFX1010-NEXT: v_mov_b32_e32 v1, 0 +; GFX1010-NEXT: s_mov_b32 s4, 0 ; GFX1010-NEXT: s_branch .LBB2_2 ; GFX1010-NEXT: .LBB2_1: ; %bb9 ; GFX1010-NEXT: ; in Loop: Header=BB2_2 Depth=1 -; GFX1010-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0xfffffbe6, v1 -; GFX1010-NEXT: s_or_b32 s4, s4, vcc_lo -; GFX1010-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4 -; GFX1010-NEXT: v_add_nc_u32_e32 v1, v1, v0 +; GFX1010-NEXT: s_cmpk_gt_i32 s4, 0xfbe6 +; GFX1010-NEXT: s_cselect_b32 s6, -1, 0 +; GFX1010-NEXT: s_add_i32 s4, s4, 1 +; GFX1010-NEXT: s_and_b32 vcc_lo, exec_lo, s6 ; GFX1010-NEXT: s_cbranch_vccz .LBB2_4 ; GFX1010-NEXT: .LBB2_2: ; %.a ; GFX1010-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX1010-NEXT: ; implicit-def: $sgpr4 +; GFX1010-NEXT: ; implicit-def: $sgpr5 ; GFX1010-NEXT: s_cbranch_scc1 .LBB2_1 ; GFX1010-NEXT: ; %bb.3: ; %bb ; GFX1010-NEXT: ; in Loop: Header=BB2_2 Depth=1 -; GFX1010-NEXT: buffer_load_dword v0, v1, s[4:7], 64 offen glc +; GFX1010-NEXT: v_mov_b32_e32 v0, s4 +; GFX1010-NEXT: buffer_load_dword v0, v0, s[4:7], 64 offen glc ; GFX1010-NEXT: s_waitcnt vmcnt(0) -; GFX1010-NEXT: v_cmp_eq_u32_e64 s4, 0, v0 +; GFX1010-NEXT: v_cmp_eq_u32_e64 s5, 0, v0 ; GFX1010-NEXT: s_branch .LBB2_1 ; GFX1010-NEXT: .LBB2_4: ; %.exit +; GFX1010-NEXT: s_or_b32 s4, s5, s6 +; GFX1010-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4 ; GFX1010-NEXT: s_setpc_b64 s[30:31] ; ; GFX1100-LABEL: combine_add_zext_or: ; GFX1100: ; %bb.0: ; %.entry ; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 -; GFX1100-NEXT: v_mov_b32_e32 v1, 0 +; GFX1100-NEXT: s_mov_b32 s0, 0 ; GFX1100-NEXT: s_branch .LBB2_2 ; GFX1100-NEXT: .LBB2_1: ; %bb9 ; GFX1100-NEXT: ; in Loop: Header=BB2_2 Depth=1 -; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX1100-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0xfffffbe6, v1 -; GFX1100-NEXT: s_or_b32 s0, s0, vcc_lo -; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX1100-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0 -; GFX1100-NEXT: v_add_nc_u32_e32 v1, v1, v0 +; GFX1100-NEXT: s_cmpk_gt_i32 s0, 0xfbe6 +; GFX1100-NEXT: s_cselect_b32 s2, -1, 0 +; GFX1100-NEXT: s_add_i32 s0, s0, 1 +; GFX1100-NEXT: s_and_b32 vcc_lo, exec_lo, s2 ; GFX1100-NEXT: s_cbranch_vccz .LBB2_4 ; GFX1100-NEXT: .LBB2_2: ; %.a ; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX1100-NEXT: ; implicit-def: $sgpr0 +; GFX1100-NEXT: ; implicit-def: $sgpr1 ; GFX1100-NEXT: s_cbranch_scc1 .LBB2_1 ; GFX1100-NEXT: ; %bb.3: ; %bb ; GFX1100-NEXT: ; in Loop: Header=BB2_2 Depth=1 -; GFX1100-NEXT: buffer_load_b32 v0, v1, s[0:3], 64 offen glc +; GFX1100-NEXT: v_mov_b32_e32 v0, s0 +; GFX1100-NEXT: buffer_load_b32 v0, v0, s[0:3], 64 offen glc ; GFX1100-NEXT: s_waitcnt vmcnt(0) -; GFX1100-NEXT: v_cmp_eq_u32_e64 s0, 0, v0 +; GFX1100-NEXT: v_cmp_eq_u32_e64 s1, 0, v0 ; GFX1100-NEXT: s_branch .LBB2_1 ; GFX1100-NEXT: .LBB2_4: ; %.exit +; GFX1100-NEXT: s_or_b32 s0, s1, s2 +; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1100-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0 ; GFX1100-NEXT: s_setpc_b64 s[30:31] .entry: br label %.a @@ -254,54 +259,59 @@ ; GFX1010: ; %bb.0: ; %.entry ; GFX1010-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1010-NEXT: s_waitcnt_vscnt null, 0x0 -; GFX1010-NEXT: v_mov_b32_e32 v1, 0 +; GFX1010-NEXT: s_mov_b32 s4, 0 ; GFX1010-NEXT: s_branch .LBB3_2 ; GFX1010-NEXT: .LBB3_1: ; %bb9 ; GFX1010-NEXT: ; in Loop: Header=BB3_2 Depth=1 -; GFX1010-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0xfffffbe6, v1 -; GFX1010-NEXT: s_or_b32 s4, s4, vcc_lo -; GFX1010-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4 -; GFX1010-NEXT: v_sub_nc_u32_e32 v1, v1, v0 +; GFX1010-NEXT: s_cmpk_gt_i32 s4, 0xfbe6 +; GFX1010-NEXT: s_cselect_b32 s6, -1, 0 +; GFX1010-NEXT: s_add_i32 s4, s4, -1 +; GFX1010-NEXT: s_and_b32 vcc_lo, exec_lo, s6 ; GFX1010-NEXT: s_cbranch_vccz .LBB3_4 ; GFX1010-NEXT: .LBB3_2: ; %.a ; GFX1010-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX1010-NEXT: ; implicit-def: $sgpr4 +; GFX1010-NEXT: ; implicit-def: $sgpr5 ; GFX1010-NEXT: s_cbranch_scc1 .LBB3_1 ; GFX1010-NEXT: ; %bb.3: ; %bb ; GFX1010-NEXT: ; in Loop: Header=BB3_2 Depth=1 -; GFX1010-NEXT: buffer_load_dword v0, v1, s[4:7], 64 offen glc +; GFX1010-NEXT: v_mov_b32_e32 v0, s4 +; GFX1010-NEXT: buffer_load_dword v0, v0, s[4:7], 64 offen glc ; GFX1010-NEXT: s_waitcnt vmcnt(0) -; GFX1010-NEXT: v_cmp_eq_u32_e64 s4, 0, v0 +; GFX1010-NEXT: v_cmp_eq_u32_e64 s5, 0, v0 ; GFX1010-NEXT: s_branch .LBB3_1 ; GFX1010-NEXT: .LBB3_4: ; %.exit +; GFX1010-NEXT: s_or_b32 s4, s5, s6 +; GFX1010-NEXT: v_cndmask_b32_e64 v0, 0, 1, s4 ; GFX1010-NEXT: s_setpc_b64 s[30:31] ; ; GFX1100-LABEL: combine_sub_zext_or: ; GFX1100: ; %bb.0: ; %.entry ; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 -; GFX1100-NEXT: v_mov_b32_e32 v1, 0 +; GFX1100-NEXT: s_mov_b32 s0, 0 ; GFX1100-NEXT: s_branch .LBB3_2 ; GFX1100-NEXT: .LBB3_1: ; %bb9 ; GFX1100-NEXT: ; in Loop: Header=BB3_2 Depth=1 -; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) -; GFX1100-NEXT: v_cmp_lt_i32_e32 vcc_lo, 0xfffffbe6, v1 -; GFX1100-NEXT: s_or_b32 s0, s0, vcc_lo -; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) -; GFX1100-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0 -; GFX1100-NEXT: v_sub_nc_u32_e32 v1, v1, v0 +; GFX1100-NEXT: s_cmpk_gt_i32 s0, 0xfbe6 +; GFX1100-NEXT: s_cselect_b32 s2, -1, 0 +; GFX1100-NEXT: s_add_i32 s0, s0, -1 +; GFX1100-NEXT: s_and_b32 vcc_lo, exec_lo, s2 ; GFX1100-NEXT: s_cbranch_vccz .LBB3_4 ; GFX1100-NEXT: .LBB3_2: ; %.a ; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1 -; GFX1100-NEXT: ; implicit-def: $sgpr0 +; GFX1100-NEXT: ; implicit-def: $sgpr1 ; GFX1100-NEXT: s_cbranch_scc1 .LBB3_1 ; GFX1100-NEXT: ; %bb.3: ; %bb ; GFX1100-NEXT: ; in Loop: Header=BB3_2 Depth=1 -; GFX1100-NEXT: buffer_load_b32 v0, v1, s[0:3], 64 offen glc +; GFX1100-NEXT: v_mov_b32_e32 v0, s0 +; GFX1100-NEXT: buffer_load_b32 v0, v0, s[0:3], 64 offen glc ; GFX1100-NEXT: s_waitcnt vmcnt(0) -; GFX1100-NEXT: v_cmp_eq_u32_e64 s0, 0, v0 +; GFX1100-NEXT: v_cmp_eq_u32_e64 s1, 0, v0 ; GFX1100-NEXT: s_branch .LBB3_1 ; GFX1100-NEXT: .LBB3_4: ; %.exit +; GFX1100-NEXT: s_or_b32 s0, s1, s2 +; GFX1100-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1100-NEXT: v_cndmask_b32_e64 v0, 0, 1, s0 ; GFX1100-NEXT: s_setpc_b64 s[30:31] .entry: br label %.a @@ -496,5 +506,3 @@ attributes #0 = { nounwind readonly willreturn } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; COMMON: {{.*}} diff --git a/llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll b/llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll --- a/llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll +++ b/llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll @@ -1,115 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s -define arm_aapcs_vfpcc i16 @reduce_v16i16_shift_mul(<16 x i8> %s0, <16 x i8> %s1) { -; CHECK-LABEL: reduce_v16i16_shift_mul: -; CHECK: @ %bb.0: @ %entry -; CHECK-NEXT: vmullt.u8 q2, q0, q1 -; CHECK-NEXT: vmullb.u8 q0, q0, q1 -; CHECK-NEXT: vshr.s16 q2, q2, #14 -; CHECK-NEXT: vshr.s16 q0, q0, #14 -; CHECK-NEXT: vaddv.u16 r0, q2 -; CHECK-NEXT: vaddva.u16 r0, q0 -; CHECK-NEXT: bx lr -entry: - %s0s = zext <16 x i8> %s0 to <16 x i16> - %s1s = zext <16 x i8> %s1 to <16 x i16> - %m = mul <16 x i16> %s0s, %s1s - %sh = ashr <16 x i16> %m, - %result = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %sh) - ret i16 %result -} - -define arm_aapcs_vfpcc i16 @reduce_v8i16_shift_mul(<8 x i8> %s0, <8 x i8> %s1) { -; CHECK-LABEL: reduce_v8i16_shift_mul: -; CHECK: @ %bb.0: @ %entry -; CHECK-NEXT: vmullb.u8 q0, q0, q1 -; CHECK-NEXT: vshr.s16 q0, q0, #14 -; CHECK-NEXT: vaddv.u16 r0, q0 -; CHECK-NEXT: bx lr -entry: - %s0s = zext <8 x i8> %s0 to <8 x i16> - %s1s = zext <8 x i8> %s1 to <8 x i16> - %m = mul <8 x i16> %s0s, %s1s - %sh = ashr <8 x i16> %m, - %result = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %sh) - ret i16 %result -} - -define arm_aapcs_vfpcc i16 @reduce_v16i16_shift_sub(<16 x i8> %s0, <16 x i8> %s1) { -; CHECK-LABEL: reduce_v16i16_shift_sub: -; CHECK: @ %bb.0: @ %entry -; CHECK-NEXT: vmovlt.u8 q2, q1 -; CHECK-NEXT: vmovlt.u8 q3, q0 -; CHECK-NEXT: vsub.i16 q2, q3, q2 -; CHECK-NEXT: vmovlb.u8 q1, q1 -; CHECK-NEXT: vmovlb.u8 q0, q0 -; CHECK-NEXT: vshr.s16 q2, q2, #14 -; CHECK-NEXT: vsub.i16 q0, q0, q1 -; CHECK-NEXT: vaddv.u16 r0, q2 -; CHECK-NEXT: vshr.s16 q0, q0, #14 -; CHECK-NEXT: vaddva.u16 r0, q0 -; CHECK-NEXT: bx lr -entry: - %s0s = zext <16 x i8> %s0 to <16 x i16> - %s1s = zext <16 x i8> %s1 to <16 x i16> - %m = sub <16 x i16> %s0s, %s1s - %sh = ashr <16 x i16> %m, - %result = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %sh) - ret i16 %result -} - -define arm_aapcs_vfpcc i32 @mlapred_v4i32_v4i64_zext(<8 x i16> %x, <8 x i16> %y, <8 x i16> %a, <8 x i16> %b) { -; CHECK-LABEL: mlapred_v4i32_v4i64_zext: -; CHECK: @ %bb.0: @ %entry -; CHECK-NEXT: .save {r4, r5, r7, lr} -; CHECK-NEXT: push {r4, r5, r7, lr} -; CHECK-NEXT: .vsave {d8, d9, d10, d11} -; CHECK-NEXT: vpush {d8, d9, d10, d11} -; CHECK-NEXT: .pad #16 -; CHECK-NEXT: sub sp, #16 -; CHECK-NEXT: vorr q2, q2, q3 -; CHECK-NEXT: mov r0, sp -; CHECK-NEXT: vstrw.32 q2, [r0] -; CHECK-NEXT: vmov.i8 q3, #0xff -; CHECK-NEXT: vldrh.u32 q2, [r0, #8] -; CHECK-NEXT: vldrh.u32 q5, [r0] -; CHECK-NEXT: vcmp.i32 eq, q2, zr -; CHECK-NEXT: vmov.i8 q2, #0x0 -; CHECK-NEXT: vpsel q4, q3, q2 -; CHECK-NEXT: vcmp.i32 eq, q5, zr -; CHECK-NEXT: vpsel q2, q3, q2 -; CHECK-NEXT: vmov r2, r3, d8 -; CHECK-NEXT: vmov r4, r5, d4 -; CHECK-NEXT: vmov r0, r1, d5 -; CHECK-NEXT: vmov.16 q2[0], r4 -; CHECK-NEXT: vmov.16 q2[1], r5 -; CHECK-NEXT: vmov r12, lr, d9 -; CHECK-NEXT: vmov.16 q2[2], r0 -; CHECK-NEXT: vmov.16 q2[3], r1 -; CHECK-NEXT: vmov.16 q2[4], r2 -; CHECK-NEXT: vmov.16 q2[5], r3 -; CHECK-NEXT: vmov.16 q2[6], r12 -; CHECK-NEXT: vmov.16 q2[7], lr -; CHECK-NEXT: vpt.i16 ne, q2, zr -; CHECK-NEXT: vmlavt.u16 r0, q0, q1 -; CHECK-NEXT: add sp, #16 -; CHECK-NEXT: vpop {d8, d9, d10, d11} -; CHECK-NEXT: pop {r4, r5, r7, pc} -entry: - %aa = zext <8 x i16> %a to <8 x i32> - %bb = zext <8 x i16> %b to <8 x i32> - %c1 = icmp eq <8 x i32> %aa, zeroinitializer - %c2 = icmp eq <8 x i32> %bb, zeroinitializer - %c = and <8 x i1> %c1, %c2 - %xx = zext <8 x i16> %x to <8 x i32> - %yy = zext <8 x i16> %y to <8 x i32> - %m = mul <8 x i32> %xx, %yy - %s = select <8 x i1> %c, <8 x i32> %m, <8 x i32> zeroinitializer - %z = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %s) - ret i32 %z -} - define void @correlate(ptr nocapture noundef readonly %ID, ptr nocapture noundef writeonly %ACD, i16 noundef signext %DS, i16 noundef signext %Ls, i16 noundef signext %S) { ; CHECK-LABEL: correlate: ; CHECK: @ %bb.0: @ %entry @@ -119,58 +10,59 @@ ; CHECK-NEXT: sub sp, #12 ; CHECK-NEXT: cmp r3, #1 ; CHECK-NEXT: strd r0, r1, [sp, #4] @ 8-byte Folded Spill -; CHECK-NEXT: blt .LBB4_12 +; CHECK-NEXT: blt .LBB0_12 ; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph ; CHECK-NEXT: ldr r7, [sp, #48] ; CHECK-NEXT: mov r0, r3 -; CHECK-NEXT: ldr.w r10, [sp, #4] @ 4-byte Reload +; CHECK-NEXT: ldr.w r9, [sp, #4] @ 4-byte Reload ; CHECK-NEXT: adds r3, r2, #3 ; CHECK-NEXT: mov.w r11, #0 -; CHECK-NEXT: mov r9, r2 +; CHECK-NEXT: mov r10, r2 ; CHECK-NEXT: uxth.w r12, r7 -; CHECK-NEXT: adr r7, .LCPI4_0 +; CHECK-NEXT: adr r7, .LCPI0_0 ; CHECK-NEXT: vldrw.u32 q0, [r7] ; CHECK-NEXT: str r2, [sp] @ 4-byte Spill -; CHECK-NEXT: b .LBB4_4 -; CHECK-NEXT: .LBB4_2: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: b .LBB0_4 +; CHECK-NEXT: .LBB0_2: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: movs r6, #0 -; CHECK-NEXT: .LBB4_3: @ %for.end -; CHECK-NEXT: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: .LBB0_3: @ %for.end +; CHECK-NEXT: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: ldr r7, [sp, #8] @ 4-byte Reload ; CHECK-NEXT: lsrs r1, r6, #16 ; CHECK-NEXT: subs r3, #1 -; CHECK-NEXT: add.w r10, r10, #2 -; CHECK-NEXT: sub.w r9, r9, #1 +; CHECK-NEXT: add.w r9, r9, #2 +; CHECK-NEXT: sub.w r10, r10, #1 ; CHECK-NEXT: strh.w r1, [r7, r11, lsl #1] ; CHECK-NEXT: add.w r11, r11, #1 ; CHECK-NEXT: cmp r11, r0 -; CHECK-NEXT: beq .LBB4_12 -; CHECK-NEXT: .LBB4_4: @ %for.body +; CHECK-NEXT: beq .LBB0_12 +; CHECK-NEXT: .LBB0_4: @ %for.body ; CHECK-NEXT: @ =>This Loop Header: Depth=1 -; CHECK-NEXT: @ Child Loop BB4_8 Depth 2 -; CHECK-NEXT: @ Child Loop BB4_11 Depth 2 +; CHECK-NEXT: @ Child Loop BB0_8 Depth 2 +; CHECK-NEXT: @ Child Loop BB0_11 Depth 2 ; CHECK-NEXT: cmp r2, r11 -; CHECK-NEXT: ble .LBB4_2 +; CHECK-NEXT: ble .LBB0_2 ; CHECK-NEXT: @ %bb.5: @ %vector.main.loop.iter.check -; CHECK-NEXT: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: sub.w r8, r2, r11 ; CHECK-NEXT: cmp.w r8, #8 -; CHECK-NEXT: bhs .LBB4_7 -; CHECK-NEXT: @ %bb.6: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: bhs .LBB0_7 +; CHECK-NEXT: @ %bb.6: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: movs r6, #0 ; CHECK-NEXT: movs r7, #0 -; CHECK-NEXT: b .LBB4_10 -; CHECK-NEXT: .LBB4_7: @ %vector.ph -; CHECK-NEXT: @ in Loop: Header=BB4_4 Depth=1 -; CHECK-NEXT: bic r7, r8, #7 +; CHECK-NEXT: b .LBB0_10 +; CHECK-NEXT: .LBB0_7: @ %vector.ph +; CHECK-NEXT: @ in Loop: Header=BB0_4 Depth=1 +; CHECK-NEXT: bic r7, r10, #7 ; CHECK-NEXT: movs r1, #1 -; CHECK-NEXT: sub.w r6, r7, #8 -; CHECK-NEXT: mov r5, r10 -; CHECK-NEXT: add.w lr, r1, r6, lsr #3 +; CHECK-NEXT: subs r7, #8 ; CHECK-NEXT: movs r6, #0 +; CHECK-NEXT: mov r5, r9 +; CHECK-NEXT: add.w lr, r1, r7, lsr #3 +; CHECK-NEXT: bic r7, r8, #7 ; CHECK-NEXT: ldr r4, [sp, #4] @ 4-byte Reload -; CHECK-NEXT: .LBB4_8: @ %vector.body -; CHECK-NEXT: @ Parent Loop BB4_4 Depth=1 +; CHECK-NEXT: .LBB0_8: @ %vector.body +; CHECK-NEXT: @ Parent Loop BB0_4 Depth=1 ; CHECK-NEXT: @ => This Inner Loop Header: Depth=2 ; CHECK-NEXT: vldrh.u16 q1, [r4], #16 ; CHECK-NEXT: vldrh.u16 q2, [r5], #16 @@ -181,13 +73,13 @@ ; CHECK-NEXT: vshl.s32 q1, r1 ; CHECK-NEXT: vaddva.u32 r6, q3 ; CHECK-NEXT: vaddva.u32 r6, q1 -; CHECK-NEXT: le lr, .LBB4_8 +; CHECK-NEXT: le lr, .LBB0_8 ; CHECK-NEXT: @ %bb.9: @ %middle.block -; CHECK-NEXT: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: cmp r8, r7 -; CHECK-NEXT: beq .LBB4_3 -; CHECK-NEXT: .LBB4_10: @ %vec.epilog.ph -; CHECK-NEXT: @ in Loop: Header=BB4_4 Depth=1 +; CHECK-NEXT: beq .LBB0_3 +; CHECK-NEXT: .LBB0_10: @ %vec.epilog.ph +; CHECK-NEXT: @ in Loop: Header=BB0_4 Depth=1 ; CHECK-NEXT: ldr r1, [sp, #4] @ 4-byte Reload ; CHECK-NEXT: add.w r5, r7, r11 ; CHECK-NEXT: bic lr, r3, #3 @@ -200,8 +92,8 @@ ; CHECK-NEXT: add.w lr, r0, r1, lsr #2 ; CHECK-NEXT: mov r0, r2 ; CHECK-NEXT: ldr r2, [sp] @ 4-byte Reload -; CHECK-NEXT: .LBB4_11: @ %vec.epilog.vector.body -; CHECK-NEXT: @ Parent Loop BB4_4 Depth=1 +; CHECK-NEXT: .LBB0_11: @ %vec.epilog.vector.body +; CHECK-NEXT: @ Parent Loop BB0_4 Depth=1 ; CHECK-NEXT: @ => This Inner Loop Header: Depth=2 ; CHECK-NEXT: vqadd.u32 q1, q0, r7 ; CHECK-NEXT: vdup.32 q2, r8 @@ -214,14 +106,14 @@ ; CHECK-NEXT: vshl.s32 q1, r1 ; CHECK-NEXT: vpst ; CHECK-NEXT: vaddvat.u32 r6, q1 -; CHECK-NEXT: le lr, .LBB4_11 -; CHECK-NEXT: b .LBB4_3 -; CHECK-NEXT: .LBB4_12: @ %for.end17 +; CHECK-NEXT: le lr, .LBB0_11 +; CHECK-NEXT: b .LBB0_3 +; CHECK-NEXT: .LBB0_12: @ %for.end17 ; CHECK-NEXT: add sp, #12 ; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc} ; CHECK-NEXT: .p2align 4 ; CHECK-NEXT: @ %bb.13: -; CHECK-NEXT: .LCPI4_0: +; CHECK-NEXT: .LCPI0_0: ; CHECK-NEXT: .long 0 @ 0x0 ; CHECK-NEXT: .long 1 @ 0x1 ; CHECK-NEXT: .long 2 @ 0x2 diff --git a/llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll b/llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll --- a/llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/lsr-rewrite-to-add-one.ll @@ -8,7 +8,7 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: br label [[LOOP_HEADER:%.*]] ; CHECK: loop.header: -; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] +; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP_LATCH]], label [[LOOP_THEN:%.*]] ; CHECK: loop.then: ; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[SRC:%.*]], align 4 @@ -16,11 +16,12 @@ ; CHECK-NEXT: br label [[LOOP_LATCH]] ; CHECK: loop.latch: ; CHECK-NEXT: [[P:%.*]] = phi i1 [ [[C_2]], [[LOOP_THEN]] ], [ false, [[LOOP_HEADER]] ] -; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[IV]], -1050 +; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[LSR_IV]], -1050 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[P]], [[T]] ; CHECK-NEXT: [[ZEXT_OR:%.*]] = zext i1 [[OR]] to i32 -; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], [[ZEXT_OR]] -; CHECK-NEXT: [[LOOP_HEADER_TERMCOND:%.*]] = icmp sgt i32 [[IV]], -1050 +; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw i32 [[LSR_IV]], 1 +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LSR_IV_NEXT]], -1 +; CHECK-NEXT: [[LOOP_HEADER_TERMCOND:%.*]] = icmp sgt i32 [[TMP0]], -1050 ; CHECK-NEXT: br i1 [[LOOP_HEADER_TERMCOND]], label [[LOOP_HEADER]], label [[EXIT:%.*]] ; CHECK: exit: ; CHECK-NEXT: [[ZEXT_OR_LCSSA:%.*]] = phi i32 [ [[ZEXT_OR]], [[LOOP_LATCH]] ] diff --git a/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll b/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll --- a/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll +++ b/llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll @@ -649,18 +649,61 @@ define void @test8(i32 %k) { ; CHECK-LABEL: @test8( ; CHECK-NEXT: for.body.lr.ph: +; CHECK-NEXT: br label [[FOR_BODY_PEEL_BEGIN:%.*]] +; CHECK: for.body.peel.begin: +; CHECK-NEXT: br label [[FOR_BODY_PEEL:%.*]] +; CHECK: for.body.peel: +; CHECK-NEXT: [[CMP1_PEEL:%.*]] = icmp slt i32 0, 3 +; CHECK-NEXT: br i1 [[CMP1_PEEL]], label [[IF_THEN_PEEL:%.*]], label [[FOR_INC_PEEL:%.*]] +; CHECK: if.then.peel: +; CHECK-NEXT: call void @f1() +; CHECK-NEXT: br label [[FOR_INC_PEEL]] +; CHECK: for.inc.peel: +; CHECK-NEXT: [[INC_PEEL:%.*]] = add i32 0, 1 +; CHECK-NEXT: [[CMP_PEEL:%.*]] = icmp slt i32 [[INC_PEEL]], [[K:%.*]] +; CHECK-NEXT: br i1 [[CMP_PEEL]], label [[FOR_BODY_PEEL_NEXT:%.*]], label [[FOR_END:%.*]] +; CHECK: for.body.peel.next: +; CHECK-NEXT: br label [[FOR_BODY_PEEL2:%.*]] +; CHECK: for.body.peel2: +; CHECK-NEXT: [[CMP1_PEEL3:%.*]] = icmp slt i32 [[INC_PEEL]], 3 +; CHECK-NEXT: br i1 [[CMP1_PEEL3]], label [[IF_THEN_PEEL4:%.*]], label [[FOR_INC_PEEL5:%.*]] +; CHECK: if.then.peel4: +; CHECK-NEXT: call void @f1() +; CHECK-NEXT: br label [[FOR_INC_PEEL5]] +; CHECK: for.inc.peel5: +; CHECK-NEXT: [[INC_PEEL6:%.*]] = add i32 [[INC_PEEL]], 1 +; CHECK-NEXT: [[CMP_PEEL7:%.*]] = icmp slt i32 [[INC_PEEL6]], [[K]] +; CHECK-NEXT: br i1 [[CMP_PEEL7]], label [[FOR_BODY_PEEL_NEXT1:%.*]], label [[FOR_END]] +; CHECK: for.body.peel.next1: +; CHECK-NEXT: br label [[FOR_BODY_PEEL9:%.*]] +; CHECK: for.body.peel9: +; CHECK-NEXT: [[CMP1_PEEL10:%.*]] = icmp slt i32 [[INC_PEEL6]], 3 +; CHECK-NEXT: br i1 [[CMP1_PEEL10]], label [[IF_THEN_PEEL11:%.*]], label [[FOR_INC_PEEL12:%.*]] +; CHECK: if.then.peel11: +; CHECK-NEXT: call void @f1() +; CHECK-NEXT: br label [[FOR_INC_PEEL12]] +; CHECK: for.inc.peel12: +; CHECK-NEXT: [[INC_PEEL13:%.*]] = add i32 [[INC_PEEL6]], 1 +; CHECK-NEXT: [[CMP_PEEL14:%.*]] = icmp slt i32 [[INC_PEEL13]], [[K]] +; CHECK-NEXT: br i1 [[CMP_PEEL14]], label [[FOR_BODY_PEEL_NEXT8:%.*]], label [[FOR_END]] +; CHECK: for.body.peel.next8: +; CHECK-NEXT: br label [[FOR_BODY_PEEL_NEXT15:%.*]] +; CHECK: for.body.peel.next15: +; CHECK-NEXT: br label [[FOR_BODY_LR_PH_PEEL_NEWPH:%.*]] +; CHECK: for.body.lr.ph.peel.newph: ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: -; CHECK-NEXT: [[I_05:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH:%.*]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ] -; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I_05]], 3 -; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]] +; CHECK-NEXT: [[I_05:%.*]] = phi i32 [ [[INC_PEEL13]], [[FOR_BODY_LR_PH_PEEL_NEWPH]] ], [ [[INC:%.*]], [[FOR_INC:%.*]] ] +; CHECK-NEXT: br i1 false, label [[IF_THEN:%.*]], label [[FOR_INC]] ; CHECK: if.then: ; CHECK-NEXT: call void @f1() ; CHECK-NEXT: br label [[FOR_INC]] ; CHECK: for.inc: -; CHECK-NEXT: [[INC]] = add i32 [[I_05]], 1 -; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K:%.*]] -; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]] +; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_05]], 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[INC]], [[K]] +; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP8:![0-9]+]] +; CHECK: for.end.loopexit: +; CHECK-NEXT: br label [[FOR_END]] ; CHECK: for.end: ; CHECK-NEXT: ret void ; @@ -728,7 +771,7 @@ ; CHECK-NEXT: call void @sink() ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[LEN]] -; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop !8 +; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] ; entry: %cmp5 = icmp sgt i32 %len, 0 @@ -795,7 +838,7 @@ ; CHECK-NEXT: call void @sink() ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[LEN]] -; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop !10 +; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] ; entry: %cmp5 = icmp sgt i32 %len, 0 @@ -864,7 +907,7 @@ ; CHECK-NEXT: call void @sink() ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[LEN]] -; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop !11 +; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] ; entry: %cmp5 = icmp sgt i32 %len, 0 @@ -933,7 +976,7 @@ ; CHECK-NEXT: call void @sink() ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_06]], 1 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[LEN]] -; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop !12 +; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT_LOOPEXIT:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] ; entry: %cmp5 = icmp sgt i32 %len, 0 @@ -1157,7 +1200,7 @@ ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: invoke void @f1() -; CHECK-NEXT: to label [[LOOP]] unwind label [[EH_UNW_LOOPEXIT_LOOPEXIT:%.*]], !llvm.loop [[LOOP13:![0-9]+]] +; CHECK-NEXT: to label [[LOOP]] unwind label [[EH_UNW_LOOPEXIT_LOOPEXIT:%.*]], !llvm.loop [[LOOP14:![0-9]+]] ; CHECK: eh.Unw.loopexit.loopexit: ; CHECK-NEXT: [[LPAD_LOOPEXIT2:%.*]] = landingpad { ptr, i32 } ; CHECK-NEXT: catch ptr null @@ -1209,7 +1252,7 @@ ; CHECK-NEXT: [[CONTROL:%.*]] = load volatile i32, ptr [[P]], align 4 ; CHECK-NEXT: switch i32 [[CONTROL]], label [[EXIT_LOOPEXIT:%.*]] [ ; CHECK-NEXT: i32 2, label [[LOOP]] -; CHECK-NEXT: ], !llvm.loop [[LOOP14:![0-9]+]] +; CHECK-NEXT: ], !llvm.loop [[LOOP15:![0-9]+]] ; CHECK: exit.loopexit: ; CHECK-NEXT: br label [[EXIT]] ; CHECK: exit: diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll --- a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-allocsize-not-equal-typesize.ll @@ -29,42 +29,31 @@ ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[TMP1]] ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[TMP2]] ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i64, ptr [[SRC]], i64 [[TMP3]] -; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP4]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> poison, i32 [[TMP8]], i32 0 -; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i32> [[TMP10]], i32 [[TMP9]], i32 1 -; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP6]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP7]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i32> poison, i32 [[TMP12]], i32 0 -; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[TMP13]], i32 1 -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 1 -; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i64 1 -; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i64 1 -; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i64 1 -; CHECK-NEXT: [[TMP20:%.*]] = load i24, ptr [[TMP16]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP21:%.*]] = load i24, ptr [[TMP17]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP22:%.*]] = insertelement <2 x i24> poison, i24 [[TMP20]], i32 0 -; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x i24> [[TMP22]], i24 [[TMP21]], i32 1 -; CHECK-NEXT: [[TMP24:%.*]] = load i24, ptr [[TMP18]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP25:%.*]] = load i24, ptr [[TMP19]], align 4, !alias.scope !0 -; CHECK-NEXT: [[TMP26:%.*]] = insertelement <2 x i24> poison, i24 [[TMP24]], i32 0 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <2 x i24> [[TMP26]], i24 [[TMP25]], i32 1 -; CHECK-NEXT: [[TMP28:%.*]] = zext <2 x i24> [[TMP23]] to <2 x i32> -; CHECK-NEXT: [[TMP29:%.*]] = zext <2 x i24> [[TMP27]] to <2 x i32> -; CHECK-NEXT: [[TMP30:%.*]] = add <2 x i32> [[TMP11]], [[TMP28]] -; CHECK-NEXT: [[TMP31:%.*]] = add <2 x i32> [[TMP15]], [[TMP29]] -; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[TMP0]] -; CHECK-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[TMP2]] -; CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i32 0 -; CHECK-NEXT: store <2 x i32> [[TMP30]], ptr [[TMP34]], align 4, !alias.scope !3, !noalias !0 -; CHECK-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i32 2 -; CHECK-NEXT: store <2 x i32> [[TMP31]], ptr [[TMP35]], align 4, !alias.scope !3, !noalias !0 +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 0 +; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP8]], align 4 +; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 1 +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i64 1 +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i64 1 +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i64 1 +; CHECK-NEXT: [[TMP13:%.*]] = load i24, ptr [[TMP9]], align 4, !alias.scope !0 +; CHECK-NEXT: [[TMP14:%.*]] = load i24, ptr [[TMP10]], align 4, !alias.scope !0 +; CHECK-NEXT: [[TMP15:%.*]] = load i24, ptr [[TMP11]], align 4, !alias.scope !0 +; CHECK-NEXT: [[TMP16:%.*]] = load i24, ptr [[TMP12]], align 4, !alias.scope !0 +; CHECK-NEXT: [[TMP17:%.*]] = insertelement <4 x i24> poison, i24 [[TMP13]], i32 0 +; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i24> [[TMP17]], i24 [[TMP14]], i32 1 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i24> [[TMP18]], i24 [[TMP15]], i32 2 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i24> [[TMP19]], i24 [[TMP16]], i32 3 +; CHECK-NEXT: [[TMP21:%.*]] = zext <4 x i24> [[TMP20]] to <4 x i32> +; CHECK-NEXT: [[TMP22:%.*]] = add <4 x i32> [[STRIDED_VEC]], [[TMP21]] +; CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[TMP0]] +; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 0 +; CHECK-NEXT: store <4 x i32> [[TMP22]], ptr [[TMP24]], align 4, !alias.scope !3, !noalias !0 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 -; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000 -; CHECK-NEXT: br i1 [[TMP36]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] +; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], 10000 +; CHECK-NEXT: br i1 [[TMP25]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: middle.block: -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 10001, 10000 -; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]] +; CHECK-NEXT: br label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 10000, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ] ; CHECK-NEXT: br label [[LOOP:%.*]] @@ -80,7 +69,7 @@ ; CHECK-NEXT: store i32 [[SUM]], ptr [[GEP_DST]], align 4 ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 10000 -; CHECK-NEXT: br i1 [[CMP]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]] +; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP8:![0-9]+]] ; CHECK: exit: ; CHECK-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll b/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll --- a/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll @@ -101,7 +101,7 @@ ; CHECK-NEXT: [[VAL_PHI:%.*]] = phi i32 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ] ; CHECK-NEXT: [[ACCUM_NEXT]] = add i32 [[ACCUM]], [[VAL_PHI]] ; CHECK-NEXT: [[EXIT:%.*]] = icmp ugt i64 [[IV]], 4094 -; CHECK-NEXT: br i1 [[EXIT]], label [[LOOP_EXIT]], label [[LOOP]], !llvm.loop [[LOOP2:![0-9]+]] +; CHECK-NEXT: br i1 [[EXIT]], label [[LOOP_EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]] ; CHECK: loop_exit: ; CHECK-NEXT: [[ACCUM_NEXT_LCSSA:%.*]] = phi i32 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP25]], [[MIDDLE_BLOCK]] ] ; CHECK-NEXT: ret i32 [[ACCUM_NEXT_LCSSA]] diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll --- a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll @@ -125,8 +125,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[TMP49]], ptr [[TMP50]], i32 1, <8 x i1> [[TMP0]]) ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP52]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -145,12 +145,12 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_MASK:%.*]] = shufflevector <8 x i1> [[TMP0]], <8 x i1> poison, <16 x i32> ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[INTERLEAVED_MASK]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP4]], i32 1, <8 x i1> [[TMP0]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP3]], i32 1, <8 x i1> [[TMP0]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1016 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP6]], label [[FOR_BODY:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1016 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[FOR_BODY:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.body: ; ENABLED_MASKED_STRIDED-NEXT: [[IX_09:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC:%.*]] ], [ 1016, [[VECTOR_BODY]] ] ; ENABLED_MASKED_STRIDED-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[IX_09]], [[CONV]] @@ -158,14 +158,14 @@ ; ENABLED_MASKED_STRIDED: if.then: ; ENABLED_MASKED_STRIDED-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[IX_09]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[MUL]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[IX_09]] -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP7]], ptr [[ARRAYIDX3]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP5]], ptr [[ARRAYIDX3]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[FOR_INC]] ; ENABLED_MASKED_STRIDED: for.inc: ; ENABLED_MASKED_STRIDED-NEXT: [[INC]] = add nuw nsw i32 [[IX_09]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -298,8 +298,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[TMP49]], ptr [[TMP50]], i32 1, <8 x i1> [[TMP0]]) ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP52]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -316,15 +316,15 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl i32 [[INDEX]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 [[TMP1]] ; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_MASK:%.*]] = shufflevector <8 x i1> [[TMP0]], <8 x i1> poison, <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], -; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[TMP4]], <16 x i8> poison) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], +; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[TMP3]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP5]], i32 1, <8 x i1> [[TMP0]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP4]], i32 1, <8 x i1> [[TMP0]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP5]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -487,8 +487,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[TMP51]], ptr [[TMP52]], i32 1, <8 x i1> [[TMP3]]) ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP54]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP53]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -515,15 +515,15 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 [[TMP2]] ; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = select <8 x i1> [[TMP0]], <8 x i1> [[TMP1]], <8 x i1> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_MASK:%.*]] = shufflevector <8 x i1> [[TMP4]], <8 x i1> poison, <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], -; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP3]], i32 1, <16 x i1> [[TMP6]], <16 x i8> poison) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], +; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP3]], i32 1, <16 x i1> [[TMP5]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP7]], i32 1, <8 x i1> [[TMP4]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP6]], i32 1, <8 x i1> [[TMP4]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP9]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -691,8 +691,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[TMP51]], ptr [[TMP52]], i32 1, <8 x i1> [[TMP3]]) ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP54]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP53]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -719,15 +719,15 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 [[TMP2]] ; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = select <8 x i1> [[TMP0]], <8 x i1> [[TMP1]], <8 x i1> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_MASK:%.*]] = shufflevector <8 x i1> [[TMP4]], <8 x i1> poison, <24 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = and <24 x i1> [[INTERLEAVED_MASK]], -; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <24 x i8> @llvm.masked.load.v24i8.p0(ptr [[TMP3]], i32 1, <24 x i1> [[TMP6]], <24 x i8> poison) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = and <24 x i1> [[INTERLEAVED_MASK]], +; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <24 x i8> @llvm.masked.load.v24i8.p0(ptr [[TMP3]], i32 1, <24 x i1> [[TMP5]], <24 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <24 x i8> [[WIDE_MASKED_VEC]], <24 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP7]], i32 1, <8 x i1> [[TMP4]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP6]], i32 1, <8 x i1> [[TMP4]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP9]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -829,8 +829,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: store <8 x i8> [[TMP32]], ptr [[TMP33]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP35]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP34]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -843,11 +843,11 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP0]] ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP1]], i32 1, <16 x i1> , <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: store <8 x i8> [[STRIDED_VEC]], ptr [[TMP3]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: store <8 x i8> [[STRIDED_VEC]], ptr [[TMP2]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP5]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP3]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -991,8 +991,8 @@ ; DISABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[TMP49]], ptr [[TMP50]], i32 1, <8 x i1> [[TMP0]]) ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP52]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -1016,14 +1016,14 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw i32 [[INDEX]], 1 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP1]] ; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_MASK:%.*]] = shufflevector <8 x i1> [[TMP0]], <8 x i1> poison, <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], -; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[TMP4]], <16 x i8> poison) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = and <16 x i1> [[INTERLEAVED_MASK]], +; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[TMP3]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[INDEX]] -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP5]], i32 1, <8 x i1> [[TMP0]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[INDEX]] +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v8i8.p0(<8 x i8> [[STRIDED_VEC]], ptr [[TMP4]], i32 1, <8 x i1> [[TMP0]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP5]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -1399,7 +1399,7 @@ ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], ; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; @@ -1419,17 +1419,17 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[INTERLEAVED_MASK]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i32 [[TMP1]], 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC1]]) -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = sub <8 x i8> zeroinitializer, [[TMP5]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP7]], i32 [[TMP4]] -; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP8]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC1]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = sub <8 x i8> zeroinitializer, [[TMP4]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP6]], i32 [[TMP3]] +; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <16 x i32> +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP7]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -1488,712 +1488,650 @@ ; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2_reverse( ; DISABLED_MASKED_STRIDED-NEXT: entry: ; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; DISABLED_MASKED_STRIDED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 2048 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[Q]], i32 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ugt ptr [[TMP0]], [[SCEVGEP]] -; DISABLED_MASKED_STRIDED-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[Q]], i32 2049 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[Q]], i32 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = icmp ugt ptr [[TMP2]], [[SCEVGEP2]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i1 [[TMP1]], [[TMP3]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] -; DISABLED_MASKED_STRIDED: vector.ph: ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; DISABLED_MASKED_STRIDED: vector.body: -; DISABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE65:%.*]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE65]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE60:%.*]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE60]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], +; DISABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.load.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP8]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = insertelement <8 x i8> poison, i8 [[TMP10]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP3]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.load.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_LOAD_IF]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if6: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP14]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP15]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = insertelement <8 x i8> [[TMP12]], i8 [[TMP16]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE7]] -; DISABLED_MASKED_STRIDED: pred.load.continue7: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = phi <8 x i8> [ [[TMP12]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF6]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP19]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if8: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP20]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = load i8, ptr [[TMP21]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = insertelement <8 x i8> [[TMP18]], i8 [[TMP22]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE9]] -; DISABLED_MASKED_STRIDED: pred.load.continue9: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = phi <8 x i8> [ [[TMP18]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP23]], [[PRED_LOAD_IF8]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP25]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if10: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP26]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = load i8, ptr [[TMP27]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP24]], i8 [[TMP28]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE11]] -; DISABLED_MASKED_STRIDED: pred.load.continue11: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = phi <8 x i8> [ [[TMP24]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP29]], [[PRED_LOAD_IF10]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP31]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if12: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP32]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP34]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE13]] -; DISABLED_MASKED_STRIDED: pred.load.continue13: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = phi <8 x i8> [ [[TMP30]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP35]], [[PRED_LOAD_IF12]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP37]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if14: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP38]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = load i8, ptr [[TMP39]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = insertelement <8 x i8> [[TMP36]], i8 [[TMP40]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE15]] -; DISABLED_MASKED_STRIDED: pred.load.continue15: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = phi <8 x i8> [ [[TMP36]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP41]], [[PRED_LOAD_IF14]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP43]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if16: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP44]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = load i8, ptr [[TMP45]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = insertelement <8 x i8> [[TMP42]], i8 [[TMP46]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE17]] -; DISABLED_MASKED_STRIDED: pred.load.continue17: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = phi <8 x i8> [ [[TMP42]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP47]], [[PRED_LOAD_IF16]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP49]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if18: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP50]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = load i8, ptr [[TMP51]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = insertelement <8 x i8> [[TMP48]], i8 [[TMP52]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE19]] -; DISABLED_MASKED_STRIDED: pred.load.continue19: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = phi <8 x i8> [ [[TMP48]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP53]], [[PRED_LOAD_IF18]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = or <8 x i32> [[TMP6]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP56]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if20: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP57]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = load i8, ptr [[TMP58]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = insertelement <8 x i8> poison, i8 [[TMP59]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE21]] -; DISABLED_MASKED_STRIDED: pred.load.continue21: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP60]], [[PRED_LOAD_IF20]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP62]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if22: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP63]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = load i8, ptr [[TMP64]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = insertelement <8 x i8> [[TMP61]], i8 [[TMP65]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE23]] -; DISABLED_MASKED_STRIDED: pred.load.continue23: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = phi <8 x i8> [ [[TMP61]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP66]], [[PRED_LOAD_IF22]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP68]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if24: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP69]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = load i8, ptr [[TMP70]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = insertelement <8 x i8> [[TMP67]], i8 [[TMP71]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE25]] -; DISABLED_MASKED_STRIDED: pred.load.continue25: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = phi <8 x i8> [ [[TMP67]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP72]], [[PRED_LOAD_IF24]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP74]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if26: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP75]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = load i8, ptr [[TMP76]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = insertelement <8 x i8> [[TMP73]], i8 [[TMP77]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE27]] -; DISABLED_MASKED_STRIDED: pred.load.continue27: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = phi <8 x i8> [ [[TMP73]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP78]], [[PRED_LOAD_IF26]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP80]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if28: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP81]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = load i8, ptr [[TMP82]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = insertelement <8 x i8> [[TMP79]], i8 [[TMP83]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE29]] -; DISABLED_MASKED_STRIDED: pred.load.continue29: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = phi <8 x i8> [ [[TMP79]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP84]], [[PRED_LOAD_IF28]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP86]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if30: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP87]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = load i8, ptr [[TMP88]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = insertelement <8 x i8> [[TMP85]], i8 [[TMP89]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE31]] -; DISABLED_MASKED_STRIDED: pred.load.continue31: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = phi <8 x i8> [ [[TMP85]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP90]], [[PRED_LOAD_IF30]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP92]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if32: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP93]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = load i8, ptr [[TMP94]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = insertelement <8 x i8> [[TMP91]], i8 [[TMP95]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE33]] -; DISABLED_MASKED_STRIDED: pred.load.continue33: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = phi <8 x i8> [ [[TMP91]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP96]], [[PRED_LOAD_IF32]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP98]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] -; DISABLED_MASKED_STRIDED: pred.load.if34: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP99]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = load i8, ptr [[TMP100]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = insertelement <8 x i8> [[TMP97]], i8 [[TMP101]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE35]] -; DISABLED_MASKED_STRIDED: pred.load.continue35: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = phi <8 x i8> [ [[TMP97]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP102]], [[PRED_LOAD_IF34]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[TMP54]], <8 x i8> [[TMP103]]) -; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP105]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if1: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP9]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] +; DISABLED_MASKED_STRIDED: pred.load.continue2: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if3: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP15]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP16]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] +; DISABLED_MASKED_STRIDED: pred.load.continue4: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if5: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP21]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] +; DISABLED_MASKED_STRIDED: pred.load.continue6: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if7: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP27]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, ptr [[TMP28]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] +; DISABLED_MASKED_STRIDED: pred.load.continue8: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if9: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP33]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, ptr [[TMP34]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] +; DISABLED_MASKED_STRIDED: pred.load.continue10: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if11: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP39]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, ptr [[TMP40]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] +; DISABLED_MASKED_STRIDED: pred.load.continue12: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if13: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP45]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] +; DISABLED_MASKED_STRIDED: pred.load.continue14: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = or <8 x i32> [[TMP1]], +; DISABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if15: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP52]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, ptr [[TMP53]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] +; DISABLED_MASKED_STRIDED: pred.load.continue16: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE14]] ], [ [[TMP55]], [[PRED_LOAD_IF15]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP57]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if17: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP58]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = load i8, ptr [[TMP59]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE18]] +; DISABLED_MASKED_STRIDED: pred.load.continue18: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = phi <8 x i8> [ [[TMP56]], [[PRED_LOAD_CONTINUE16]] ], [ [[TMP61]], [[PRED_LOAD_IF17]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP63]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if19: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP64]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = load i8, ptr [[TMP65]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE20]] +; DISABLED_MASKED_STRIDED: pred.load.continue20: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = phi <8 x i8> [ [[TMP62]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP67]], [[PRED_LOAD_IF19]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP69]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if21: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP70]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = load i8, ptr [[TMP71]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE22]] +; DISABLED_MASKED_STRIDED: pred.load.continue22: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = phi <8 x i8> [ [[TMP68]], [[PRED_LOAD_CONTINUE20]] ], [ [[TMP73]], [[PRED_LOAD_IF21]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP75]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if23: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP76]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = load i8, ptr [[TMP77]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE24]] +; DISABLED_MASKED_STRIDED: pred.load.continue24: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = phi <8 x i8> [ [[TMP74]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP79]], [[PRED_LOAD_IF23]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP81]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if25: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP82]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = load i8, ptr [[TMP83]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE26]] +; DISABLED_MASKED_STRIDED: pred.load.continue26: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = phi <8 x i8> [ [[TMP80]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP85]], [[PRED_LOAD_IF25]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP87]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if27: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP88]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = load i8, ptr [[TMP89]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE28]] +; DISABLED_MASKED_STRIDED: pred.load.continue28: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = phi <8 x i8> [ [[TMP86]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP91]], [[PRED_LOAD_IF27]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP93]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] +; DISABLED_MASKED_STRIDED: pred.load.if29: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP94]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = load i8, ptr [[TMP95]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE30]] +; DISABLED_MASKED_STRIDED: pred.load.continue30: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = phi <8 x i8> [ [[TMP92]], [[PRED_LOAD_CONTINUE28]] ], [ [[TMP97]], [[PRED_LOAD_IF29]] ] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[TMP49]], <8 x i8> [[TMP98]]) +; DISABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP100]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; DISABLED_MASKED_STRIDED: pred.store.if: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP106]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP104]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP108]], ptr [[TMP107]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[TMP101]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = extractelement <8 x i8> [[TMP99]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP103]], ptr [[TMP102]], align 1 ; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; DISABLED_MASKED_STRIDED: pred.store.continue: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP109]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if36: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP110]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP104]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP112]], ptr [[TMP111]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE37]] -; DISABLED_MASKED_STRIDED: pred.store.continue37: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP113]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if38: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP114]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP104]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP116]], ptr [[TMP115]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE39]] -; DISABLED_MASKED_STRIDED: pred.store.continue39: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP117]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if40: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP118]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP104]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP120]], ptr [[TMP119]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE41]] -; DISABLED_MASKED_STRIDED: pred.store.continue41: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP121]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if42: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP122]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP104]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP124]], ptr [[TMP123]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE43]] -; DISABLED_MASKED_STRIDED: pred.store.continue43: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP125]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if44: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP126]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP104]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP128]], ptr [[TMP127]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE45]] -; DISABLED_MASKED_STRIDED: pred.store.continue45: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP129]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if46: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP130]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP104]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP132]], ptr [[TMP131]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE47]] -; DISABLED_MASKED_STRIDED: pred.store.continue47: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP133]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if48: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP104]], label [[PRED_STORE_IF31:%.*]], label [[PRED_STORE_CONTINUE32:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if31: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP105]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i8> [[TMP99]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP107]], ptr [[TMP106]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE32]] +; DISABLED_MASKED_STRIDED: pred.store.continue32: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP108]], label [[PRED_STORE_IF33:%.*]], label [[PRED_STORE_CONTINUE34:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if33: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP109]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i8> [[TMP99]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP111]], ptr [[TMP110]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE34]] +; DISABLED_MASKED_STRIDED: pred.store.continue34: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP112]], label [[PRED_STORE_IF35:%.*]], label [[PRED_STORE_CONTINUE36:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if35: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP113]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i8> [[TMP99]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP115]], ptr [[TMP114]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE36]] +; DISABLED_MASKED_STRIDED: pred.store.continue36: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP116]], label [[PRED_STORE_IF37:%.*]], label [[PRED_STORE_CONTINUE38:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if37: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP117]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i8> [[TMP99]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP119]], ptr [[TMP118]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE38]] +; DISABLED_MASKED_STRIDED: pred.store.continue38: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP120]], label [[PRED_STORE_IF39:%.*]], label [[PRED_STORE_CONTINUE40:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if39: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP121]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i8> [[TMP99]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP123]], ptr [[TMP122]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE40]] +; DISABLED_MASKED_STRIDED: pred.store.continue40: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP124]], label [[PRED_STORE_IF41:%.*]], label [[PRED_STORE_CONTINUE42:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if41: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP125]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i8> [[TMP99]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP127]], ptr [[TMP126]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE42]] +; DISABLED_MASKED_STRIDED: pred.store.continue42: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP128]], label [[PRED_STORE_IF43:%.*]], label [[PRED_STORE_CONTINUE44:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if43: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP129]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i8> [[TMP99]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP131]], ptr [[TMP130]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE44]] +; DISABLED_MASKED_STRIDED: pred.store.continue44: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = sub <8 x i8> zeroinitializer, [[TMP99]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP133]], label [[PRED_STORE_IF45:%.*]], label [[PRED_STORE_CONTINUE46:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if45: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP134]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i8> [[TMP104]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i8> [[TMP132]], i64 0 ; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP136]], ptr [[TMP135]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE49]] -; DISABLED_MASKED_STRIDED: pred.store.continue49: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = sub <8 x i8> zeroinitializer, [[TMP104]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP138]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if50: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP139]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP137]], i64 0 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP141]], ptr [[TMP140]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE51]] -; DISABLED_MASKED_STRIDED: pred.store.continue51: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP142]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if52: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP143]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP137]], i64 1 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP145]], ptr [[TMP144]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE53]] -; DISABLED_MASKED_STRIDED: pred.store.continue53: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP146]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if54: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP147]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP137]], i64 2 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP149]], ptr [[TMP148]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE55]] -; DISABLED_MASKED_STRIDED: pred.store.continue55: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP150]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if56: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP151]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP137]], i64 3 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP153]], ptr [[TMP152]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE57]] -; DISABLED_MASKED_STRIDED: pred.store.continue57: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP154]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if58: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP155]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP137]], i64 4 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP157]], ptr [[TMP156]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE59]] -; DISABLED_MASKED_STRIDED: pred.store.continue59: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP158]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if60: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP159]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP137]], i64 5 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP161]], ptr [[TMP160]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE61]] -; DISABLED_MASKED_STRIDED: pred.store.continue61: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP162]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] -; DISABLED_MASKED_STRIDED: pred.store.if62: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP163]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP137]], i64 6 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP165]], ptr [[TMP164]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE63]] -; DISABLED_MASKED_STRIDED: pred.store.continue63: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP166]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] -; DISABLED_MASKED_STRIDED: pred.store.if64: -; DISABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP167]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = extractelement <8 x i8> [[TMP137]], i64 7 -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP169]], ptr [[TMP168]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE65]] -; DISABLED_MASKED_STRIDED: pred.store.continue65: +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE46]] +; DISABLED_MASKED_STRIDED: pred.store.continue46: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP137]], label [[PRED_STORE_IF47:%.*]], label [[PRED_STORE_CONTINUE48:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if47: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP138]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i8> [[TMP132]], i64 1 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP140]], ptr [[TMP139]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE48]] +; DISABLED_MASKED_STRIDED: pred.store.continue48: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP141]], label [[PRED_STORE_IF49:%.*]], label [[PRED_STORE_CONTINUE50:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if49: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP142]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i8> [[TMP132]], i64 2 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP144]], ptr [[TMP143]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE50]] +; DISABLED_MASKED_STRIDED: pred.store.continue50: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP145]], label [[PRED_STORE_IF51:%.*]], label [[PRED_STORE_CONTINUE52:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if51: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP146]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i8> [[TMP132]], i64 3 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP148]], ptr [[TMP147]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE52]] +; DISABLED_MASKED_STRIDED: pred.store.continue52: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP149]], label [[PRED_STORE_IF53:%.*]], label [[PRED_STORE_CONTINUE54:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if53: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP150]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i8> [[TMP132]], i64 4 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP152]], ptr [[TMP151]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE54]] +; DISABLED_MASKED_STRIDED: pred.store.continue54: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP153]], label [[PRED_STORE_IF55:%.*]], label [[PRED_STORE_CONTINUE56:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if55: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP154]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i8> [[TMP132]], i64 5 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP156]], ptr [[TMP155]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE56]] +; DISABLED_MASKED_STRIDED: pred.store.continue56: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP157]], label [[PRED_STORE_IF57:%.*]], label [[PRED_STORE_CONTINUE58:%.*]] +; DISABLED_MASKED_STRIDED: pred.store.if57: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP158]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i8> [[TMP132]], i64 6 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP160]], ptr [[TMP159]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE58]] +; DISABLED_MASKED_STRIDED: pred.store.continue58: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP161]], label [[PRED_STORE_IF59:%.*]], label [[PRED_STORE_CONTINUE60]] +; DISABLED_MASKED_STRIDED: pred.store.if59: +; DISABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP162]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i8> [[TMP132]], i64 7 +; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP164]], ptr [[TMP163]], align 1 +; DISABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE60]] +; DISABLED_MASKED_STRIDED: pred.store.continue60: ; DISABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; DISABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; DISABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP170]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] -; DISABLED_MASKED_STRIDED: for.body: -; DISABLED_MASKED_STRIDED-NEXT: [[IX_024:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC:%.*]] ], [ 1024, [[ENTRY:%.*]] ] -; DISABLED_MASKED_STRIDED-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[IX_024]], [[CONV]] -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]] -; DISABLED_MASKED_STRIDED: if.then: -; DISABLED_MASKED_STRIDED-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[IX_024]], 1 -; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[MUL]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[ADD:%.*]] = or i32 [[MUL]], 1 -; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[ADD]] -; DISABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = load i8, ptr [[ARRAYIDX4]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP171]], i8 [[TMP172]]) -; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[MUL]] -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[TMP173]], ptr [[ARRAYIDX6]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: [[SUB:%.*]] = sub i8 0, [[TMP173]] -; DISABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[ADD]] -; DISABLED_MASKED_STRIDED-NEXT: store i8 [[SUB]], ptr [[ARRAYIDX11]], align 1 -; DISABLED_MASKED_STRIDED-NEXT: br label [[FOR_INC]] -; DISABLED_MASKED_STRIDED: for.inc: -; DISABLED_MASKED_STRIDED-NEXT: [[INC]] = add nsw i32 [[IX_024]], -1 -; DISABLED_MASKED_STRIDED-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 0 -; DISABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] +; DISABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; DISABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] ; DISABLED_MASKED_STRIDED: for.end: ; DISABLED_MASKED_STRIDED-NEXT: ret void ; ; ENABLED_MASKED_STRIDED-LABEL: @masked_strided2_reverse( ; ENABLED_MASKED_STRIDED-NEXT: entry: ; ENABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32 -; ENABLED_MASKED_STRIDED-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 2048 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[Q]], i32 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = icmp ugt ptr [[TMP0]], [[SCEVGEP]] -; ENABLED_MASKED_STRIDED-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[Q]], i32 2049 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[Q]], i32 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = icmp ugt ptr [[TMP2]], [[SCEVGEP2]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i1 [[TMP1]], [[TMP3]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP4]], label [[FOR_BODY:%.*]], label [[VECTOR_PH:%.*]] -; ENABLED_MASKED_STRIDED: vector.ph: ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x i32> poison, i32 [[CONV]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x i32> [[BROADCAST_SPLATINSERT]], <8 x i32> poison, <8 x i32> zeroinitializer ; ENABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]] ; ENABLED_MASKED_STRIDED: vector.body: -; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE65:%.*]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE65]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP7]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE60:%.*]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND:%.*]] = phi <8 x i32> [ , [[ENTRY]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE60]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP0:%.*]] = icmp ugt <8 x i32> [[VEC_IND]], [[BROADCAST_SPLAT]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP1:%.*]] = shl nuw nsw <8 x i32> [[VEC_IND]], +; ENABLED_MASKED_STRIDED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP2]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]] ; ENABLED_MASKED_STRIDED: pred.load.if: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP8]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = insertelement <8 x i8> poison, i8 [[TMP10]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i32 [[TMP3]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP4]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = insertelement <8 x i8> poison, i8 [[TMP5]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE]] ; ENABLED_MASKED_STRIDED: pred.load.continue: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_LOAD_IF]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP13]], label [[PRED_LOAD_IF6:%.*]], label [[PRED_LOAD_CONTINUE7:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if6: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP14]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = load i8, ptr [[TMP15]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = insertelement <8 x i8> [[TMP12]], i8 [[TMP16]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE7]] -; ENABLED_MASKED_STRIDED: pred.load.continue7: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = phi <8 x i8> [ [[TMP12]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP17]], [[PRED_LOAD_IF6]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP19]], label [[PRED_LOAD_IF8:%.*]], label [[PRED_LOAD_CONTINUE9:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if8: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP20]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = load i8, ptr [[TMP21]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = insertelement <8 x i8> [[TMP18]], i8 [[TMP22]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE9]] -; ENABLED_MASKED_STRIDED: pred.load.continue9: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = phi <8 x i8> [ [[TMP18]], [[PRED_LOAD_CONTINUE7]] ], [ [[TMP23]], [[PRED_LOAD_IF8]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP25]], label [[PRED_LOAD_IF10:%.*]], label [[PRED_LOAD_CONTINUE11:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if10: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP26]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = load i8, ptr [[TMP27]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = insertelement <8 x i8> [[TMP24]], i8 [[TMP28]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE11]] -; ENABLED_MASKED_STRIDED: pred.load.continue11: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = phi <8 x i8> [ [[TMP24]], [[PRED_LOAD_CONTINUE9]] ], [ [[TMP29]], [[PRED_LOAD_IF10]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP31]], label [[PRED_LOAD_IF12:%.*]], label [[PRED_LOAD_CONTINUE13:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if12: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP32]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = insertelement <8 x i8> [[TMP30]], i8 [[TMP34]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE13]] -; ENABLED_MASKED_STRIDED: pred.load.continue13: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = phi <8 x i8> [ [[TMP30]], [[PRED_LOAD_CONTINUE11]] ], [ [[TMP35]], [[PRED_LOAD_IF12]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP37]], label [[PRED_LOAD_IF14:%.*]], label [[PRED_LOAD_CONTINUE15:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if14: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP38]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = load i8, ptr [[TMP39]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = insertelement <8 x i8> [[TMP36]], i8 [[TMP40]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE15]] -; ENABLED_MASKED_STRIDED: pred.load.continue15: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = phi <8 x i8> [ [[TMP36]], [[PRED_LOAD_CONTINUE13]] ], [ [[TMP41]], [[PRED_LOAD_IF14]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP43]], label [[PRED_LOAD_IF16:%.*]], label [[PRED_LOAD_CONTINUE17:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if16: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP44]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = load i8, ptr [[TMP45]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = insertelement <8 x i8> [[TMP42]], i8 [[TMP46]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE17]] -; ENABLED_MASKED_STRIDED: pred.load.continue17: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = phi <8 x i8> [ [[TMP42]], [[PRED_LOAD_CONTINUE15]] ], [ [[TMP47]], [[PRED_LOAD_IF16]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP49]], label [[PRED_LOAD_IF18:%.*]], label [[PRED_LOAD_CONTINUE19:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if18: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP50]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = load i8, ptr [[TMP51]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = insertelement <8 x i8> [[TMP48]], i8 [[TMP52]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE19]] -; ENABLED_MASKED_STRIDED: pred.load.continue19: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = phi <8 x i8> [ [[TMP48]], [[PRED_LOAD_CONTINUE17]] ], [ [[TMP53]], [[PRED_LOAD_IF18]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = or <8 x i32> [[TMP6]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP56]], label [[PRED_LOAD_IF20:%.*]], label [[PRED_LOAD_CONTINUE21:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if20: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP57]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = load i8, ptr [[TMP58]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = insertelement <8 x i8> poison, i8 [[TMP59]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE21]] -; ENABLED_MASKED_STRIDED: pred.load.continue21: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE19]] ], [ [[TMP60]], [[PRED_LOAD_IF20]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP62]], label [[PRED_LOAD_IF22:%.*]], label [[PRED_LOAD_CONTINUE23:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if22: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP63]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = load i8, ptr [[TMP64]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = insertelement <8 x i8> [[TMP61]], i8 [[TMP65]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE23]] -; ENABLED_MASKED_STRIDED: pred.load.continue23: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = phi <8 x i8> [ [[TMP61]], [[PRED_LOAD_CONTINUE21]] ], [ [[TMP66]], [[PRED_LOAD_IF22]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP68]], label [[PRED_LOAD_IF24:%.*]], label [[PRED_LOAD_CONTINUE25:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if24: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP69]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = load i8, ptr [[TMP70]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = insertelement <8 x i8> [[TMP67]], i8 [[TMP71]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE25]] -; ENABLED_MASKED_STRIDED: pred.load.continue25: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = phi <8 x i8> [ [[TMP67]], [[PRED_LOAD_CONTINUE23]] ], [ [[TMP72]], [[PRED_LOAD_IF24]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP74]], label [[PRED_LOAD_IF26:%.*]], label [[PRED_LOAD_CONTINUE27:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if26: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP75]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = load i8, ptr [[TMP76]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = insertelement <8 x i8> [[TMP73]], i8 [[TMP77]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE27]] -; ENABLED_MASKED_STRIDED: pred.load.continue27: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = phi <8 x i8> [ [[TMP73]], [[PRED_LOAD_CONTINUE25]] ], [ [[TMP78]], [[PRED_LOAD_IF26]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP80]], label [[PRED_LOAD_IF28:%.*]], label [[PRED_LOAD_CONTINUE29:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if28: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP81]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = load i8, ptr [[TMP82]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = insertelement <8 x i8> [[TMP79]], i8 [[TMP83]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE29]] -; ENABLED_MASKED_STRIDED: pred.load.continue29: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = phi <8 x i8> [ [[TMP79]], [[PRED_LOAD_CONTINUE27]] ], [ [[TMP84]], [[PRED_LOAD_IF28]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP86]], label [[PRED_LOAD_IF30:%.*]], label [[PRED_LOAD_CONTINUE31:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if30: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP87]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = load i8, ptr [[TMP88]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = insertelement <8 x i8> [[TMP85]], i8 [[TMP89]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE31]] -; ENABLED_MASKED_STRIDED: pred.load.continue31: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = phi <8 x i8> [ [[TMP85]], [[PRED_LOAD_CONTINUE29]] ], [ [[TMP90]], [[PRED_LOAD_IF30]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP92]], label [[PRED_LOAD_IF32:%.*]], label [[PRED_LOAD_CONTINUE33:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if32: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP93]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = load i8, ptr [[TMP94]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = insertelement <8 x i8> [[TMP91]], i8 [[TMP95]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE33]] -; ENABLED_MASKED_STRIDED: pred.load.continue33: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = phi <8 x i8> [ [[TMP91]], [[PRED_LOAD_CONTINUE31]] ], [ [[TMP96]], [[PRED_LOAD_IF32]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP98]], label [[PRED_LOAD_IF34:%.*]], label [[PRED_LOAD_CONTINUE35:%.*]] -; ENABLED_MASKED_STRIDED: pred.load.if34: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP99]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = load i8, ptr [[TMP100]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = insertelement <8 x i8> [[TMP97]], i8 [[TMP101]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE35]] -; ENABLED_MASKED_STRIDED: pred.load.continue35: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = phi <8 x i8> [ [[TMP97]], [[PRED_LOAD_CONTINUE33]] ], [ [[TMP102]], [[PRED_LOAD_IF34]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[TMP54]], <8 x i8> [[TMP103]]) -; ENABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP105]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = phi <8 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP6]], [[PRED_LOAD_IF]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if1: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP9]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP11:%.*]] = load i8, ptr [[TMP10]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = insertelement <8 x i8> [[TMP7]], i8 [[TMP11]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE2]] +; ENABLED_MASKED_STRIDED: pred.load.continue2: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP13:%.*]] = phi <8 x i8> [ [[TMP7]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP12]], [[PRED_LOAD_IF1]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP14]], label [[PRED_LOAD_IF3:%.*]], label [[PRED_LOAD_CONTINUE4:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if3: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP15:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP15]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP17:%.*]] = load i8, ptr [[TMP16]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP18:%.*]] = insertelement <8 x i8> [[TMP13]], i8 [[TMP17]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE4]] +; ENABLED_MASKED_STRIDED: pred.load.continue4: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP19:%.*]] = phi <8 x i8> [ [[TMP13]], [[PRED_LOAD_CONTINUE2]] ], [ [[TMP18]], [[PRED_LOAD_IF3]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP20:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP20]], label [[PRED_LOAD_IF5:%.*]], label [[PRED_LOAD_CONTINUE6:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if5: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP21:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP22:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP21]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP24:%.*]] = insertelement <8 x i8> [[TMP19]], i8 [[TMP23]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE6]] +; ENABLED_MASKED_STRIDED: pred.load.continue6: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP25:%.*]] = phi <8 x i8> [ [[TMP19]], [[PRED_LOAD_CONTINUE4]] ], [ [[TMP24]], [[PRED_LOAD_IF5]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP26]], label [[PRED_LOAD_IF7:%.*]], label [[PRED_LOAD_CONTINUE8:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if7: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP27:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP28:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP27]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP29:%.*]] = load i8, ptr [[TMP28]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP30:%.*]] = insertelement <8 x i8> [[TMP25]], i8 [[TMP29]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE8]] +; ENABLED_MASKED_STRIDED: pred.load.continue8: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP31:%.*]] = phi <8 x i8> [ [[TMP25]], [[PRED_LOAD_CONTINUE6]] ], [ [[TMP30]], [[PRED_LOAD_IF7]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP32:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP32]], label [[PRED_LOAD_IF9:%.*]], label [[PRED_LOAD_CONTINUE10:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if9: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP34:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP33]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP35:%.*]] = load i8, ptr [[TMP34]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP36:%.*]] = insertelement <8 x i8> [[TMP31]], i8 [[TMP35]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE10]] +; ENABLED_MASKED_STRIDED: pred.load.continue10: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP37:%.*]] = phi <8 x i8> [ [[TMP31]], [[PRED_LOAD_CONTINUE8]] ], [ [[TMP36]], [[PRED_LOAD_IF9]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP38:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP38]], label [[PRED_LOAD_IF11:%.*]], label [[PRED_LOAD_CONTINUE12:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if11: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP39:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP40:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP39]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP41:%.*]] = load i8, ptr [[TMP40]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP42:%.*]] = insertelement <8 x i8> [[TMP37]], i8 [[TMP41]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE12]] +; ENABLED_MASKED_STRIDED: pred.load.continue12: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP43:%.*]] = phi <8 x i8> [ [[TMP37]], [[PRED_LOAD_CONTINUE10]] ], [ [[TMP42]], [[PRED_LOAD_IF11]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP44:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP44]], label [[PRED_LOAD_IF13:%.*]], label [[PRED_LOAD_CONTINUE14:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if13: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP45:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP45]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP48:%.*]] = insertelement <8 x i8> [[TMP43]], i8 [[TMP47]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE14]] +; ENABLED_MASKED_STRIDED: pred.load.continue14: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP49:%.*]] = phi <8 x i8> [ [[TMP43]], [[PRED_LOAD_CONTINUE12]] ], [ [[TMP48]], [[PRED_LOAD_IF13]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP50:%.*]] = or <8 x i32> [[TMP1]], +; ENABLED_MASKED_STRIDED-NEXT: [[TMP51:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP51]], label [[PRED_LOAD_IF15:%.*]], label [[PRED_LOAD_CONTINUE16:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if15: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP52:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP53:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP52]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP54:%.*]] = load i8, ptr [[TMP53]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP55:%.*]] = insertelement <8 x i8> poison, i8 [[TMP54]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE16]] +; ENABLED_MASKED_STRIDED: pred.load.continue16: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP56:%.*]] = phi <8 x i8> [ poison, [[PRED_LOAD_CONTINUE14]] ], [ [[TMP55]], [[PRED_LOAD_IF15]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP57:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP57]], label [[PRED_LOAD_IF17:%.*]], label [[PRED_LOAD_CONTINUE18:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if17: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP58:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP59:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP58]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP60:%.*]] = load i8, ptr [[TMP59]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP61:%.*]] = insertelement <8 x i8> [[TMP56]], i8 [[TMP60]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE18]] +; ENABLED_MASKED_STRIDED: pred.load.continue18: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP62:%.*]] = phi <8 x i8> [ [[TMP56]], [[PRED_LOAD_CONTINUE16]] ], [ [[TMP61]], [[PRED_LOAD_IF17]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP63:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP63]], label [[PRED_LOAD_IF19:%.*]], label [[PRED_LOAD_CONTINUE20:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if19: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP64:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP65:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP64]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP66:%.*]] = load i8, ptr [[TMP65]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP67:%.*]] = insertelement <8 x i8> [[TMP62]], i8 [[TMP66]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE20]] +; ENABLED_MASKED_STRIDED: pred.load.continue20: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP68:%.*]] = phi <8 x i8> [ [[TMP62]], [[PRED_LOAD_CONTINUE18]] ], [ [[TMP67]], [[PRED_LOAD_IF19]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP69:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP69]], label [[PRED_LOAD_IF21:%.*]], label [[PRED_LOAD_CONTINUE22:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if21: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP70:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP71:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP70]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP72:%.*]] = load i8, ptr [[TMP71]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP73:%.*]] = insertelement <8 x i8> [[TMP68]], i8 [[TMP72]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE22]] +; ENABLED_MASKED_STRIDED: pred.load.continue22: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP74:%.*]] = phi <8 x i8> [ [[TMP68]], [[PRED_LOAD_CONTINUE20]] ], [ [[TMP73]], [[PRED_LOAD_IF21]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP75:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP75]], label [[PRED_LOAD_IF23:%.*]], label [[PRED_LOAD_CONTINUE24:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if23: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP77:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP76]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP78:%.*]] = load i8, ptr [[TMP77]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP79:%.*]] = insertelement <8 x i8> [[TMP74]], i8 [[TMP78]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE24]] +; ENABLED_MASKED_STRIDED: pred.load.continue24: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP80:%.*]] = phi <8 x i8> [ [[TMP74]], [[PRED_LOAD_CONTINUE22]] ], [ [[TMP79]], [[PRED_LOAD_IF23]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP81:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP81]], label [[PRED_LOAD_IF25:%.*]], label [[PRED_LOAD_CONTINUE26:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if25: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP82:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP83:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP82]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP84:%.*]] = load i8, ptr [[TMP83]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP85:%.*]] = insertelement <8 x i8> [[TMP80]], i8 [[TMP84]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE26]] +; ENABLED_MASKED_STRIDED: pred.load.continue26: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP86:%.*]] = phi <8 x i8> [ [[TMP80]], [[PRED_LOAD_CONTINUE24]] ], [ [[TMP85]], [[PRED_LOAD_IF25]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP87:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP87]], label [[PRED_LOAD_IF27:%.*]], label [[PRED_LOAD_CONTINUE28:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if27: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP88:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP89:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP88]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP90:%.*]] = load i8, ptr [[TMP89]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP91:%.*]] = insertelement <8 x i8> [[TMP86]], i8 [[TMP90]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE28]] +; ENABLED_MASKED_STRIDED: pred.load.continue28: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP92:%.*]] = phi <8 x i8> [ [[TMP86]], [[PRED_LOAD_CONTINUE26]] ], [ [[TMP91]], [[PRED_LOAD_IF27]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP93:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP93]], label [[PRED_LOAD_IF29:%.*]], label [[PRED_LOAD_CONTINUE30:%.*]] +; ENABLED_MASKED_STRIDED: pred.load.if29: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP94:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP95:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[TMP94]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP96:%.*]] = load i8, ptr [[TMP95]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP97:%.*]] = insertelement <8 x i8> [[TMP92]], i8 [[TMP96]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_LOAD_CONTINUE30]] +; ENABLED_MASKED_STRIDED: pred.load.continue30: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP98:%.*]] = phi <8 x i8> [ [[TMP92]], [[PRED_LOAD_CONTINUE28]] ], [ [[TMP97]], [[PRED_LOAD_IF29]] ] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP99:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[TMP49]], <8 x i8> [[TMP98]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP100:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP100]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ; ENABLED_MASKED_STRIDED: pred.store.if: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = extractelement <8 x i32> [[TMP6]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP106]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i8> [[TMP104]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP108]], ptr [[TMP107]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP101:%.*]] = extractelement <8 x i32> [[TMP1]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP102:%.*]] = getelementptr inbounds i8, ptr [[Q:%.*]], i32 [[TMP101]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP103:%.*]] = extractelement <8 x i8> [[TMP99]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP103]], ptr [[TMP102]], align 1 ; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE]] ; ENABLED_MASKED_STRIDED: pred.store.continue: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP109]], label [[PRED_STORE_IF36:%.*]], label [[PRED_STORE_CONTINUE37:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if36: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = extractelement <8 x i32> [[TMP6]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP110]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i8> [[TMP104]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP112]], ptr [[TMP111]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE37]] -; ENABLED_MASKED_STRIDED: pred.store.continue37: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP113]], label [[PRED_STORE_IF38:%.*]], label [[PRED_STORE_CONTINUE39:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if38: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = extractelement <8 x i32> [[TMP6]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP114]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i8> [[TMP104]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP116]], ptr [[TMP115]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE39]] -; ENABLED_MASKED_STRIDED: pred.store.continue39: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP117]], label [[PRED_STORE_IF40:%.*]], label [[PRED_STORE_CONTINUE41:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if40: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = extractelement <8 x i32> [[TMP6]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP118]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i8> [[TMP104]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP120]], ptr [[TMP119]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE41]] -; ENABLED_MASKED_STRIDED: pred.store.continue41: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP121]], label [[PRED_STORE_IF42:%.*]], label [[PRED_STORE_CONTINUE43:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if42: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = extractelement <8 x i32> [[TMP6]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP122]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i8> [[TMP104]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP124]], ptr [[TMP123]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE43]] -; ENABLED_MASKED_STRIDED: pred.store.continue43: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP125]], label [[PRED_STORE_IF44:%.*]], label [[PRED_STORE_CONTINUE45:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if44: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = extractelement <8 x i32> [[TMP6]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP126]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i8> [[TMP104]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP128]], ptr [[TMP127]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE45]] -; ENABLED_MASKED_STRIDED: pred.store.continue45: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP129]], label [[PRED_STORE_IF46:%.*]], label [[PRED_STORE_CONTINUE47:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if46: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = extractelement <8 x i32> [[TMP6]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP130]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = extractelement <8 x i8> [[TMP104]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP132]], ptr [[TMP131]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE47]] -; ENABLED_MASKED_STRIDED: pred.store.continue47: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP133]], label [[PRED_STORE_IF48:%.*]], label [[PRED_STORE_CONTINUE49:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if48: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i32> [[TMP6]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP104:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP104]], label [[PRED_STORE_IF31:%.*]], label [[PRED_STORE_CONTINUE32:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if31: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP105:%.*]] = extractelement <8 x i32> [[TMP1]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP106:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP105]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP107:%.*]] = extractelement <8 x i8> [[TMP99]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP107]], ptr [[TMP106]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE32]] +; ENABLED_MASKED_STRIDED: pred.store.continue32: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP108:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP108]], label [[PRED_STORE_IF33:%.*]], label [[PRED_STORE_CONTINUE34:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if33: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP109:%.*]] = extractelement <8 x i32> [[TMP1]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP110:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP109]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP111:%.*]] = extractelement <8 x i8> [[TMP99]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP111]], ptr [[TMP110]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE34]] +; ENABLED_MASKED_STRIDED: pred.store.continue34: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP112:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP112]], label [[PRED_STORE_IF35:%.*]], label [[PRED_STORE_CONTINUE36:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if35: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP113:%.*]] = extractelement <8 x i32> [[TMP1]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP114:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP113]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP115:%.*]] = extractelement <8 x i8> [[TMP99]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP115]], ptr [[TMP114]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE36]] +; ENABLED_MASKED_STRIDED: pred.store.continue36: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP116:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP116]], label [[PRED_STORE_IF37:%.*]], label [[PRED_STORE_CONTINUE38:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if37: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP117:%.*]] = extractelement <8 x i32> [[TMP1]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP118:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP117]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP119:%.*]] = extractelement <8 x i8> [[TMP99]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP119]], ptr [[TMP118]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE38]] +; ENABLED_MASKED_STRIDED: pred.store.continue38: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP120:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP120]], label [[PRED_STORE_IF39:%.*]], label [[PRED_STORE_CONTINUE40:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if39: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP121:%.*]] = extractelement <8 x i32> [[TMP1]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP122:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP121]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP123:%.*]] = extractelement <8 x i8> [[TMP99]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP123]], ptr [[TMP122]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE40]] +; ENABLED_MASKED_STRIDED: pred.store.continue40: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP124:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP124]], label [[PRED_STORE_IF41:%.*]], label [[PRED_STORE_CONTINUE42:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if41: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP125:%.*]] = extractelement <8 x i32> [[TMP1]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP126:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP125]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP127:%.*]] = extractelement <8 x i8> [[TMP99]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP127]], ptr [[TMP126]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE42]] +; ENABLED_MASKED_STRIDED: pred.store.continue42: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP128:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP128]], label [[PRED_STORE_IF43:%.*]], label [[PRED_STORE_CONTINUE44:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if43: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP129:%.*]] = extractelement <8 x i32> [[TMP1]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP130:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP129]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP131:%.*]] = extractelement <8 x i8> [[TMP99]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP131]], ptr [[TMP130]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE44]] +; ENABLED_MASKED_STRIDED: pred.store.continue44: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP132:%.*]] = sub <8 x i8> zeroinitializer, [[TMP99]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP133:%.*]] = extractelement <8 x i1> [[TMP0]], i64 0 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP133]], label [[PRED_STORE_IF45:%.*]], label [[PRED_STORE_CONTINUE46:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if45: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP134:%.*]] = extractelement <8 x i32> [[TMP50]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: [[TMP135:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP134]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i8> [[TMP104]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP136:%.*]] = extractelement <8 x i8> [[TMP132]], i64 0 ; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP136]], ptr [[TMP135]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE49]] -; ENABLED_MASKED_STRIDED: pred.store.continue49: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = sub <8 x i8> zeroinitializer, [[TMP104]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i1> [[TMP5]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP138]], label [[PRED_STORE_IF50:%.*]], label [[PRED_STORE_CONTINUE51:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if50: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = extractelement <8 x i32> [[TMP55]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP139]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i8> [[TMP137]], i64 0 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP141]], ptr [[TMP140]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE51]] -; ENABLED_MASKED_STRIDED: pred.store.continue51: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i1> [[TMP5]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP142]], label [[PRED_STORE_IF52:%.*]], label [[PRED_STORE_CONTINUE53:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if52: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = extractelement <8 x i32> [[TMP55]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP143]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i8> [[TMP137]], i64 1 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP145]], ptr [[TMP144]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE53]] -; ENABLED_MASKED_STRIDED: pred.store.continue53: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i1> [[TMP5]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP146]], label [[PRED_STORE_IF54:%.*]], label [[PRED_STORE_CONTINUE55:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if54: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = extractelement <8 x i32> [[TMP55]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP147]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i8> [[TMP137]], i64 2 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP149]], ptr [[TMP148]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE55]] -; ENABLED_MASKED_STRIDED: pred.store.continue55: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i1> [[TMP5]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP150]], label [[PRED_STORE_IF56:%.*]], label [[PRED_STORE_CONTINUE57:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if56: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = extractelement <8 x i32> [[TMP55]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP151]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i8> [[TMP137]], i64 3 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP153]], ptr [[TMP152]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE57]] -; ENABLED_MASKED_STRIDED: pred.store.continue57: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i1> [[TMP5]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP154]], label [[PRED_STORE_IF58:%.*]], label [[PRED_STORE_CONTINUE59:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if58: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = extractelement <8 x i32> [[TMP55]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP155]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i8> [[TMP137]], i64 4 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP157]], ptr [[TMP156]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE59]] -; ENABLED_MASKED_STRIDED: pred.store.continue59: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i1> [[TMP5]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP158]], label [[PRED_STORE_IF60:%.*]], label [[PRED_STORE_CONTINUE61:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if60: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = extractelement <8 x i32> [[TMP55]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP159]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i8> [[TMP137]], i64 5 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP161]], ptr [[TMP160]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE61]] -; ENABLED_MASKED_STRIDED: pred.store.continue61: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i1> [[TMP5]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP162]], label [[PRED_STORE_IF62:%.*]], label [[PRED_STORE_CONTINUE63:%.*]] -; ENABLED_MASKED_STRIDED: pred.store.if62: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = extractelement <8 x i32> [[TMP55]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP163]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = extractelement <8 x i8> [[TMP137]], i64 6 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP165]], ptr [[TMP164]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE63]] -; ENABLED_MASKED_STRIDED: pred.store.continue63: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP166:%.*]] = extractelement <8 x i1> [[TMP5]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP166]], label [[PRED_STORE_IF64:%.*]], label [[PRED_STORE_CONTINUE65]] -; ENABLED_MASKED_STRIDED: pred.store.if64: -; ENABLED_MASKED_STRIDED-NEXT: [[TMP167:%.*]] = extractelement <8 x i32> [[TMP55]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP168:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP167]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP169:%.*]] = extractelement <8 x i8> [[TMP137]], i64 7 -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP169]], ptr [[TMP168]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE65]] -; ENABLED_MASKED_STRIDED: pred.store.continue65: +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE46]] +; ENABLED_MASKED_STRIDED: pred.store.continue46: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP137:%.*]] = extractelement <8 x i1> [[TMP0]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP137]], label [[PRED_STORE_IF47:%.*]], label [[PRED_STORE_CONTINUE48:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if47: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP138:%.*]] = extractelement <8 x i32> [[TMP50]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP139:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP138]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP140:%.*]] = extractelement <8 x i8> [[TMP132]], i64 1 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP140]], ptr [[TMP139]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE48]] +; ENABLED_MASKED_STRIDED: pred.store.continue48: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP141:%.*]] = extractelement <8 x i1> [[TMP0]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP141]], label [[PRED_STORE_IF49:%.*]], label [[PRED_STORE_CONTINUE50:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if49: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP142:%.*]] = extractelement <8 x i32> [[TMP50]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP143:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP142]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP144:%.*]] = extractelement <8 x i8> [[TMP132]], i64 2 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP144]], ptr [[TMP143]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE50]] +; ENABLED_MASKED_STRIDED: pred.store.continue50: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP145:%.*]] = extractelement <8 x i1> [[TMP0]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP145]], label [[PRED_STORE_IF51:%.*]], label [[PRED_STORE_CONTINUE52:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if51: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP146:%.*]] = extractelement <8 x i32> [[TMP50]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP147:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP146]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP148:%.*]] = extractelement <8 x i8> [[TMP132]], i64 3 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP148]], ptr [[TMP147]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE52]] +; ENABLED_MASKED_STRIDED: pred.store.continue52: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP149:%.*]] = extractelement <8 x i1> [[TMP0]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP149]], label [[PRED_STORE_IF53:%.*]], label [[PRED_STORE_CONTINUE54:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if53: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP150:%.*]] = extractelement <8 x i32> [[TMP50]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP151:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP150]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP152:%.*]] = extractelement <8 x i8> [[TMP132]], i64 4 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP152]], ptr [[TMP151]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE54]] +; ENABLED_MASKED_STRIDED: pred.store.continue54: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP153:%.*]] = extractelement <8 x i1> [[TMP0]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP153]], label [[PRED_STORE_IF55:%.*]], label [[PRED_STORE_CONTINUE56:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if55: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP154:%.*]] = extractelement <8 x i32> [[TMP50]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP155:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP154]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP156:%.*]] = extractelement <8 x i8> [[TMP132]], i64 5 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP156]], ptr [[TMP155]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE56]] +; ENABLED_MASKED_STRIDED: pred.store.continue56: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP157:%.*]] = extractelement <8 x i1> [[TMP0]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP157]], label [[PRED_STORE_IF57:%.*]], label [[PRED_STORE_CONTINUE58:%.*]] +; ENABLED_MASKED_STRIDED: pred.store.if57: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP158:%.*]] = extractelement <8 x i32> [[TMP50]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP159:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP158]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP160:%.*]] = extractelement <8 x i8> [[TMP132]], i64 6 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP160]], ptr [[TMP159]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE58]] +; ENABLED_MASKED_STRIDED: pred.store.continue58: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP161:%.*]] = extractelement <8 x i1> [[TMP0]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP161]], label [[PRED_STORE_IF59:%.*]], label [[PRED_STORE_CONTINUE60]] +; ENABLED_MASKED_STRIDED: pred.store.if59: +; ENABLED_MASKED_STRIDED-NEXT: [[TMP162:%.*]] = extractelement <8 x i32> [[TMP50]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP163:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[TMP162]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP164:%.*]] = extractelement <8 x i8> [[TMP132]], i64 7 +; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP164]], ptr [[TMP163]], align 1 +; ENABLED_MASKED_STRIDED-NEXT: br label [[PRED_STORE_CONTINUE60]] +; ENABLED_MASKED_STRIDED: pred.store.continue60: ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP170:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP170]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] -; ENABLED_MASKED_STRIDED: for.body: -; ENABLED_MASKED_STRIDED-NEXT: [[IX_024:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_INC:%.*]] ], [ 1024, [[ENTRY:%.*]] ] -; ENABLED_MASKED_STRIDED-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[IX_024]], [[CONV]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[FOR_INC]] -; ENABLED_MASKED_STRIDED: if.then: -; ENABLED_MASKED_STRIDED-NEXT: [[MUL:%.*]] = shl nuw nsw i32 [[IX_024]], 1 -; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[MUL]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP171:%.*]] = load i8, ptr [[ARRAYIDX]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[ADD:%.*]] = or i32 [[MUL]], 1 -; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[P]], i32 [[ADD]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP172:%.*]] = load i8, ptr [[ARRAYIDX4]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP173:%.*]] = call i8 @llvm.smax.i8(i8 [[TMP171]], i8 [[TMP172]]) -; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[MUL]] -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[TMP173]], ptr [[ARRAYIDX6]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: [[SUB:%.*]] = sub i8 0, [[TMP173]] -; ENABLED_MASKED_STRIDED-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i8, ptr [[Q]], i32 [[ADD]] -; ENABLED_MASKED_STRIDED-NEXT: store i8 [[SUB]], ptr [[ARRAYIDX11]], align 1 -; ENABLED_MASKED_STRIDED-NEXT: br label [[FOR_INC]] -; ENABLED_MASKED_STRIDED: for.inc: -; ENABLED_MASKED_STRIDED-NEXT: [[INC]] = add nsw i32 [[IX_024]], -1 -; ENABLED_MASKED_STRIDED-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 0 -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP165:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1024 +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP165]], label [[FOR_END:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -2617,17 +2555,17 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP3]], i32 1, <16 x i1> [[INTERLEAVED_MASK]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = or i32 [[TMP2]], 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC3]]) -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = sub <8 x i8> zeroinitializer, [[TMP7]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP9]], i32 [[TMP6]] -; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP7]], <8 x i8> [[TMP8]], <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP10]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = or i32 [[TMP2]], 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC3]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = sub <8 x i8> zeroinitializer, [[TMP6]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i32 [[TMP5]] +; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP6]], <8 x i8> [[TMP7]], <16 x i32> +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP9]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 ; ENABLED_MASKED_STRIDED-NEXT: [[VEC_IND_NEXT]] = add <8 x i32> [[VEC_IND]], -; ENABLED_MASKED_STRIDED-NEXT: [[TMP12:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP12]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; @@ -3051,16 +2989,16 @@ ; ENABLED_MASKED_STRIDED-NEXT: [[WIDE_MASKED_VEC:%.*]] = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr [[TMP2]], i32 1, <16 x i1> [[INTERLEAVED_MASK]], <16 x i8> poison) ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> ; ENABLED_MASKED_STRIDED-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <16 x i8> [[WIDE_MASKED_VEC]], <16 x i8> poison, <8 x i32> -; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = or i32 [[TMP1]], 1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC3]]) -; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = sub <8 x i8> zeroinitializer, [[TMP5]] -; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP7]], i32 [[TMP4]] -; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], <16 x i32> -; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP8]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP3:%.*]] = or i32 [[TMP1]], 1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP4:%.*]] = call <8 x i8> @llvm.smax.v8i8(<8 x i8> [[STRIDED_VEC]], <8 x i8> [[STRIDED_VEC3]]) +; ENABLED_MASKED_STRIDED-NEXT: [[TMP5:%.*]] = sub <8 x i8> zeroinitializer, [[TMP4]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[Q:%.*]], i32 -1 +; ENABLED_MASKED_STRIDED-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP6]], i32 [[TMP3]] +; ENABLED_MASKED_STRIDED-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <16 x i32> +; ENABLED_MASKED_STRIDED-NEXT: call void @llvm.masked.store.v16i8.p0(<16 x i8> [[INTERLEAVED_VEC]], ptr [[TMP7]], i32 1, <16 x i1> [[INTERLEAVED_MASK]]) ; ENABLED_MASKED_STRIDED-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 8 -; ENABLED_MASKED_STRIDED-NEXT: [[TMP10:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP10]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]] +; ENABLED_MASKED_STRIDED-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; ENABLED_MASKED_STRIDED-NEXT: br i1 [[TMP8]], label [[FOR_END]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] ; ENABLED_MASKED_STRIDED: for.end: ; ENABLED_MASKED_STRIDED-NEXT: ret void ; diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll --- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll +++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll @@ -912,13 +912,15 @@ ; UNROLL-NO-IC-NEXT: entry: ; UNROLL-NO-IC-NEXT: br label [[FOR_COND1_PREHEADER:%.*]] ; UNROLL-NO-IC: for.cond1.preheader: -; UNROLL-NO-IC-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3:%.*]] ] +; UNROLL-NO-IC-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], [[FOR_COND_CLEANUP3:%.*]] ], [ 0, [[ENTRY:%.*]] ] +; UNROLL-NO-IC-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3]] ] ; UNROLL-NO-IC-NEXT: [[E_015:%.*]] = phi i32 [ poison, [[ENTRY]] ], [ [[E_1_LCSSA:%.*]], [[FOR_COND_CLEANUP3]] ] -; UNROLL-NO-IC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[I_016]], 8 +; UNROLL-NO-IC-NEXT: [[TMP0:%.*]] = add i32 [[INDVAR]], 1 +; UNROLL-NO-IC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 8 ; UNROLL-NO-IC-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL-NO-IC: vector.ph: -; UNROLL-NO-IC-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[I_016]], 8 -; UNROLL-NO-IC-NEXT: [[N_VEC:%.*]] = sub i32 [[I_016]], [[N_MOD_VF]] +; UNROLL-NO-IC-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 8 +; UNROLL-NO-IC-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]] ; UNROLL-NO-IC-NEXT: [[IND_END:%.*]] = sub i32 [[I_016]], [[N_VEC]] ; UNROLL-NO-IC-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[E_015]], i32 3 ; UNROLL-NO-IC-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[I_016]], i64 0 @@ -930,14 +932,14 @@ ; UNROLL-NO-IC-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[STEP_ADD:%.*]], [[VECTOR_BODY]] ] ; UNROLL-NO-IC-NEXT: [[VEC_IND:%.*]] = phi <4 x i32> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] ; UNROLL-NO-IC-NEXT: [[STEP_ADD]] = add <4 x i32> [[VEC_IND]], -; UNROLL-NO-IC-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> -; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VEC_IND]], <4 x i32> [[STEP_ADD]], <4 x i32> +; UNROLL-NO-IC-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> +; UNROLL-NO-IC-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32> [[VEC_IND]], <4 x i32> [[STEP_ADD]], <4 x i32> ; UNROLL-NO-IC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 ; UNROLL-NO-IC-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[STEP_ADD]], -; UNROLL-NO-IC-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; UNROLL-NO-IC-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] +; UNROLL-NO-IC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; UNROLL-NO-IC-NEXT: br i1 [[TMP3]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; UNROLL-NO-IC: middle.block: -; UNROLL-NO-IC-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[I_016]], [[N_VEC]] +; UNROLL-NO-IC-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]] ; UNROLL-NO-IC-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[STEP_ADD]], i32 3 ; UNROLL-NO-IC-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i32> [[STEP_ADD]], i32 2 ; UNROLL-NO-IC-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[SCALAR_PH]] @@ -958,35 +960,38 @@ ; UNROLL-NO-IC-NEXT: [[E_1_LCSSA]] = phi i32 [ [[SCALAR_RECUR]], [[FOR_COND1]] ], [ [[VECTOR_RECUR_EXTRACT_FOR_PHI]], [[MIDDLE_BLOCK]] ] ; UNROLL-NO-IC-NEXT: [[INC]] = add nuw nsw i32 [[I_016]], 1 ; UNROLL-NO-IC-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 49 +; UNROLL-NO-IC-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1 ; UNROLL-NO-IC-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]] ; ; UNROLL-NO-VF-LABEL: @PR27246( ; UNROLL-NO-VF-NEXT: entry: ; UNROLL-NO-VF-NEXT: br label [[FOR_COND1_PREHEADER:%.*]] ; UNROLL-NO-VF: for.cond1.preheader: -; UNROLL-NO-VF-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3:%.*]] ] +; UNROLL-NO-VF-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], [[FOR_COND_CLEANUP3:%.*]] ], [ 0, [[ENTRY:%.*]] ] +; UNROLL-NO-VF-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3]] ] ; UNROLL-NO-VF-NEXT: [[E_015:%.*]] = phi i32 [ poison, [[ENTRY]] ], [ [[E_1_LCSSA:%.*]], [[FOR_COND_CLEANUP3]] ] -; UNROLL-NO-VF-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[I_016]], 2 +; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = add i32 [[INDVAR]], 1 +; UNROLL-NO-VF-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 2 ; UNROLL-NO-VF-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; UNROLL-NO-VF: vector.ph: -; UNROLL-NO-VF-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[I_016]], 2 -; UNROLL-NO-VF-NEXT: [[N_VEC:%.*]] = sub i32 [[I_016]], [[N_MOD_VF]] +; UNROLL-NO-VF-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 2 +; UNROLL-NO-VF-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]] ; UNROLL-NO-VF-NEXT: [[IND_END:%.*]] = sub i32 [[I_016]], [[N_VEC]] ; UNROLL-NO-VF-NEXT: br label [[VECTOR_BODY:%.*]] ; UNROLL-NO-VF: vector.body: ; UNROLL-NO-VF-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; UNROLL-NO-VF-NEXT: [[VECTOR_RECUR:%.*]] = phi i32 [ [[E_015]], [[VECTOR_PH]] ], [ [[TMP1:%.*]], [[VECTOR_BODY]] ] ; UNROLL-NO-VF-NEXT: [[OFFSET_IDX:%.*]] = sub i32 [[I_016]], [[INDEX]] -; UNROLL-NO-VF-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0 -; UNROLL-NO-VF-NEXT: [[TMP1]] = add i32 [[OFFSET_IDX]], -1 +; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = add i32 [[OFFSET_IDX]], 0 +; UNROLL-NO-VF-NEXT: [[TMP3:%.*]] = add i32 [[OFFSET_IDX]], -1 ; UNROLL-NO-VF-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 -; UNROLL-NO-VF-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; UNROLL-NO-VF-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] +; UNROLL-NO-VF-NEXT: [[TMP1:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; UNROLL-NO-VF-NEXT: br i1 [[TMP1]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] ; UNROLL-NO-VF: middle.block: -; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[I_016]], [[N_VEC]] +; UNROLL-NO-VF-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]] ; UNROLL-NO-VF-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[SCALAR_PH]] ; UNROLL-NO-VF: scalar.ph: -; UNROLL-NO-VF-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[E_015]], [[FOR_COND1_PREHEADER]] ], [ [[TMP1]], [[MIDDLE_BLOCK]] ] +; UNROLL-NO-VF-NEXT: [[SCALAR_RECUR_INIT:%.*]] = phi i32 [ [[E_015]], [[FOR_COND1_PREHEADER]] ], [ [[TMP3]], [[MIDDLE_BLOCK]] ] ; UNROLL-NO-VF-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[I_016]], [[FOR_COND1_PREHEADER]] ] ; UNROLL-NO-VF-NEXT: br label [[FOR_COND1:%.*]] ; UNROLL-NO-VF: for.cond.cleanup: @@ -999,22 +1004,25 @@ ; UNROLL-NO-VF-NEXT: [[DEC]] = add nsw i32 [[K_0]], -1 ; UNROLL-NO-VF-NEXT: br i1 [[CMP2]], label [[FOR_COND1]], label [[FOR_COND_CLEANUP3]], !llvm.loop [[LOOP8:![0-9]+]] ; UNROLL-NO-VF: for.cond.cleanup3: -; UNROLL-NO-VF-NEXT: [[E_1_LCSSA]] = phi i32 [ [[SCALAR_RECUR]], [[FOR_COND1]] ], [ [[TMP0]], [[MIDDLE_BLOCK]] ] +; UNROLL-NO-VF-NEXT: [[E_1_LCSSA]] = phi i32 [ [[SCALAR_RECUR]], [[FOR_COND1]] ], [ [[TMP2]], [[MIDDLE_BLOCK]] ] ; UNROLL-NO-VF-NEXT: [[INC]] = add nuw nsw i32 [[I_016]], 1 ; UNROLL-NO-VF-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 49 +; UNROLL-NO-VF-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1 ; UNROLL-NO-VF-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]] ; ; SINK-AFTER-LABEL: @PR27246( ; SINK-AFTER-NEXT: entry: ; SINK-AFTER-NEXT: br label [[FOR_COND1_PREHEADER:%.*]] ; SINK-AFTER: for.cond1.preheader: -; SINK-AFTER-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3:%.*]] ] +; SINK-AFTER-NEXT: [[INDVAR:%.*]] = phi i32 [ [[INDVAR_NEXT:%.*]], [[FOR_COND_CLEANUP3:%.*]] ], [ 0, [[ENTRY:%.*]] ] +; SINK-AFTER-NEXT: [[I_016:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC:%.*]], [[FOR_COND_CLEANUP3]] ] ; SINK-AFTER-NEXT: [[E_015:%.*]] = phi i32 [ poison, [[ENTRY]] ], [ [[E_1_LCSSA:%.*]], [[FOR_COND_CLEANUP3]] ] -; SINK-AFTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[I_016]], 4 +; SINK-AFTER-NEXT: [[TMP0:%.*]] = add i32 [[INDVAR]], 1 +; SINK-AFTER-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP0]], 4 ; SINK-AFTER-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; SINK-AFTER: vector.ph: -; SINK-AFTER-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[I_016]], 4 -; SINK-AFTER-NEXT: [[N_VEC:%.*]] = sub i32 [[I_016]], [[N_MOD_VF]] +; SINK-AFTER-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP0]], 4 +; SINK-AFTER-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP0]], [[N_MOD_VF]] ; SINK-AFTER-NEXT: [[IND_END:%.*]] = sub i32 [[I_016]], [[N_VEC]] ; SINK-AFTER-NEXT: [[VECTOR_RECUR_INIT:%.*]] = insertelement <4 x i32> poison, i32 [[E_015]], i32 3 ; SINK-AFTER-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[I_016]], i64 0 @@ -1025,13 +1033,13 @@ ; SINK-AFTER-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; SINK-AFTER-NEXT: [[VECTOR_RECUR:%.*]] = phi <4 x i32> [ [[VECTOR_RECUR_INIT]], [[VECTOR_PH]] ], [ [[VEC_IND:%.*]], [[VECTOR_BODY]] ] ; SINK-AFTER-NEXT: [[VEC_IND]] = phi <4 x i32> [ [[INDUCTION]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] -; SINK-AFTER-NEXT: [[TMP0:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> +; SINK-AFTER-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VECTOR_RECUR]], <4 x i32> [[VEC_IND]], <4 x i32> ; SINK-AFTER-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4 ; SINK-AFTER-NEXT: [[VEC_IND_NEXT]] = add <4 x i32> [[VEC_IND]], -; SINK-AFTER-NEXT: [[TMP1:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; SINK-AFTER-NEXT: br i1 [[TMP1]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] +; SINK-AFTER-NEXT: [[TMP2:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; SINK-AFTER-NEXT: br i1 [[TMP2]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; SINK-AFTER: middle.block: -; SINK-AFTER-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[I_016]], [[N_VEC]] +; SINK-AFTER-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP0]], [[N_VEC]] ; SINK-AFTER-NEXT: [[VECTOR_RECUR_EXTRACT:%.*]] = extractelement <4 x i32> [[VEC_IND]], i32 3 ; SINK-AFTER-NEXT: [[VECTOR_RECUR_EXTRACT_FOR_PHI:%.*]] = extractelement <4 x i32> [[VEC_IND]], i32 2 ; SINK-AFTER-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[SCALAR_PH]] @@ -1052,6 +1060,7 @@ ; SINK-AFTER-NEXT: [[E_1_LCSSA]] = phi i32 [ [[SCALAR_RECUR]], [[FOR_COND1]] ], [ [[VECTOR_RECUR_EXTRACT_FOR_PHI]], [[MIDDLE_BLOCK]] ] ; SINK-AFTER-NEXT: [[INC]] = add nuw nsw i32 [[I_016]], 1 ; SINK-AFTER-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], 49 +; SINK-AFTER-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1 ; SINK-AFTER-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]] ; entry: diff --git a/llvm/test/Transforms/LoopVectorize/pr55100-expand-scev-predicate-used.ll b/llvm/test/Transforms/LoopVectorize/pr55100-expand-scev-predicate-used.ll --- a/llvm/test/Transforms/LoopVectorize/pr55100-expand-scev-predicate-used.ll +++ b/llvm/test/Transforms/LoopVectorize/pr55100-expand-scev-predicate-used.ll @@ -10,11 +10,8 @@ ; CHECK-NEXT: [[IV_1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_1_NEXT:%.*]], [[LOOP_1_LATCH:%.*]] ] ; CHECK-NEXT: [[TMP1:%.*]] = mul nuw nsw i32 [[IV_1]], -1 ; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], [[TMP1]] -; CHECK-NEXT: [[UMIN2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP2]], i32 18) -; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[UMIN2]], 1 -; CHECK-NEXT: [[TMP4:%.*]] = mul nuw nsw i32 [[IV_1]], -1 -; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP0]], [[TMP4]] -; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP5]], i32 18) +; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP2]], i32 18) +; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[UMIN]], 1 ; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[IV_1]], 10 ; CHECK-NEXT: br i1 [[C_2]], label [[LOOP_2_HEADER_PREHEADER:%.*]], label [[EXIT_LOOPEXIT1:%.*]] ; CHECK: loop.2.header.preheader: @@ -22,24 +19,21 @@ ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP3]], 2 -; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 -; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP6]], i32 2, i32 [[N_MOD_VF]] -; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP3]], [[TMP7]] +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[N_MOD_VF]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 2, i32 [[N_MOD_VF]] +; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP3]], [[TMP5]] ; CHECK-NEXT: [[IND_END:%.*]] = trunc i32 [[N_VEC]] to i16 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2 -; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] -; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] +; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]] +; CHECK-NEXT: br i1 [[TMP6]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: middle.block: ; CHECK-NEXT: br label [[SCALAR_PH]] ; CHECK: scalar.ph: ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[LOOP_2_HEADER_PREHEADER]] ] ; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]] -; CHECK: vector.scevcheck: -; CHECK-NEXT: [[TMP9:%.*]] = trunc i32 [[UMIN]] to i16 -; CHECK-NEXT: unreachable ; CHECK: loop.2.header: ; CHECK-NEXT: [[IV_2:%.*]] = phi i16 [ [[IV_2_NEXT:%.*]], [[LOOP_2_LATCH:%.*]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ] ; CHECK-NEXT: [[C_3:%.*]] = icmp slt i16 [[IV_2]], 18