Index: llvm/lib/Analysis/ValueTracking.cpp =================================================================== --- llvm/lib/Analysis/ValueTracking.cpp +++ llvm/lib/Analysis/ValueTracking.cpp @@ -4832,6 +4832,14 @@ switch (Opcode) { default: return true; + case Instruction::FDiv: + case Instruction::FRem: { + // x / y is undefined if y == 0.0. + const APFloat *V; + if (match(Inst->getOperand(1), m_APFloat(V))) + return V->isNonZero(); + return false; + } case Instruction::UDiv: case Instruction::URem: { // x / y is undefined if y == 0. Index: llvm/test/Transforms/CodeGenPrepare/X86/select.ll =================================================================== --- llvm/test/Transforms/CodeGenPrepare/X86/select.ll +++ llvm/test/Transforms/CodeGenPrepare/X86/select.ll @@ -14,6 +14,16 @@ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[X:%.*]], i32 [[Y:%.*]] ; CHECK-NEXT: ret i32 [[SEL]] ; +; DEBUG-LABEL: @no_sink( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[LOAD:%.*]] = load double, ptr [[B:%.*]], align 8, !dbg [[DBG15:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata double [[LOAD]], metadata [[META9:![0-9]+]], metadata !DIExpression()), !dbg [[DBG15]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp olt double [[LOAD]], [[A:%.*]], !dbg [[DBG16:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META11:![0-9]+]], metadata !DIExpression()), !dbg [[DBG16]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[X:%.*]], i32 [[Y:%.*]], !dbg [[DBG17:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[SEL]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG17]] +; DEBUG-NEXT: ret i32 [[SEL]], !dbg [[DBG18:![0-9]+]] +; entry: %load = load double, ptr %b, align 8 %cmp = fcmp olt double %load, %a @@ -27,30 +37,20 @@ define float @fdiv_true_sink(float %a, float %b) { ; CHECK-LABEL: @fdiv_true_sink( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[SEL_FR:%.*]] = freeze float [[A:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[SEL_FR]], 1.000000e+00 -; CHECK-NEXT: br i1 [[CMP]], label [[SELECT_TRUE_SINK:%.*]], label [[SELECT_END:%.*]] -; CHECK: select.true.sink: -; CHECK-NEXT: [[DIV:%.*]] = fdiv float [[A]], [[B:%.*]] -; CHECK-NEXT: br label [[SELECT_END]] -; CHECK: select.end: -; CHECK-NEXT: [[SEL:%.*]] = phi float [ [[DIV]], [[SELECT_TRUE_SINK]] ], [ 2.000000e+00, [[ENTRY:%.*]] ] +; CHECK-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 1.000000e+00 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV]], float 2.000000e+00 ; CHECK-NEXT: ret float [[SEL]] ; ; DEBUG-LABEL: @fdiv_true_sink( ; DEBUG-NEXT: entry: -; DEBUG-NEXT: [[SEL_FR:%.*]] = freeze float [[A:%.*]] -; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[SEL_FR]], 1.000000e+00, !dbg !24 -; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]] -; DEBUG-NEXT: br i1 [[CMP]], label [[SELECT_TRUE_SINK:%.*]], label [[SELECT_END:%.*]], !dbg -; DEBUG: select.true.sink: -; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A]], [[B:%.*]] -; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]] -; DEBUG-NEXT: br label [[SELECT_END]], !dbg -; DEBUG: select.end: -; DEBUG-NEXT: [[SEL:%.*]] = phi float [ [[DIV]], [[SELECT_TRUE_SINK]] ], [ 2.000000e+00, [[ENTRY:%.*]] ], !dbg -; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]] -; DEBUG-NEXT: ret float [[SEL]] +; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]], !dbg [[DBG24:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]], metadata [[META21:![0-9]+]], metadata !DIExpression()), !dbg [[DBG24]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 1.000000e+00, !dbg [[DBG25:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META22:![0-9]+]], metadata !DIExpression()), !dbg [[DBG25]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV]], float 2.000000e+00, !dbg [[DBG26:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META23:![0-9]+]], metadata !DIExpression()), !dbg [[DBG26]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG27:![0-9]+]] ; entry: %div = fdiv float %a, %b @@ -62,30 +62,20 @@ define float @fdiv_false_sink(float %a, float %b) { ; CHECK-LABEL: @fdiv_false_sink( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[SEL_FR:%.*]] = freeze float [[A:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[SEL_FR]], 3.000000e+00 -; CHECK-NEXT: br i1 [[CMP]], label [[SELECT_END:%.*]], label [[SELECT_FALSE_SINK:%.*]] -; CHECK: select.false.sink: -; CHECK-NEXT: [[DIV:%.*]] = fdiv float [[A]], [[B:%.*]] -; CHECK-NEXT: br label [[SELECT_END]] -; CHECK: select.end: -; CHECK-NEXT: [[SEL:%.*]] = phi float [ 4.000000e+00, [[ENTRY:%.*]] ], [ [[DIV]], [[SELECT_FALSE_SINK]] ] +; CHECK-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]] +; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 3.000000e+00 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float 4.000000e+00, float [[DIV]] ; CHECK-NEXT: ret float [[SEL]] ; ; DEBUG-LABEL: @fdiv_false_sink( ; DEBUG-NEXT: entry: -; DEBUG-NEXT: [[SEL_FR:%.*]] = freeze float [[A:%.*]] -; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[SEL_FR]], 3.000000e+00, !dbg !33 -; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]] -; DEBUG-NEXT: br i1 [[CMP]], label [[SELECT_END:%.*]], label [[SELECT_FALSE_SINK:%.*]], !dbg -; DEBUG: select.false.sink: -; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A]], [[B:%.*]] -; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]] -; DEBUG-NEXT: br label [[SELECT_END]], !dbg -; DEBUG: select.end: -; DEBUG-NEXT: [[SEL:%.*]] = phi float [ 4.000000e+00, [[ENTRY:%.*]] ], [ [[DIV]], [[SELECT_FALSE_SINK]] ], !dbg -; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]] -; DEBUG-NEXT: ret float [[SEL]], !dbg +; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]], !dbg [[DBG33:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]], metadata [[META30:![0-9]+]], metadata !DIExpression()), !dbg [[DBG33]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 3.000000e+00, !dbg [[DBG34:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META31:![0-9]+]], metadata !DIExpression()), !dbg [[DBG34]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float 4.000000e+00, float [[DIV]], !dbg [[DBG35:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META32:![0-9]+]], metadata !DIExpression()), !dbg [[DBG35]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG36:![0-9]+]] ; entry: %div = fdiv float %a, %b @@ -97,19 +87,24 @@ define float @fdiv_both_sink(float %a, float %b) { ; CHECK-LABEL: @fdiv_both_sink( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[SEL_FR:%.*]] = freeze float [[A:%.*]] -; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[SEL_FR]], 5.000000e+00 -; CHECK-NEXT: br i1 [[CMP]], label [[SELECT_TRUE_SINK:%.*]], label [[SELECT_FALSE_SINK:%.*]] -; CHECK: select.true.sink: -; CHECK-NEXT: [[DIV1:%.*]] = fdiv float [[A]], [[B:%.*]] -; CHECK-NEXT: br label [[SELECT_END:%.*]] -; CHECK: select.false.sink: +; CHECK-NEXT: [[DIV1:%.*]] = fdiv float [[A:%.*]], [[B:%.*]] ; CHECK-NEXT: [[DIV2:%.*]] = fdiv float [[B]], [[A]] -; CHECK-NEXT: br label [[SELECT_END]] -; CHECK: select.end: -; CHECK-NEXT: [[SEL:%.*]] = phi float [ [[DIV1]], [[SELECT_TRUE_SINK]] ], [ [[DIV2]], [[SELECT_FALSE_SINK]] ] +; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 5.000000e+00 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV1]], float [[DIV2]] ; CHECK-NEXT: ret float [[SEL]] ; +; DEBUG-LABEL: @fdiv_both_sink( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[DIV1:%.*]] = fdiv float [[A:%.*]], [[B:%.*]], !dbg [[DBG43:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV1]], metadata [[META39:![0-9]+]], metadata !DIExpression()), !dbg [[DBG43]] +; DEBUG-NEXT: [[DIV2:%.*]] = fdiv float [[B]], [[A]], !dbg [[DBG44:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV2]], metadata [[META40:![0-9]+]], metadata !DIExpression()), !dbg [[DBG44]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 5.000000e+00, !dbg [[DBG45:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META41:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV1]], float [[DIV2]], !dbg [[DBG46:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG47:![0-9]+]] +; entry: %div1 = fdiv float %a, %b %div2 = fdiv float %b, %a @@ -128,6 +123,16 @@ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV]], float 2.000000e+00, !unpredictable !0 ; CHECK-NEXT: ret float [[SEL]] ; +; DEBUG-LABEL: @unpredictable_select( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]], !dbg [[DBG53:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]], metadata [[META50:![0-9]+]], metadata !DIExpression()), !dbg [[DBG53]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 1.000000e+00, !dbg [[DBG54:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META51:![0-9]+]], metadata !DIExpression()), !dbg [[DBG54]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[DIV]], float 2.000000e+00, !dbg [[DBG55:![0-9]+]], !unpredictable !7 +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META52:![0-9]+]], metadata !DIExpression()), !dbg [[DBG55]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG56:![0-9]+]] +; entry: %div = fdiv float %a, %b %cmp = fcmp ogt float %a, 1.0 @@ -145,6 +150,15 @@ ; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt float 6.000000e+00, [[A]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[ADD]], float 7.000000e+00 ; CHECK-NEXT: ret float [[SEL]] +; +; DEBUG-LABEL: @fadd_no_sink( +; DEBUG-NEXT: [[ADD:%.*]] = fadd float [[A:%.*]], [[B:%.*]], !dbg [[DBG62:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[ADD]], metadata [[META59:![0-9]+]], metadata !DIExpression()), !dbg [[DBG62]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float 6.000000e+00, [[A]], !dbg [[DBG63:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META60:![0-9]+]], metadata !DIExpression()), !dbg [[DBG63]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[ADD]], float 7.000000e+00, !dbg [[DBG64:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META61:![0-9]+]], metadata !DIExpression()), !dbg [[DBG64]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG65:![0-9]+]] ; %add = fadd float %a, %b %cmp = fcmp ogt float 6.0, %a @@ -165,6 +179,18 @@ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[ADD]], float 8.000000e+00 ; CHECK-NEXT: ret float [[SEL]] ; +; DEBUG-LABEL: @fdiv_no_sink( +; DEBUG-NEXT: entry: +; DEBUG-NEXT: [[DIV:%.*]] = fdiv float [[A:%.*]], [[B:%.*]], !dbg [[DBG72:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[DIV]], metadata [[META68:![0-9]+]], metadata !DIExpression()), !dbg [[DBG72]] +; DEBUG-NEXT: [[ADD:%.*]] = fadd float [[DIV]], [[B]], !dbg [[DBG73:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[ADD]], metadata [[META69:![0-9]+]], metadata !DIExpression()), !dbg [[DBG73]] +; DEBUG-NEXT: [[CMP:%.*]] = fcmp ogt float [[A]], 1.000000e+00, !dbg [[DBG74:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META70:![0-9]+]], metadata !DIExpression()), !dbg [[DBG74]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], float [[ADD]], float 8.000000e+00, !dbg [[DBG75:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata float [[SEL]], metadata [[META71:![0-9]+]], metadata !DIExpression()), !dbg [[DBG75]] +; DEBUG-NEXT: ret float [[SEL]], !dbg [[DBG76:![0-9]+]] +; entry: %div = fdiv float %a, %b %add = fadd float %div, %b @@ -185,6 +211,17 @@ ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[IN:%.*]], 0 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TOBOOL]], ptr [[CALL1]], ptr [[CALL2]] ; CHECK-NEXT: ret ptr [[SEL]] +; +; DEBUG-LABEL: @calls_no_sink( +; DEBUG-NEXT: [[CALL1:%.*]] = call ptr @bar(i32 1, i32 2, i32 3), !dbg [[DBG83:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata ptr [[CALL1]], metadata [[META79:![0-9]+]], metadata !DIExpression()), !dbg [[DBG83]] +; DEBUG-NEXT: [[CALL2:%.*]] = call ptr @baz(i32 1, i32 2, i32 3), !dbg [[DBG84:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata ptr [[CALL2]], metadata [[META80:![0-9]+]], metadata !DIExpression()), !dbg [[DBG84]] +; DEBUG-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[IN:%.*]], 0, !dbg [[DBG85:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[TOBOOL]], metadata [[META81:![0-9]+]], metadata !DIExpression()), !dbg [[DBG85]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[TOBOOL]], ptr [[CALL1]], ptr [[CALL2]], !dbg [[DBG86:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata ptr [[SEL]], metadata [[META82:![0-9]+]], metadata !DIExpression()), !dbg [[DBG86]] +; DEBUG-NEXT: ret ptr [[SEL]], !dbg [[DBG87:![0-9]+]] ; %call1 = call ptr @bar(i32 1, i32 2, i32 3) %call2 = call ptr @baz(i32 1, i32 2, i32 3) @@ -200,6 +237,17 @@ ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 5 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[DIV1]], i32 [[DIV2]] ; CHECK-NEXT: ret i32 [[SEL]] +; +; DEBUG-LABEL: @sdiv_no_sink( +; DEBUG-NEXT: [[DIV1:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]], !dbg [[DBG94:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[DIV1]], metadata [[META90:![0-9]+]], metadata !DIExpression()), !dbg [[DBG94]] +; DEBUG-NEXT: [[DIV2:%.*]] = sdiv i32 [[B]], [[A]], !dbg [[DBG95:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[DIV2]], metadata [[META91:![0-9]+]], metadata !DIExpression()), !dbg [[DBG95]] +; DEBUG-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 5, !dbg [[DBG96:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i1 [[CMP]], metadata [[META92:![0-9]+]], metadata !DIExpression()), !dbg [[DBG96]] +; DEBUG-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[DIV1]], i32 [[DIV2]], !dbg [[DBG97:![0-9]+]] +; DEBUG-NEXT: call void @llvm.dbg.value(metadata i32 [[SEL]], metadata [[META93:![0-9]+]], metadata !DIExpression()), !dbg [[DBG97]] +; DEBUG-NEXT: ret i32 [[SEL]], !dbg [[DBG98:![0-9]+]] ; %div1 = sdiv i32 %a, %b %div2 = sdiv i32 %b, %a Index: llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll =================================================================== --- llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll +++ llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll @@ -231,8 +231,8 @@ ; CHECK-LABEL: @test13a( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X2:%.*]], i64 0 ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X1:%.*]], i64 1 -; CHECK-NEXT: [[TMP3:%.*]] = add <2 x i8> [[TMP2]], -; CHECK-NEXT: ret <2 x i8> [[TMP3]] +; CHECK-NEXT: [[D:%.*]] = add <2 x i8> [[TMP2]], +; CHECK-NEXT: ret <2 x i8> [[D]] ; %A = insertelement <2 x i8> poison, i8 %x1, i32 0 %B = insertelement <2 x i8> %A, i8 %x2, i32 1 @@ -280,8 +280,8 @@ define <3 x i8> @fold_inselts_with_widening_shuffle(i8 %x, i8 %y) { ; CHECK-LABEL: @fold_inselts_with_widening_shuffle( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <3 x i8> undef, i8 [[X:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i64 1 -; CHECK-NEXT: ret <3 x i8> [[TMP2]] +; CHECK-NEXT: [[WIDEN:%.*]] = insertelement <3 x i8> [[TMP1]], i8 [[Y:%.*]], i64 1 +; CHECK-NEXT: ret <3 x i8> [[WIDEN]] ; %ins0 = insertelement <2 x i8> poison, i8 %x, i32 0 %ins1 = insertelement <2 x i8> %ins0, i8 %y, i32 1 @@ -302,8 +302,8 @@ define <2 x i8> @test13c(i8 %x1, i8 %x2) { ; CHECK-LABEL: @test13c( ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i8> undef, i8 [[X1:%.*]], i64 0 -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 1 -; CHECK-NEXT: ret <2 x i8> [[TMP2]] +; CHECK-NEXT: [[C:%.*]] = insertelement <2 x i8> [[TMP1]], i8 [[X2:%.*]], i64 1 +; CHECK-NEXT: ret <2 x i8> [[C]] ; %A = insertelement <4 x i8> poison, i8 %x1, i32 0 %B = insertelement <4 x i8> %A, i8 %x2, i32 2 @@ -423,9 +423,9 @@ define <2 x float> @shuffle_fdiv_multiuse(<2 x float> %v1, <2 x float> %v2) { ; CHECK-LABEL: @shuffle_fdiv_multiuse( +; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V1:%.*]], <2 x float> poison, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = shufflevector <2 x float> [[V2:%.*]], <2 x float> poison, <2 x i32> -; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> [[V1:%.*]], [[V2]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> +; CHECK-NEXT: [[R:%.*]] = fdiv <2 x float> [[T1]], [[T2]] ; CHECK-NEXT: call void @use(<2 x float> [[T2]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; @@ -1299,8 +1299,8 @@ define <2 x float> @fdiv_splat_constant0(<2 x float> %x) { ; CHECK-LABEL: @fdiv_splat_constant0( -; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> , [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x float> [[X:%.*]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = fdiv <2 x float> , [[SPLAT]] ; CHECK-NEXT: ret <2 x float> [[R]] ; %splat = shufflevector <2 x float> %x, <2 x float> poison, <2 x i32> zeroinitializer @@ -1321,8 +1321,8 @@ define <2 x float> @frem_splat_constant0(<2 x float> %x) { ; CHECK-LABEL: @frem_splat_constant0( -; CHECK-NEXT: [[TMP1:%.*]] = frem <2 x float> , [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x float> [[X:%.*]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = frem <2 x float> , [[SPLAT]] ; CHECK-NEXT: ret <2 x float> [[R]] ; %splat = shufflevector <2 x float> %x, <2 x float> poison, <2 x i32> zeroinitializer Index: llvm/test/Transforms/InstCombine/vec_shuffle.ll =================================================================== --- llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -430,9 +430,9 @@ define <2 x float> @shuffle_fdiv_multiuse(<2 x float> %v1, <2 x float> %v2) { ; CHECK-LABEL: @shuffle_fdiv_multiuse( +; CHECK-NEXT: [[T1:%.*]] = shufflevector <2 x float> [[V1:%.*]], <2 x float> undef, <2 x i32> ; CHECK-NEXT: [[T2:%.*]] = shufflevector <2 x float> [[V2:%.*]], <2 x float> undef, <2 x i32> -; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> [[V1:%.*]], [[V2]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> +; CHECK-NEXT: [[R:%.*]] = fdiv <2 x float> [[T1]], [[T2]] ; CHECK-NEXT: call void @use(<2 x float> [[T2]]) ; CHECK-NEXT: ret <2 x float> [[R]] ; @@ -1306,8 +1306,8 @@ define <2 x float> @fdiv_splat_constant0(<2 x float> %x) { ; CHECK-LABEL: @fdiv_splat_constant0( -; CHECK-NEXT: [[TMP1:%.*]] = fdiv <2 x float> , [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x float> [[X:%.*]], <2 x float> undef, <2 x i32> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = fdiv <2 x float> , [[SPLAT]] ; CHECK-NEXT: ret <2 x float> [[R]] ; %splat = shufflevector <2 x float> %x, <2 x float> undef, <2 x i32> zeroinitializer @@ -1328,8 +1328,8 @@ define <2 x float> @frem_splat_constant0(<2 x float> %x) { ; CHECK-LABEL: @frem_splat_constant0( -; CHECK-NEXT: [[TMP1:%.*]] = frem <2 x float> , [[X:%.*]] -; CHECK-NEXT: [[R:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[SPLAT:%.*]] = shufflevector <2 x float> [[X:%.*]], <2 x float> undef, <2 x i32> zeroinitializer +; CHECK-NEXT: [[R:%.*]] = frem <2 x float> , [[SPLAT]] ; CHECK-NEXT: ret <2 x float> [[R]] ; %splat = shufflevector <2 x float> %x, <2 x float> undef, <2 x i32> zeroinitializer Index: llvm/test/Transforms/PGOProfile/chr.ll =================================================================== --- llvm/test/Transforms/PGOProfile/chr.ll +++ llvm/test/Transforms/PGOProfile/chr.ll @@ -1116,31 +1116,19 @@ ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I:%.*]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 1 -; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 +; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[BB0:%.*]], !prof [[PROF16]] +; CHECK: bb0: +; CHECK-NEXT: call void @foo() +; CHECK-NEXT: br label [[BB1]] +; CHECK: bb1: ; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to double ; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.000000e+00, [[CONV]] ; CHECK-NEXT: [[MUL16:%.*]] = fmul double [[DIV]], [[CONV]] ; CHECK-NEXT: [[CONV717:%.*]] = fptosi double [[MUL16]] to i32 -; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CONV717]], 0 -; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i1 [[CMP18]], i1 false -; CHECK-NEXT: br i1 [[TMP3]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof [[PROF15]] -; CHECK: bb0: -; CHECK-NEXT: call void @foo() -; CHECK-NEXT: call void @foo() -; CHECK-NEXT: br label [[BB3:%.*]] -; CHECK: entry.split.nonchr: -; CHECK-NEXT: br i1 [[TMP2]], label [[BB0_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof [[PROF18:![0-9]+]] -; CHECK: bb0.nonchr: -; CHECK-NEXT: call void @foo() -; CHECK-NEXT: br label [[BB1_NONCHR]] -; CHECK: bb1.nonchr: -; CHECK-NEXT: [[CONV_NONCHR:%.*]] = sitofp i32 [[TMP0]] to double -; CHECK-NEXT: [[DIV_NONCHR:%.*]] = fdiv double 1.000000e+00, [[CONV_NONCHR]] -; CHECK-NEXT: [[MUL16_NONCHR:%.*]] = fmul double [[DIV_NONCHR]], [[CONV_NONCHR]] -; CHECK-NEXT: [[CONV717_NONCHR:%.*]] = fptosi double [[MUL16_NONCHR]] to i32 -; CHECK-NEXT: [[CMP18_NONCHR:%.*]] = icmp slt i32 [[CONV717_NONCHR]], 1 -; CHECK-NEXT: br i1 [[CMP18_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof [[PROF16]] -; CHECK: bb2.nonchr: +; CHECK-NEXT: [[CMP18:%.*]] = icmp slt i32 [[CONV717]], 1 +; CHECK-NEXT: br i1 [[CMP18]], label [[BB3:%.*]], label [[BB2:%.*]], !prof [[PROF16]] +; CHECK: bb2: ; CHECK-NEXT: call void @foo() ; CHECK-NEXT: br label [[BB3]] ; CHECK: bb3: @@ -1200,7 +1188,7 @@ ; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM2]], 88 ; CHECK-NEXT: br label [[BB3]] ; CHECK: bb0.split.nonchr: -; CHECK-NEXT: br i1 [[TMP10]], label [[BB1_NONCHR:%.*]], label [[BB3]], !prof [[PROF18]] +; CHECK-NEXT: br i1 [[TMP10]], label [[BB1_NONCHR:%.*]], label [[BB3]], !prof [[PROF18:![0-9]+]] ; CHECK: bb1.nonchr: ; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[DOTFR1]], 8 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0 Index: llvm/test/Transforms/Reassociate/2019-08-22-FNegAssert.ll =================================================================== --- llvm/test/Transforms/Reassociate/2019-08-22-FNegAssert.ll +++ llvm/test/Transforms/Reassociate/2019-08-22-FNegAssert.ll @@ -10,7 +10,7 @@ ; CHECK-NEXT: [[TMP3:%.*]] = fadd fast float [[TMP2_NEG]], [[TMP1]] ; CHECK-NEXT: [[TMP4:%.*]] = fmul fast float [[TMP3]], [[TMP3]] ; CHECK-NEXT: [[TMP6:%.*]] = fdiv fast float [[TMP5]], [[ARG1:%.*]] -; CHECK-NEXT: [[TMP7:%.*]] = fadd fast float [[TMP4]], [[TMP6]] +; CHECK-NEXT: [[TMP7:%.*]] = fadd fast float [[TMP6]], [[TMP4]] ; CHECK-NEXT: ret float [[TMP7]] ; %tmp1 = fsub fast float %arg3, %arg2 Index: llvm/test/Transforms/Reassociate/canonicalize-neg-const.ll =================================================================== --- llvm/test/Transforms/Reassociate/canonicalize-neg-const.ll +++ llvm/test/Transforms/Reassociate/canonicalize-neg-const.ll @@ -6,8 +6,8 @@ ; CHECK-LABEL: @test1( ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[Y:%.*]], 1.234000e-01 ; CHECK-NEXT: [[ADD:%.*]] = fadd double [[X:%.*]], [[MUL]] -; CHECK-NEXT: [[ADD21:%.*]] = fsub double [[X]], [[MUL]] -; CHECK-NEXT: [[MUL3:%.*]] = fmul double [[ADD]], [[ADD21]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X]], [[MUL]] +; CHECK-NEXT: [[MUL3:%.*]] = fmul double [[ADD]], [[TMP1]] ; CHECK-NEXT: ret double [[MUL3]] ; %mul = fmul double 1.234000e-01, %y @@ -22,8 +22,8 @@ define double @test2(double %x, double %y) { ; CHECK-LABEL: @test2( ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[Y:%.*]], 1.234000e-01 -; CHECK-NEXT: [[ADD1:%.*]] = fsub double [[X:%.*]], [[MUL]] -; CHECK-NEXT: [[MUL3:%.*]] = fmul double [[ADD1]], [[ADD1]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X:%.*]], [[MUL]] +; CHECK-NEXT: [[MUL3:%.*]] = fmul double [[TMP1]], [[TMP1]] ; CHECK-NEXT: ret double [[MUL3]] ; %mul = fmul double %y, -1.234000e-01 @@ -54,8 +54,8 @@ define double @test5(double %x, double %y) { ; CHECK-LABEL: @test5( ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[Y:%.*]], 1.234000e-01 -; CHECK-NEXT: [[SUB1:%.*]] = fadd double [[X:%.*]], [[MUL]] -; CHECK-NEXT: ret double [[SUB1]] +; CHECK-NEXT: [[TMP1:%.*]] = fadd double [[X:%.*]], [[MUL]] +; CHECK-NEXT: ret double [[TMP1]] ; %mul = fmul double -1.234000e-01, %y %sub = fsub double %x, %mul @@ -78,8 +78,8 @@ define double @test7(double %x, double %y) { ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[Y:%.*]], 1.234000e-01 -; CHECK-NEXT: [[ADD1:%.*]] = fsub double [[X:%.*]], [[MUL]] -; CHECK-NEXT: ret double [[ADD1]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X:%.*]], [[MUL]] +; CHECK-NEXT: ret double [[TMP1]] ; %mul = fmul double -1.234000e-01, %y %add = fadd double %mul, %x @@ -90,8 +90,8 @@ define double @test8(double %x, double %y) { ; CHECK-LABEL: @test8( ; CHECK-NEXT: [[MUL:%.*]] = fmul double [[Y:%.*]], 1.234000e-01 -; CHECK-NEXT: [[ADD1:%.*]] = fsub double [[X:%.*]], [[MUL]] -; CHECK-NEXT: ret double [[ADD1]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X:%.*]], [[MUL]] +; CHECK-NEXT: ret double [[TMP1]] ; %mul = fmul double %y, -1.234000e-01 %add = fadd double %mul, %x @@ -102,8 +102,8 @@ define double @test9(double %x, double %y) { ; CHECK-LABEL: @test9( ; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.234000e-01, [[Y:%.*]] -; CHECK-NEXT: [[SUB1:%.*]] = fadd double [[X:%.*]], [[DIV]] -; CHECK-NEXT: ret double [[SUB1]] +; CHECK-NEXT: [[TMP1:%.*]] = fadd double [[X:%.*]], [[DIV]] +; CHECK-NEXT: ret double [[TMP1]] ; %div = fdiv double -1.234000e-01, %y %sub = fsub double %x, %div @@ -126,8 +126,8 @@ define double @test11(double %x, double %y) { ; CHECK-LABEL: @test11( ; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.234000e-01, [[Y:%.*]] -; CHECK-NEXT: [[ADD1:%.*]] = fsub double [[X:%.*]], [[DIV]] -; CHECK-NEXT: ret double [[ADD1]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X:%.*]], [[DIV]] +; CHECK-NEXT: ret double [[TMP1]] ; %div = fdiv double -1.234000e-01, %y %add = fadd double %div, %x @@ -138,8 +138,8 @@ define double @test12(double %x, double %y) { ; CHECK-LABEL: @test12( ; CHECK-NEXT: [[DIV:%.*]] = fdiv double [[Y:%.*]], 1.234000e-01 -; CHECK-NEXT: [[ADD1:%.*]] = fsub double [[X:%.*]], [[DIV]] -; CHECK-NEXT: ret double [[ADD1]] +; CHECK-NEXT: [[TMP1:%.*]] = fsub double [[X:%.*]], [[DIV]] +; CHECK-NEXT: ret double [[TMP1]] ; %div = fdiv double %y, -1.234000e-01 %add = fadd double %div, %x @@ -381,7 +381,7 @@ define double @fadd_mix_neg_const2(double %a, double %b, double %c) { ; CHECK-LABEL: @fadd_mix_neg_const2( ; CHECK-NEXT: [[DIV0:%.*]] = fdiv double 3.000000e+00, [[A:%.*]] -; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[DIV0]], [[B:%.*]] +; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[B:%.*]], [[DIV0]] ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[MUL1]], 5.000000e+00 ; CHECK-NEXT: [[ADD:%.*]] = fadd double [[A]], [[DIV2]] ; CHECK-NEXT: ret double [[ADD]] @@ -440,7 +440,7 @@ define double @fsub_mix_neg_const3(double %a, double %b, double %c) { ; CHECK-LABEL: @fsub_mix_neg_const3( ; CHECK-NEXT: [[DIV0:%.*]] = fdiv double 3.000000e+00, [[A:%.*]] -; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[DIV0]], [[B:%.*]] +; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[B:%.*]], [[DIV0]] ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[MUL1]], 7.000000e+00 ; CHECK-NEXT: [[MUL3:%.*]] = fmul double [[DIV2]], 5.000000e+00 ; CHECK-NEXT: [[TMP1:%.*]] = fadd double [[C:%.*]], [[MUL3]] @@ -474,7 +474,7 @@ define double @fadd_both_ops_mix_neg_const2(double %a, double %b, double %c) { ; CHECK-LABEL: @fadd_both_ops_mix_neg_const2( ; CHECK-NEXT: [[DIV0:%.*]] = fdiv double 3.000000e+00, [[A:%.*]] -; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[DIV0]], [[B:%.*]] +; CHECK-NEXT: [[MUL1:%.*]] = fmul double [[B:%.*]], [[DIV0]] ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[MUL1]], 7.000000e+00 ; CHECK-NEXT: [[DIV3:%.*]] = fdiv double 5.000000e+00, [[C:%.*]] ; CHECK-NEXT: [[MUL4:%.*]] = fmul double [[B]], [[DIV3]] Index: llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll =================================================================== --- llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll +++ llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll @@ -4,20 +4,12 @@ define void @exceed(double %0, double %1) { ; CHECK-LABEL: @exceed( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[TMP0:%.*]], i32 0 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> zeroinitializer -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[TMP1:%.*]], i32 0 -; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <2 x i32> zeroinitializer -; CHECK-NEXT: [[TMP4:%.*]] = fdiv fast <2 x double> [[SHUFFLE]], [[SHUFFLE1]] -; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x double> [[TMP4]], i32 1 -; CHECK-NEXT: [[IX:%.*]] = fmul double [[TMP5]], undef ; CHECK-NEXT: [[IXX0:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX1:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX2:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX3:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX4:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX5:%.*]] = fsub double undef, undef -; CHECK-NEXT: [[IX1:%.*]] = fmul double [[TMP5]], undef ; CHECK-NEXT: [[IXX10:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX11:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX12:%.*]] = fsub double undef, undef @@ -27,16 +19,24 @@ ; CHECK-NEXT: [[IXX20:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX21:%.*]] = fsub double undef, undef ; CHECK-NEXT: [[IXX22:%.*]] = fsub double undef, undef -; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x double> [[TMP4]], i32 0 -; CHECK-NEXT: [[IX2:%.*]] = fmul double [[TMP6]], [[TMP6]] -; CHECK-NEXT: [[TMP7:%.*]] = fadd fast <2 x double> [[SHUFFLE]], [[SHUFFLE1]] -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> [[TMP2]], double [[TMP1]], i32 1 -; CHECK-NEXT: [[TMP9:%.*]] = fadd fast <2 x double> [[TMP4]], [[TMP8]] -; CHECK-NEXT: [[TMP10:%.*]] = fmul fast <2 x double> [[TMP9]], [[TMP7]] +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[TMP0:%.*]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> poison, double [[TMP1:%.*]], i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> poison, <2 x i32> zeroinitializer +; CHECK-NEXT: [[TMP6:%.*]] = fadd fast <2 x double> [[TMP3]], [[TMP5]] +; CHECK-NEXT: [[TMP7:%.*]] = fdiv fast <2 x double> [[TMP3]], [[TMP5]] +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 1 +; CHECK-NEXT: [[IX:%.*]] = fmul double [[TMP8]], undef +; CHECK-NEXT: [[IX1:%.*]] = fmul double [[TMP8]], undef +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 0 +; CHECK-NEXT: [[IX2:%.*]] = fmul double [[TMP9]], [[TMP9]] +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x double> [[TMP2]], double [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP11:%.*]] = fadd fast <2 x double> [[TMP7]], [[TMP10]] +; CHECK-NEXT: [[TMP12:%.*]] = fmul fast <2 x double> [[TMP11]], [[TMP6]] ; CHECK-NEXT: [[IXX101:%.*]] = fsub double undef, undef -; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x double> poison, double [[TMP1]], i32 1 -; CHECK-NEXT: [[TMP12:%.*]] = shufflevector <2 x double> [[TMP11]], <2 x double> [[TMP4]], <2 x i32> -; CHECK-NEXT: [[TMP13:%.*]] = fmul fast <2 x double> [[TMP12]], undef +; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x double> poison, double [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <2 x double> [[TMP13]], <2 x double> [[TMP7]], <2 x i32> +; CHECK-NEXT: [[TMP15:%.*]] = fmul fast <2 x double> [[TMP14]], undef ; CHECK-NEXT: switch i32 undef, label [[BB1:%.*]] [ ; CHECK-NEXT: i32 0, label [[BB2:%.*]] ; CHECK-NEXT: ] @@ -45,7 +45,7 @@ ; CHECK: bb2: ; CHECK-NEXT: br label [[LABEL]] ; CHECK: label: -; CHECK-NEXT: [[TMP14:%.*]] = phi <2 x double> [ [[TMP10]], [[BB1]] ], [ [[TMP13]], [[BB2]] ] +; CHECK-NEXT: [[TMP16:%.*]] = phi <2 x double> [ [[TMP12]], [[BB1]] ], [ [[TMP15]], [[BB2]] ] ; CHECK-NEXT: ret void ; entry: Index: llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll =================================================================== --- llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll +++ llvm/test/Transforms/SLPVectorizer/X86/reuse-extracts-in-wider-vect.ll @@ -10,14 +10,14 @@ ; CHECK-NEXT: [[T8:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[T4]], i64 0, i32 1 ; CHECK-NEXT: [[T9:%.*]] = getelementptr inbounds [3 x float], ptr [[T8]], i64 1, i64 0 ; CHECK-NEXT: [[T14:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[T4]], i64 0, i32 1, i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = load <2 x float>, ptr [[T14]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load <2 x float>, ptr [[T14]], align 4 ; CHECK-NEXT: br label [[T37:%.*]] ; CHECK: t37: -; CHECK-NEXT: [[TMP6:%.*]] = phi <2 x float> [ [[TMP5]], [[TMP3:%.*]] ], [ [[T89:%.*]], [[T37]] ] -; CHECK-NEXT: [[TMP7:%.*]] = fdiv fast <2 x float> , [[TMP6]] -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[TMP7]], <2 x float> poison, <4 x i32> +; CHECK-NEXT: [[TMP5:%.*]] = phi <2 x float> [ [[TMP4]], [[TMP3:%.*]] ], [ [[T89:%.*]], [[T37]] ] ; CHECK-NEXT: [[T21:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[T4]], i64 0, i32 2, i64 0 -; CHECK-NEXT: store <4 x float> [[SHUFFLE]], ptr [[T21]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = fdiv fast <2 x float> , [[TMP5]] +; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <2 x float> [[TMP6]], <2 x float> poison, <4 x i32> +; CHECK-NEXT: store <4 x float> [[TMP7]], ptr [[T21]], align 4 ; CHECK-NEXT: [[T89]] = load <2 x float>, ptr [[T9]], align 4 ; CHECK-NEXT: br i1 undef, label [[T37]], label [[T55:%.*]] ; CHECK: t55: Index: llvm/test/Transforms/SimplifyCFG/ARM/speculate-math.ll =================================================================== --- llvm/test/Transforms/SimplifyCFG/ARM/speculate-math.ll +++ llvm/test/Transforms/SimplifyCFG/ARM/speculate-math.ll @@ -16,22 +16,34 @@ ; CHECK-MVE-LABEL: @fdiv_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00 +; CHECK-MVE-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]] +; CHECK-MVE: cond.true: ; CHECK-MVE-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]] -; CHECK-MVE-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00 +; CHECK-MVE-NEXT: br label [[COND_END]] +; CHECK-MVE: cond.end: +; CHECK-MVE-NEXT: [[COND:%.*]] = phi nsz double [ [[DIV]], [[COND_TRUE]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-MVE-NEXT: ret double [[COND]] ; ; CHECK-V8M-MAIN-LABEL: @fdiv_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00 +; CHECK-V8M-MAIN-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]] +; CHECK-V8M-MAIN: cond.true: ; CHECK-V8M-MAIN-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]] -; CHECK-V8M-MAIN-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00 +; CHECK-V8M-MAIN-NEXT: br label [[COND_END]] +; CHECK-V8M-MAIN: cond.end: +; CHECK-V8M-MAIN-NEXT: [[COND:%.*]] = phi nsz double [ [[DIV]], [[COND_TRUE]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-V8M-MAIN-NEXT: ret double [[COND]] ; ; CHECK-V8M-BASE-LABEL: @fdiv_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00 +; CHECK-V8M-BASE-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]] +; CHECK-V8M-BASE: cond.true: ; CHECK-V8M-BASE-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]] -; CHECK-V8M-BASE-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00 +; CHECK-V8M-BASE-NEXT: br label [[COND_END]] +; CHECK-V8M-BASE: cond.end: +; CHECK-V8M-BASE-NEXT: [[COND:%.*]] = phi nsz double [ [[DIV]], [[COND_TRUE]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-V8M-BASE-NEXT: ret double [[COND]] ; entry: @@ -51,7 +63,7 @@ ; CHECK-MVE-LABEL: @sqrt_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #[[ATTR3:[0-9]+]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -59,7 +71,7 @@ ; CHECK-V8M-MAIN-LABEL: @sqrt_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #[[ATTR2:[0-9]+]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -67,7 +79,7 @@ ; CHECK-V8M-BASE-LABEL: @sqrt_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #[[ATTR2:[0-9]+]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -90,7 +102,7 @@ ; CHECK-MVE-LABEL: @fabs_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -98,7 +110,7 @@ ; CHECK-V8M-MAIN-LABEL: @fabs_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -106,7 +118,7 @@ ; CHECK-V8M-BASE-LABEL: @fabs_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -129,7 +141,7 @@ ; CHECK-MVE-LABEL: @fma_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -137,7 +149,7 @@ ; CHECK-V8M-MAIN-LABEL: @fma_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -145,7 +157,7 @@ ; CHECK-V8M-BASE-LABEL: @fma_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -168,7 +180,7 @@ ; CHECK-MVE-LABEL: @fmuladd_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -176,7 +188,7 @@ ; CHECK-V8M-MAIN-LABEL: @fmuladd_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -184,7 +196,7 @@ ; CHECK-V8M-BASE-LABEL: @fmuladd_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -207,7 +219,7 @@ ; CHECK-MVE-LABEL: @minnum_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -215,7 +227,7 @@ ; CHECK-V8M-MAIN-LABEL: @minnum_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -223,7 +235,7 @@ ; CHECK-V8M-BASE-LABEL: @minnum_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -246,7 +258,7 @@ ; CHECK-MVE-LABEL: @maxnum_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -254,7 +266,7 @@ ; CHECK-V8M-MAIN-LABEL: @maxnum_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -262,7 +274,7 @@ ; CHECK-V8M-BASE-LABEL: @maxnum_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -285,7 +297,7 @@ ; CHECK-MVE-LABEL: @minimum_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -293,7 +305,7 @@ ; CHECK-V8M-MAIN-LABEL: @minimum_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -301,7 +313,7 @@ ; CHECK-V8M-BASE-LABEL: @minimum_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void @@ -324,7 +336,7 @@ ; CHECK-MVE-LABEL: @maximum_test( ; CHECK-MVE-NEXT: entry: ; CHECK-MVE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #3 +; CHECK-MVE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #[[ATTR3]] ; CHECK-MVE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-MVE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-MVE-NEXT: ret void @@ -332,7 +344,7 @@ ; CHECK-V8M-MAIN-LABEL: @maximum_test( ; CHECK-V8M-MAIN-NEXT: entry: ; CHECK-V8M-MAIN-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-MAIN-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-MAIN-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-MAIN-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-MAIN-NEXT: ret void @@ -340,7 +352,7 @@ ; CHECK-V8M-BASE-LABEL: @maximum_test( ; CHECK-V8M-BASE-NEXT: entry: ; CHECK-V8M-BASE-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-V8M-BASE-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-V8M-BASE-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-V8M-BASE-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-V8M-BASE-NEXT: ret void Index: llvm/test/Transforms/SimplifyCFG/speculate-math.ll =================================================================== --- llvm/test/Transforms/SimplifyCFG/speculate-math.ll +++ llvm/test/Transforms/SimplifyCFG/speculate-math.ll @@ -15,8 +15,12 @@ ; CHECK-LABEL: @fdiv_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], 0.000000e+00 +; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]] +; CHECK: cond.true: ; CHECK-NEXT: [[DIV:%.*]] = fdiv double [[B:%.*]], [[A]] -; CHECK-NEXT: [[COND:%.*]] = select nsz i1 [[CMP]], double [[DIV]], double 0.000000e+00 +; CHECK-NEXT: br label [[COND_END]] +; CHECK: cond.end: +; CHECK-NEXT: [[COND:%.*]] = phi nsz double [ [[DIV]], [[COND_TRUE]] ], [ 0.000000e+00, [[ENTRY:%.*]] ] ; CHECK-NEXT: ret double [[COND]] ; entry: @@ -36,7 +40,7 @@ ; CHECK-LABEL: @sqrt_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.sqrt.f32(float [[A]]) #[[ATTR2:[0-9]+]] ; CHECK-NEXT: [[COND_I:%.*]] = select afn i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -59,7 +63,7 @@ ; CHECK-LABEL: @fabs_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[A]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -82,7 +86,7 @@ ; CHECK-LABEL: @fma_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fma.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select reassoc nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -105,7 +109,7 @@ ; CHECK-LABEL: @fmuladd_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fmuladd.f32(float [[A]], float [[B:%.*]], float [[C:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select ninf i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -128,7 +132,7 @@ ; CHECK-LABEL: @minnum_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -151,7 +155,7 @@ ; CHECK-LABEL: @maxnum_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maxnum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select ninf nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -174,7 +178,7 @@ ; CHECK-LABEL: @minimum_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.minimum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select reassoc i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void @@ -197,7 +201,7 @@ ; CHECK-LABEL: @maximum_test( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CMP_I:%.*]] = fcmp olt float [[A:%.*]], 0.000000e+00 -; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #2 +; CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.maximum.f32(float [[A]], float [[B:%.*]]) #[[ATTR2]] ; CHECK-NEXT: [[COND_I:%.*]] = select nsz i1 [[CMP_I]], float 0x7FF8000000000000, float [[TMP0]] ; CHECK-NEXT: store float [[COND_I]], ptr addrspace(1) [[OUT:%.*]], align 4 ; CHECK-NEXT: ret void Index: llvm/test/Transforms/SimplifyCFG/unsafe-speculate.ll =================================================================== --- /dev/null +++ llvm/test/Transforms/SimplifyCFG/unsafe-speculate.ll @@ -0,0 +1,46 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=simplifycfg -S | FileCheck %s + +declare void @foo() +declare void @bar() + +; Move fdiv to entry block is unsafe. + +define void @test(x86_fp80 %divisor, ptr %p1) { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[COND1:%.*]] = fcmp ogt x86_fp80 [[DIVISOR:%.*]], 0xK3FFF8000000000000000 +; CHECK-NEXT: [[F2:%.*]] = load x86_fp80, ptr [[P1:%.*]], align 16 +; CHECK-NEXT: br i1 [[COND1]], label [[BB1:%.*]], label [[BB3:%.*]] +; CHECK: bb1: +; CHECK-NEXT: [[F3:%.*]] = fdiv x86_fp80 0xK7FFEFFFFFFFFFFFFFFFF, [[DIVISOR]] +; CHECK-NEXT: [[COND2:%.*]] = fcmp olt x86_fp80 [[F3]], [[F2]] +; CHECK-NEXT: br i1 [[COND2]], label [[BB2:%.*]], label [[BB3]] +; CHECK: common.ret: +; CHECK-NEXT: ret void +; CHECK: bb2: +; CHECK-NEXT: call void @foo() +; CHECK-NEXT: br label [[COMMON_RET:%.*]] +; CHECK: bb3: +; CHECK-NEXT: call void @bar() +; CHECK-NEXT: br label [[COMMON_RET]] +; +entry: + %cond1 = fcmp ogt x86_fp80 %divisor, 0xK3FFF8000000000000000 + %f2 = load x86_fp80, ptr %p1, align 16 + br i1 %cond1, label %bb1, label %bb3 + +bb1: + %f3 = fdiv x86_fp80 0xK7FFEFFFFFFFFFFFFFFFF, %divisor + %cond2 = fcmp olt x86_fp80 %f3, %f2 + br i1 %cond2, label %bb2, label %bb3 + +bb2: + call void @foo() + ret void + +bb3: + call void @bar() + ret void +} + Index: llvm/test/Transforms/SpeculativeExecution/spec-fp.ll =================================================================== --- llvm/test/Transforms/SpeculativeExecution/spec-fp.ll +++ llvm/test/Transforms/SpeculativeExecution/spec-fp.ll @@ -73,8 +73,9 @@ } ; CHECK-LABEL: @ifThen_fdiv( -; CHECK: fdiv ; CHECK: br i1 true +; CHECK: a: +; CHECK: fdiv define void @ifThen_fdiv() { br i1 true, label %a, label %b @@ -87,8 +88,9 @@ } ; CHECK-LABEL: @ifThen_frem( -; CHECK: frem ; CHECK: br i1 true +; CHECK: a: +; CHECK: frem define void @ifThen_frem() { br i1 true, label %a, label %b