diff --git a/clang/include/clang/Basic/TargetBuiltins.h b/clang/include/clang/Basic/TargetBuiltins.h --- a/clang/include/clang/Basic/TargetBuiltins.h +++ b/clang/include/clang/Basic/TargetBuiltins.h @@ -289,6 +289,7 @@ bool isGatherPrefetch() const { return Flags & IsGatherPrefetch; } bool isReverseUSDOT() const { return Flags & ReverseUSDOT; } bool isReverseMergeAnyBinOp() const { return Flags & ReverseMergeAnyBinOp; } + bool isReverseMergeAnyAccOp() const { return Flags & ReverseMergeAnyAccOp; } bool isUndef() const { return Flags & IsUndef; } bool isTupleCreate() const { return Flags & IsTupleCreate; } bool isTupleGet() const { return Flags & IsTupleGet; } diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -206,6 +206,7 @@ def IsTupleGet : FlagType<0x200000000>; def IsTupleSet : FlagType<0x400000000>; def ReverseMergeAnyBinOp : FlagType<0x800000000>; // e.g. Implement SUBR_X using SUB_X. +def ReverseMergeAnyAccOp : FlagType<0x1000000000>; // e.g. Implement MSB_X using MLS_X. // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h class ImmCheckType { @@ -788,20 +789,20 @@ //------------------------------------------------------------------------------ -multiclass SInstZPZZZ flags=[]> { - def _M : SInst; - def _X : SInst; - def _Z : SInst; +multiclass SInstZPZZZ flags=[]> { + def _M : SInst; + def _X : SInst; + def _Z : SInst; - def _N_M : SInst; - def _N_X : SInst; - def _N_Z : SInst; + def _N_M : SInst; + def _N_X : SInst; + def _N_Z : SInst; } -defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad">; -defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla">; -defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls">; -defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb">; +defm SVMAD : SInstZPZZZ<"svmad", "csilUcUsUiUl", "aarch64_sve_mad", "aarch64_sve_mad">; +defm SVMLA : SInstZPZZZ<"svmla", "csilUcUsUiUl", "aarch64_sve_mla", "aarch64_sve_mla">; +defm SVMLS : SInstZPZZZ<"svmls", "csilUcUsUiUl", "aarch64_sve_mls", "aarch64_sve_mls">; +defm SVMSB : SInstZPZZZ<"svmsb", "csilUcUsUiUl", "aarch64_sve_msb", "aarch64_sve_msb">; //------------------------------------------------------------------------------ @@ -980,18 +981,18 @@ defm SVABS_F : SInstZPZ<"svabs", "hfd", "aarch64_sve_fabs">; defm SVNEG_F : SInstZPZ<"svneg", "hfd", "aarch64_sve_fneg">; -defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd", "aarch64_sve_fabd">; -defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd", "aarch64_sve_fadd">; -defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv", "aarch64_sve_fdiv">; -defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr", "aarch64_sve_fdivr">; -defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax", "aarch64_sve_fmax">; -defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm", "aarch64_sve_fmaxnm">; -defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin", "aarch64_sve_fmin">; -defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm", "aarch64_sve_fminnm">; -defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul", "aarch64_sve_fmul">; -defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx", "aarch64_sve_fmulx">; -defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub", "aarch64_sve_fsub">; -defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr", "aarch64_sve_fsubr">; +defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd", "aarch64_sve_fabd_u">; +defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd", "aarch64_sve_fadd_u">; +defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv", "aarch64_sve_fdiv_u">; +defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr", "aarch64_sve_fdiv_u", [ReverseMergeAnyBinOp]>; +defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax", "aarch64_sve_fmax_u">; +defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm", "aarch64_sve_fmaxnm_u">; +defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin", "aarch64_sve_fmin_u">; +defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm", "aarch64_sve_fminnm_u">; +defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul", "aarch64_sve_fmul_u">; +defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx", "aarch64_sve_fmulx_u">; +defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub", "aarch64_sve_fsub_u">; +defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr", "aarch64_sve_fsub_u", [ReverseMergeAnyBinOp]>; defm SVRECPX : SInstZPZ<"svrecpx", "hfd", "aarch64_sve_frecpx">; defm SVRINTA : SInstZPZ<"svrinta", "hfd", "aarch64_sve_frinta">; @@ -1016,14 +1017,14 @@ def SVSCALE_N_X : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeAny, "aarch64_sve_fscale">; def SVSCALE_N_Z : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeZero, "aarch64_sve_fscale">; -defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad">; -defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla">; -defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls">; -defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb">; -defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad">; -defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla">; -defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls">; -defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb">; +defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad", "aarch64_sve_fmla_u", [ReverseMergeAnyAccOp]>; +defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla", "aarch64_sve_fmla_u">; +defm SVMLS_F : SInstZPZZZ<"svmls", "hfd", "aarch64_sve_fmls", "aarch64_sve_fmls_u">; +defm SVMSB_F : SInstZPZZZ<"svmsb", "hfd", "aarch64_sve_fmsb", "aarch64_sve_fmls_u", [ReverseMergeAnyAccOp]>; +defm SVNMAD_F : SInstZPZZZ<"svnmad", "hfd", "aarch64_sve_fnmad", "aarch64_sve_fnmla_u", [ReverseMergeAnyAccOp]>; +defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla", "aarch64_sve_fnmla_u">; +defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls", "aarch64_sve_fnmls_u">; +defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb", "aarch64_sve_fnmls_u", [ReverseMergeAnyAccOp]>; def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; def SVCADD_X : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeAny, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -9522,6 +9522,9 @@ else if (TypeFlags.isReverseMergeAnyBinOp() && TypeFlags.getMergeType() == SVETypeFlags::MergeAny) std::swap(Ops[1], Ops[2]); + else if (TypeFlags.isReverseMergeAnyAccOp() && + TypeFlags.getMergeType() == SVETypeFlags::MergeAny) + std::swap(Ops[1], Ops[3]); // Predicated intrinsics with _z suffix need a select w/ zeroinitializer. if (TypeFlags.getMergeType() == SVETypeFlags::MergeZero) { diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svabd_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svabd_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svabd_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svabd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fabd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svadd_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svadd_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svadd_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fadd.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -597,13 +597,13 @@ // CHECK-LABEL: @test_svdiv_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -614,13 +614,13 @@ // CHECK-LABEL: @test_svdiv_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -631,13 +631,13 @@ // CHECK-LABEL: @test_svdiv_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svdiv_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -782,7 +782,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -790,7 +790,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -803,7 +803,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -811,7 +811,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -824,7 +824,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -832,7 +832,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -597,13 +597,13 @@ // CHECK-LABEL: @test_svdivr_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -614,13 +614,13 @@ // CHECK-LABEL: @test_svdivr_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -631,13 +631,13 @@ // CHECK-LABEL: @test_svdivr_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svdivr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -782,7 +782,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -790,7 +790,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -803,7 +803,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -811,7 +811,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -824,7 +824,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -832,7 +832,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fdiv.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmad_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmad_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmad_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmax_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmax_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmax_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmax_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmax.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svmaxnm_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svmaxnm_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svmaxnm_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmaxnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmin_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmin_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmin_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmin_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmin.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svminnm_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svminnm_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svminnm_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svminnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fminnm.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmla_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmla_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmla_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmls_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmls_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmls_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmsb_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmsb_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmsb_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmls.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svmul_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svmul_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svmul_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svmul_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmul.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svmulx_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svmulx_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svmulx_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svmulx_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fmulx.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svnmad_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svnmad_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svnmad_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svnmla_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svnmla_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svnmla_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmla.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svnmls_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svnmls_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svnmls_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -125,13 +125,13 @@ // CHECK-LABEL: @test_svnmsb_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) @@ -142,13 +142,13 @@ // CHECK-LABEL: @test_svnmsb_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) @@ -159,13 +159,13 @@ // CHECK-LABEL: @test_svnmsb_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[OP3:%.*]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) @@ -310,7 +310,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( @@ -318,7 +318,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svnmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) @@ -331,7 +331,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( @@ -339,7 +339,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svnmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) @@ -352,7 +352,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( @@ -360,7 +360,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP3:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fnmls.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svnmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svsub_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svsub_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svsub_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z16test_svsub_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -1045,13 +1045,13 @@ // CHECK-LABEL: @test_svsubr_f16_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) @@ -1062,13 +1062,13 @@ // CHECK-LABEL: @test_svsubr_f32_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) @@ -1079,13 +1079,13 @@ // CHECK-LABEL: @test_svsubr_f64_x( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z17test_svsubr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) @@ -1230,7 +1230,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( @@ -1238,7 +1238,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, half [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv8f16( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) @@ -1251,7 +1251,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( @@ -1259,7 +1259,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, float [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv4f32( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) @@ -1272,7 +1272,7 @@ // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CHECK-NEXT: ret [[TMP1]] // // CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( @@ -1280,7 +1280,7 @@ // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement poison, double [[OP2:%.*]], i64 0 // CPP-CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector [[DOTSPLATINSERT]], poison, zeroinitializer -// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[DOTSPLAT]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.fsub.u.nxv2f64( [[TMP0]], [[DOTSPLAT]], [[OP1:%.*]]) // CPP-CHECK-NEXT: ret [[TMP1]] // svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)