diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1758,6 +1758,7 @@ setOperationAction(ISD::SETCC, VT, Custom); setOperationAction(ISD::SHL, VT, Custom); setOperationAction(ISD::SIGN_EXTEND, VT, Custom); + setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Custom); setOperationAction(ISD::SINT_TO_FP, VT, Custom); setOperationAction(ISD::SMAX, VT, Custom); setOperationAction(ISD::SMIN, VT, Custom); diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll @@ -589,8 +589,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h ; CHECK-NEXT: abs z0.h, p0/m, z0.h ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret @@ -642,8 +641,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: abs z0.s, p0/m, z0.s ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll @@ -13,10 +13,8 @@ ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 -; CHECK-NEXT: lsl z1.h, p0/m, z1.h, #8 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: asr z1.h, p0/m, z1.h, #8 -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 +; CHECK-NEXT: sxtb z1.h, p0/m, z1.h +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h ; CHECK-NEXT: sunpklo z1.s, z1.h ; CHECK-NEXT: sunpklo z0.s, z0.h ; CHECK-NEXT: ptrue p0.s, vl4 @@ -190,10 +188,8 @@ ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z1.s, p0/m, z1.s, #16 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z1.s, p0/m, z1.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z1.s, p0/m, z1.s +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: sdiv z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll @@ -190,10 +190,8 @@ ; CHECK-NEXT: uunpklo z1.d, z0.s ; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8 ; CHECK-NEXT: uunpklo z0.d, z0.s -; CHECK-NEXT: lsl z1.d, p0/m, z1.d, #56 -; CHECK-NEXT: lsl z0.d, p0/m, z0.d, #56 -; CHECK-NEXT: asr z1.d, p0/m, z1.d, #56 -; CHECK-NEXT: asr z0.d, p0/m, z0.d, #56 +; CHECK-NEXT: sxtb z1.d, p0/m, z1.d +; CHECK-NEXT: sxtb z0.d, p0/m, z0.d ; CHECK-NEXT: stp q1, q0, [x0] ; CHECK-NEXT: ret %b = sext <4 x i8> %a to <4 x i64> diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll @@ -16,10 +16,8 @@ ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: lsl z1.h, p0/m, z1.h, #8 -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: asr z1.h, p0/m, z1.h, #8 +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h +; CHECK-NEXT: sxtb z1.h, p0/m, z1.h ; CHECK-NEXT: mul z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: lsr z0.h, p0/m, z0.h, #4 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 @@ -124,10 +122,8 @@ ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: lsl z1.s, p0/m, z1.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z1.s, p0/m, z1.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s +; CHECK-NEXT: sxth z1.s, p0/m, z1.s ; CHECK-NEXT: mul z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: lsr z0.s, p0/m, z0.s, #16 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll @@ -14,10 +14,8 @@ ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 ; CHECK-NEXT: ptrue p1.s, vl4 -; CHECK-NEXT: lsl z1.h, p0/m, z1.h, #8 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: asr z1.h, p0/m, z1.h, #8 -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 +; CHECK-NEXT: sxtb z1.h, p0/m, z1.h +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h ; CHECK-NEXT: sunpklo z2.s, z1.h ; CHECK-NEXT: sunpklo z3.s, z0.h ; CHECK-NEXT: sdivr z2.s, p1/m, z2.s, z3.s diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll @@ -10,12 +10,11 @@ define <4 x i8> @ashr_v4i8(<4 x i8> %op1, <4 x i8> %op2) #0 { ; CHECK-LABEL: ashr_v4i8: ; CHECK: // %bb.0: +; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 -; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h ; CHECK-NEXT: and z1.h, z1.h, #0xff -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 ; CHECK-NEXT: asr z0.h, p0/m, z0.h, z1.h ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret @@ -69,12 +68,11 @@ define <2 x i16> @ashr_v2i16(<2 x i16> %op1, <2 x i16> %op2) #0 { ; CHECK-LABEL: ashr_v2i16: ; CHECK: // %bb.0: +; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: and z1.s, z1.s, #0xffff -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 ; CHECK-NEXT: asr z0.s, p0/m, z0.s, z1.s ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll @@ -642,8 +642,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: scvtf z0.s, p0/m, z0.s ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret @@ -716,8 +715,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: ptrue p0.d, vl2 ; CHECK-NEXT: sunpklo z0.d, z0.s ; CHECK-NEXT: scvtf z0.d, p0/m, z0.d diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll --- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll +++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll @@ -8,8 +8,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.h, vl4 -; CHECK-NEXT: lsl z0.h, p0/m, z0.h, #8 -; CHECK-NEXT: asr z0.h, p0/m, z0.h, #8 +; CHECK-NEXT: sxtb z0.h, p0/m, z0.h ; CHECK-NEXT: asrd z0.h, p0/m, z0.h, #5 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret @@ -61,8 +60,7 @@ ; CHECK: // %bb.0: ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0 ; CHECK-NEXT: ptrue p0.s, vl2 -; CHECK-NEXT: lsl z0.s, p0/m, z0.s, #16 -; CHECK-NEXT: asr z0.s, p0/m, z0.s, #16 +; CHECK-NEXT: sxth z0.s, p0/m, z0.s ; CHECK-NEXT: asrd z0.s, p0/m, z0.s, #5 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0 ; CHECK-NEXT: ret