Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp =================================================================== --- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -7986,15 +7986,20 @@ return DAG.getNode(NewOp, dl, VT, Quiet0, Quiet1, Node->getFlags()); } + auto IsConstantNonZero = [](SDValue N) { + auto *Input = dyn_cast(N); + return Input && !Input->isZero(); + }; // If the target has FMINIMUM/FMAXIMUM but not FMINNUM/FMAXNUM use that - // instead if there are no NaNs. - if (Node->getFlags().hasNoNaNs()) { + // instead if there are no NaNs and at least one operand isn't +/-0. + if (Node->getFlags().hasNoNaNs() && + (IsConstantNonZero(Node->getOperand(0)) || + IsConstantNonZero(Node->getOperand(1)))) { unsigned IEEE2018Op = Node->getOpcode() == ISD::FMINNUM ? ISD::FMINIMUM : ISD::FMAXIMUM; - if (isOperationLegalOrCustom(IEEE2018Op, VT)) { + if (isOperationLegalOrCustom(IEEE2018Op, VT)) return DAG.getNode(IEEE2018Op, dl, VT, Node->getOperand(0), Node->getOperand(1), Node->getFlags()); - } } if (SDValue SelCC = createSelectForFMINNUM_FMAXNUM(Node, DAG)) Index: llvm/test/CodeGen/ARM/lower-vmax.ll =================================================================== --- llvm/test/CodeGen/ARM/lower-vmax.ll +++ llvm/test/CodeGen/ARM/lower-vmax.ll @@ -1,11 +1,21 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=arm-eabihf -mattr=+neon < %s | FileCheck -check-prefixes=CHECK-NO_NEON %s ; RUN: llc -mtriple=arm-eabihf -mattr=+neon,+neonfp < %s | FileCheck -check-prefixes=CHECK-NEON %s define float @max_f32(float, float) { -;CHECK-NEON: vmax.f32 -;CHECK-NO_NEON: vcmp.f32 -;CHECK-NO_NEON: vmrs -;CHECK-NO_NEON: vmovgt.f32 +; CHECK-NO_NEON-LABEL: max_f32: +; CHECK-NO_NEON: @ %bb.0: +; CHECK-NO_NEON-NEXT: vcmp.f32 s1, s0 +; CHECK-NO_NEON-NEXT: vmrs APSR_nzcv, fpscr +; CHECK-NO_NEON-NEXT: vmovgt.f32 s0, s1 +; CHECK-NO_NEON-NEXT: mov pc, lr +; +; CHECK-NEON-LABEL: max_f32: +; CHECK-NEON: @ %bb.0: +; CHECK-NEON-NEXT: vcmp.f32 s1, s0 +; CHECK-NEON-NEXT: vmrs APSR_nzcv, fpscr +; CHECK-NEON-NEXT: vmovgt.f32 s0, s1 +; CHECK-NEON-NEXT: mov pc, lr %3 = call nnan float @llvm.maxnum.f32(float %1, float %0) ret float %3 } @@ -13,10 +23,19 @@ declare float @llvm.maxnum.f32(float, float) #1 define float @min_f32(float, float) { -;CHECK-NEON: vmin.f32 -;CHECK-NO_NEON: vcmp.f32 -;CHECK-NO_NEON: vmrs -;CHECK-NO_NEON: vmovlt.f32 +; CHECK-NO_NEON-LABEL: min_f32: +; CHECK-NO_NEON: @ %bb.0: +; CHECK-NO_NEON-NEXT: vcmp.f32 s1, s0 +; CHECK-NO_NEON-NEXT: vmrs APSR_nzcv, fpscr +; CHECK-NO_NEON-NEXT: vmovlt.f32 s0, s1 +; CHECK-NO_NEON-NEXT: mov pc, lr +; +; CHECK-NEON-LABEL: min_f32: +; CHECK-NEON: @ %bb.0: +; CHECK-NEON-NEXT: vcmp.f32 s1, s0 +; CHECK-NEON-NEXT: vmrs APSR_nzcv, fpscr +; CHECK-NEON-NEXT: vmovlt.f32 s0, s1 +; CHECK-NEON-NEXT: mov pc, lr %3 = call nnan float @llvm.minnum.f32(float %1, float %0) ret float %3 } Index: llvm/test/CodeGen/WebAssembly/f32.ll =================================================================== --- llvm/test/CodeGen/WebAssembly/f32.ll +++ llvm/test/CodeGen/WebAssembly/f32.ll @@ -207,14 +207,29 @@ ; CHECK-LABEL: fminnum32_intrinsic: ; CHECK: .functype fminnum32_intrinsic (f32, f32) -> (f32) ; CHECK-NEXT: # %bb.0: -; CHECK-NEXT: local.get $push2=, 0 -; CHECK-NEXT: local.get $push1=, 1 -; CHECK-NEXT: f32.min $push0=, $pop2, $pop1 -; CHECK-NEXT: return $pop0 +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: local.get $push4=, 1 +; CHECK-NEXT: local.get $push3=, 0 +; CHECK-NEXT: local.get $push2=, 1 +; CHECK-NEXT: f32.lt $push0=, $pop3, $pop2 +; CHECK-NEXT: f32.select $push1=, $pop5, $pop4, $pop0 +; CHECK-NEXT: return $pop1 %a = call nnan float @llvm.minnum.f32(float %x, float %y) ret float %a } +define float @fminnum32_non_zero_intrinsic(float %x) { +; CHECK-LABEL: fminnum32_non_zero_intrinsic: +; CHECK: .functype fminnum32_non_zero_intrinsic (f32) -> (f32) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push2=, 0 +; CHECK-NEXT: f32.const $push0=, -0x1p0 +; CHECK-NEXT: f32.min $push1=, $pop2, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan float @llvm.minnum.f32(float %x, float -1.0) + ret float %a +} + declare float @llvm.maximum.f32(float, float) define float @fmax32_intrinsic(float %x, float %y) { ; CHECK-LABEL: fmax32_intrinsic: @@ -233,14 +248,44 @@ ; CHECK-LABEL: fmaxnum32_intrinsic: ; CHECK: .functype fmaxnum32_intrinsic (f32, f32) -> (f32) ; CHECK-NEXT: # %bb.0: -; CHECK-NEXT: local.get $push2=, 0 -; CHECK-NEXT: local.get $push1=, 1 -; CHECK-NEXT: f32.max $push0=, $pop2, $pop1 -; CHECK-NEXT: return $pop0 +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: local.get $push4=, 1 +; CHECK-NEXT: local.get $push3=, 0 +; CHECK-NEXT: local.get $push2=, 1 +; CHECK-NEXT: f32.gt $push0=, $pop3, $pop2 +; CHECK-NEXT: f32.select $push1=, $pop5, $pop4, $pop0 +; CHECK-NEXT: return $pop1 %a = call nnan float @llvm.maxnum.f32(float %x, float %y) ret float %a } +define float @fmaxnum32_zero_intrinsic(float %x) { +; CHECK-LABEL: fmaxnum32_zero_intrinsic: +; CHECK: .functype fmaxnum32_zero_intrinsic (f32) -> (f32) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: f32.const $push0=, 0x0p0 +; CHECK-NEXT: local.get $push4=, 0 +; CHECK-NEXT: f32.const $push3=, 0x0p0 +; CHECK-NEXT: f32.gt $push1=, $pop4, $pop3 +; CHECK-NEXT: f32.select $push2=, $pop5, $pop0, $pop1 +; CHECK-NEXT: return $pop2 + %a = call nnan float @llvm.maxnum.f32(float %x, float 0.0) + ret float %a +} + +define float @fmaxnum32_non_zero_intrinsic(float %x) { +; CHECK-LABEL: fmaxnum32_non_zero_intrinsic: +; CHECK: .functype fmaxnum32_non_zero_intrinsic (f32) -> (f32) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push2=, 0 +; CHECK-NEXT: f32.const $push0=, 0x1p0 +; CHECK-NEXT: f32.max $push1=, $pop2, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan float @llvm.maxnum.f32(float %x, float 1.0) + ret float %a +} + define float @fma32(float %a, float %b, float %c) { ; CHECK-LABEL: fma32: ; CHECK: .functype fma32 (f32, f32, f32) -> (f32) Index: llvm/test/CodeGen/WebAssembly/f64.ll =================================================================== --- llvm/test/CodeGen/WebAssembly/f64.ll +++ llvm/test/CodeGen/WebAssembly/f64.ll @@ -202,6 +202,49 @@ ret double %a } +declare double @llvm.minnum.f64(double, double) +define double @fminnum64_intrinsic(double %x, double %y) { +; CHECK-LABEL: fminnum64_intrinsic: +; CHECK: .functype fminnum64_intrinsic (f64, f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: local.get $push4=, 1 +; CHECK-NEXT: local.get $push3=, 0 +; CHECK-NEXT: local.get $push2=, 1 +; CHECK-NEXT: f64.lt $push0=, $pop3, $pop2 +; CHECK-NEXT: f64.select $push1=, $pop5, $pop4, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan double @llvm.minnum.f64(double %x, double %y) + ret double %a +} + +define double @fminnum64_zero_intrinsic(double %x) { +; CHECK-LABEL: fminnum64_zero_intrinsic: +; CHECK: .functype fminnum64_zero_intrinsic (f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: f64.const $push0=, -0x0p0 +; CHECK-NEXT: local.get $push4=, 0 +; CHECK-NEXT: f64.const $push3=, -0x0p0 +; CHECK-NEXT: f64.lt $push1=, $pop4, $pop3 +; CHECK-NEXT: f64.select $push2=, $pop5, $pop0, $pop1 +; CHECK-NEXT: return $pop2 + %a = call nnan double @llvm.minnum.f64(double %x, double -0.0) + ret double %a +} + +define double @fminnum64_non_zero_intrinsic(double %x) { +; CHECK-LABEL: fminnum64_non_zero_intrinsic: +; CHECK: .functype fminnum64_non_zero_intrinsic (f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push2=, 0 +; CHECK-NEXT: f64.const $push0=, -0x1p0 +; CHECK-NEXT: f64.min $push1=, $pop2, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan double @llvm.minnum.f64(double %x, double -1.0) + ret double %a +} + declare double @llvm.maximum.f64(double, double) define double @fmax64_intrinsic(double %x, double %y) { ; CHECK-LABEL: fmax64_intrinsic: @@ -215,6 +258,49 @@ ret double %a } +declare double @llvm.maxnum.f64(double, double) +define double@fmaxnum64_intrinsic(double %x, double %y) { +; CHECK-LABEL: fmaxnum64_intrinsic: +; CHECK: .functype fmaxnum64_intrinsic (f64, f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: local.get $push4=, 1 +; CHECK-NEXT: local.get $push3=, 0 +; CHECK-NEXT: local.get $push2=, 1 +; CHECK-NEXT: f64.gt $push0=, $pop3, $pop2 +; CHECK-NEXT: f64.select $push1=, $pop5, $pop4, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan double @llvm.maxnum.f64(double %x, double %y) + ret double %a +} + +define double @fmaxnum64_zero_intrinsic(double %x) { +; CHECK-LABEL: fmaxnum64_zero_intrinsic: +; CHECK: .functype fmaxnum64_zero_intrinsic (f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push5=, 0 +; CHECK-NEXT: f64.const $push0=, 0x0p0 +; CHECK-NEXT: local.get $push4=, 0 +; CHECK-NEXT: f64.const $push3=, 0x0p0 +; CHECK-NEXT: f64.gt $push1=, $pop4, $pop3 +; CHECK-NEXT: f64.select $push2=, $pop5, $pop0, $pop1 +; CHECK-NEXT: return $pop2 + %a = call nnan double @llvm.maxnum.f64(double %x, double 0.0) + ret double %a +} + +define double @fmaxnum64_non_zero_intrinsic(double %x) { +; CHECK-LABEL: fmaxnum64_non_zero_intrinsic: +; CHECK: .functype fmaxnum64_non_zero_intrinsic (f64) -> (f64) +; CHECK-NEXT: # %bb.0: +; CHECK-NEXT: local.get $push2=, 0 +; CHECK-NEXT: f64.const $push0=, 0x1p0 +; CHECK-NEXT: f64.max $push1=, $pop2, $pop0 +; CHECK-NEXT: return $pop1 + %a = call nnan double @llvm.maxnum.f64(double %x, double 1.0) + ret double %a +} + define double @fma64(double %a, double %b, double %c) { ; CHECK-LABEL: fma64: ; CHECK: .functype fma64 (f64, f64, f64) -> (f64) Index: llvm/test/CodeGen/WebAssembly/simd-arith.ll =================================================================== --- llvm/test/CodeGen/WebAssembly/simd-arith.ll +++ llvm/test/CodeGen/WebAssembly/simd-arith.ll @@ -13422,13 +13422,67 @@ ; SIMD128-LABEL: minnum_intrinsic_v4f32: ; SIMD128: .functype minnum_intrinsic_v4f32 (v128, v128) -> (v128) ; SIMD128-NEXT: # %bb.0: -; SIMD128-NEXT: f32x4.min $push0=, $0, $1 -; SIMD128-NEXT: return $pop0 +; SIMD128-NEXT: f32x4.extract_lane $push27=, $0, 0 +; SIMD128-NEXT: local.tee $push26=, $3=, $pop27 +; SIMD128-NEXT: f32x4.extract_lane $push25=, $1, 0 +; SIMD128-NEXT: local.tee $push24=, $2=, $pop25 +; SIMD128-NEXT: f32.lt $push2=, $3, $2 +; SIMD128-NEXT: f32.select $push3=, $pop26, $pop24, $pop2 +; SIMD128-NEXT: f32x4.splat $push4=, $pop3 +; SIMD128-NEXT: f32x4.extract_lane $push23=, $0, 1 +; SIMD128-NEXT: local.tee $push22=, $3=, $pop23 +; SIMD128-NEXT: f32x4.extract_lane $push21=, $1, 1 +; SIMD128-NEXT: local.tee $push20=, $2=, $pop21 +; SIMD128-NEXT: f32.lt $push0=, $3, $2 +; SIMD128-NEXT: f32.select $push1=, $pop22, $pop20, $pop0 +; SIMD128-NEXT: f32x4.replace_lane $push5=, $pop4, 1, $pop1 +; SIMD128-NEXT: f32x4.extract_lane $push19=, $0, 2 +; SIMD128-NEXT: local.tee $push18=, $3=, $pop19 +; SIMD128-NEXT: f32x4.extract_lane $push17=, $1, 2 +; SIMD128-NEXT: local.tee $push16=, $2=, $pop17 +; SIMD128-NEXT: f32.lt $push6=, $3, $2 +; SIMD128-NEXT: f32.select $push7=, $pop18, $pop16, $pop6 +; SIMD128-NEXT: f32x4.replace_lane $push8=, $pop5, 2, $pop7 +; SIMD128-NEXT: f32x4.extract_lane $push15=, $0, 3 +; SIMD128-NEXT: local.tee $push14=, $3=, $pop15 +; SIMD128-NEXT: f32x4.extract_lane $push13=, $1, 3 +; SIMD128-NEXT: local.tee $push12=, $2=, $pop13 +; SIMD128-NEXT: f32.lt $push9=, $3, $2 +; SIMD128-NEXT: f32.select $push10=, $pop14, $pop12, $pop9 +; SIMD128-NEXT: f32x4.replace_lane $push11=, $pop8, 3, $pop10 +; SIMD128-NEXT: return $pop11 ; ; SIMD128-FAST-LABEL: minnum_intrinsic_v4f32: ; SIMD128-FAST: .functype minnum_intrinsic_v4f32 (v128, v128) -> (v128) ; SIMD128-FAST-NEXT: # %bb.0: -; SIMD128-FAST-NEXT: f32x4.min $push0=, $0, $1 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push27=, $0, 0 +; SIMD128-FAST-NEXT: local.tee $push26=, $3=, $pop27 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push25=, $1, 0 +; SIMD128-FAST-NEXT: local.tee $push24=, $2=, $pop25 +; SIMD128-FAST-NEXT: f32.lt $push3=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push4=, $pop26, $pop24, $pop3 +; SIMD128-FAST-NEXT: f32x4.splat $push5=, $pop4 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push23=, $0, 1 +; SIMD128-FAST-NEXT: local.tee $push22=, $3=, $pop23 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push21=, $1, 1 +; SIMD128-FAST-NEXT: local.tee $push20=, $2=, $pop21 +; SIMD128-FAST-NEXT: f32.lt $push1=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push2=, $pop22, $pop20, $pop1 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push6=, $pop5, 1, $pop2 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push19=, $0, 2 +; SIMD128-FAST-NEXT: local.tee $push18=, $3=, $pop19 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push17=, $1, 2 +; SIMD128-FAST-NEXT: local.tee $push16=, $2=, $pop17 +; SIMD128-FAST-NEXT: f32.lt $push7=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push8=, $pop18, $pop16, $pop7 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push9=, $pop6, 2, $pop8 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push15=, $0, 3 +; SIMD128-FAST-NEXT: local.tee $push14=, $3=, $pop15 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push13=, $1, 3 +; SIMD128-FAST-NEXT: local.tee $push12=, $2=, $pop13 +; SIMD128-FAST-NEXT: f32.lt $push10=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push11=, $pop14, $pop12, $pop10 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push0=, $pop9, 3, $pop11 ; SIMD128-FAST-NEXT: return $pop0 ; ; NO-SIMD128-LABEL: minnum_intrinsic_v4f32: @@ -13516,13 +13570,67 @@ ; SIMD128-LABEL: maxnum_intrinsic_v4f32: ; SIMD128: .functype maxnum_intrinsic_v4f32 (v128, v128) -> (v128) ; SIMD128-NEXT: # %bb.0: -; SIMD128-NEXT: f32x4.max $push0=, $0, $1 -; SIMD128-NEXT: return $pop0 +; SIMD128-NEXT: f32x4.extract_lane $push27=, $0, 0 +; SIMD128-NEXT: local.tee $push26=, $3=, $pop27 +; SIMD128-NEXT: f32x4.extract_lane $push25=, $1, 0 +; SIMD128-NEXT: local.tee $push24=, $2=, $pop25 +; SIMD128-NEXT: f32.gt $push2=, $3, $2 +; SIMD128-NEXT: f32.select $push3=, $pop26, $pop24, $pop2 +; SIMD128-NEXT: f32x4.splat $push4=, $pop3 +; SIMD128-NEXT: f32x4.extract_lane $push23=, $0, 1 +; SIMD128-NEXT: local.tee $push22=, $3=, $pop23 +; SIMD128-NEXT: f32x4.extract_lane $push21=, $1, 1 +; SIMD128-NEXT: local.tee $push20=, $2=, $pop21 +; SIMD128-NEXT: f32.gt $push0=, $3, $2 +; SIMD128-NEXT: f32.select $push1=, $pop22, $pop20, $pop0 +; SIMD128-NEXT: f32x4.replace_lane $push5=, $pop4, 1, $pop1 +; SIMD128-NEXT: f32x4.extract_lane $push19=, $0, 2 +; SIMD128-NEXT: local.tee $push18=, $3=, $pop19 +; SIMD128-NEXT: f32x4.extract_lane $push17=, $1, 2 +; SIMD128-NEXT: local.tee $push16=, $2=, $pop17 +; SIMD128-NEXT: f32.gt $push6=, $3, $2 +; SIMD128-NEXT: f32.select $push7=, $pop18, $pop16, $pop6 +; SIMD128-NEXT: f32x4.replace_lane $push8=, $pop5, 2, $pop7 +; SIMD128-NEXT: f32x4.extract_lane $push15=, $0, 3 +; SIMD128-NEXT: local.tee $push14=, $3=, $pop15 +; SIMD128-NEXT: f32x4.extract_lane $push13=, $1, 3 +; SIMD128-NEXT: local.tee $push12=, $2=, $pop13 +; SIMD128-NEXT: f32.gt $push9=, $3, $2 +; SIMD128-NEXT: f32.select $push10=, $pop14, $pop12, $pop9 +; SIMD128-NEXT: f32x4.replace_lane $push11=, $pop8, 3, $pop10 +; SIMD128-NEXT: return $pop11 ; ; SIMD128-FAST-LABEL: maxnum_intrinsic_v4f32: ; SIMD128-FAST: .functype maxnum_intrinsic_v4f32 (v128, v128) -> (v128) ; SIMD128-FAST-NEXT: # %bb.0: -; SIMD128-FAST-NEXT: f32x4.max $push0=, $0, $1 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push27=, $0, 0 +; SIMD128-FAST-NEXT: local.tee $push26=, $3=, $pop27 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push25=, $1, 0 +; SIMD128-FAST-NEXT: local.tee $push24=, $2=, $pop25 +; SIMD128-FAST-NEXT: f32.gt $push3=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push4=, $pop26, $pop24, $pop3 +; SIMD128-FAST-NEXT: f32x4.splat $push5=, $pop4 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push23=, $0, 1 +; SIMD128-FAST-NEXT: local.tee $push22=, $3=, $pop23 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push21=, $1, 1 +; SIMD128-FAST-NEXT: local.tee $push20=, $2=, $pop21 +; SIMD128-FAST-NEXT: f32.gt $push1=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push2=, $pop22, $pop20, $pop1 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push6=, $pop5, 1, $pop2 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push19=, $0, 2 +; SIMD128-FAST-NEXT: local.tee $push18=, $3=, $pop19 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push17=, $1, 2 +; SIMD128-FAST-NEXT: local.tee $push16=, $2=, $pop17 +; SIMD128-FAST-NEXT: f32.gt $push7=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push8=, $pop18, $pop16, $pop7 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push9=, $pop6, 2, $pop8 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push15=, $0, 3 +; SIMD128-FAST-NEXT: local.tee $push14=, $3=, $pop15 +; SIMD128-FAST-NEXT: f32x4.extract_lane $push13=, $1, 3 +; SIMD128-FAST-NEXT: local.tee $push12=, $2=, $pop13 +; SIMD128-FAST-NEXT: f32.gt $push10=, $3, $2 +; SIMD128-FAST-NEXT: f32.select $push11=, $pop14, $pop12, $pop10 +; SIMD128-FAST-NEXT: f32x4.replace_lane $push0=, $pop9, 3, $pop11 ; SIMD128-FAST-NEXT: return $pop0 ; ; NO-SIMD128-LABEL: maxnum_intrinsic_v4f32: